Defined in 8 files as a macro:
- drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_4_0_d.h, line 43 (as a macro)
- drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_4_2_d.h, line 31 (as a macro)
- drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_5_0_d.h, line 31 (as a macro)
- drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_6_0_d.h, line 31 (as a macro)
- drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_7_0_offset.h, line 56 (as a macro)
- drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_1_0_offset.h, line 140 (as a macro)
- drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_2_0_0_offset.h, line 812 (as a macro)
- drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_2_5_offset.h, line 501 (as a macro)