Defined in 6 files as a macro:

• drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_5_0_d.h, line 91 (as a macro)
• drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_6_0_d.h, line 107 (as a macro)
• drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_7_0_offset.h, line 68 (as a macro)
• drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_1_0_offset.h, line 158 (as a macro)
• drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_2_0_0_offset.h, line 822 (as a macro)
• drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_2_5_offset.h, line 497 (as a macro)

Referenced in 4 files:

• drivers/gpu/drm/amd/amdgpu/uvd_v5_0.c
  • line 653
  • line 692
• drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c
  • line 546
  • line 557
  • line 619
  • line 630
  • line 684
• drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c
  • line 597
  • line 608
  • line 656
  • line 827
  • line 838
• drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c
  • line 526
  • line 537
  • line 589
  • line 600