/* SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) */ /* * Copyright (c) 2016 BayLibre, SAS * Author: Neil Armstrong <narmstrong@baylibre.com> * * Copyright (c) 2018 Amlogic, inc. * Author: Qiufang Dai <qiufang.dai@amlogic.com> */ #ifndef DT_BINDINGS_CLOCK_AMLOGIC_MESON_G12A_AOCLK #define DT_BINDINGS_CLOCK_AMLOGIC_MESON_G12A_AOCLK #define CLKID_AO_AHB 0 #define CLKID_AO_IR_IN 1 #define CLKID_AO_I2C_M0 2 #define CLKID_AO_I2C_S0 3 #define CLKID_AO_UART 4 #define CLKID_AO_PROD_I2C 5 #define CLKID_AO_UART2 6 #define CLKID_AO_IR_OUT 7 #define CLKID_AO_SAR_ADC 8 #define CLKID_AO_MAILBOX 9 #define CLKID_AO_M3 10 #define CLKID_AO_AHB_SRAM 11 #define CLKID_AO_RTI 12 #define CLKID_AO_M4_FCLK 13 #define CLKID_AO_M4_HCLK 14 #define CLKID_AO_CLK81 15 #define CLKID_AO_SAR_ADC_SEL 16 #define CLKID_AO_SAR_ADC_CLK 18 #define CLKID_AO_CTS_OSCIN 19 #define CLKID_AO_32K 23 #define CLKID_AO_CEC 27 #define CLKID_AO_CTS_RTC_OSCIN 28 #endif |