Defined in 7 files as a macro:
- drivers/gpu/drm/amd/include/asic_reg/bif/bif_5_0_d.h, line 170 (as a macro)
- drivers/gpu/drm/amd/include/asic_reg/bif/bif_5_1_d.h, line 179 (as a macro)
- drivers/gpu/drm/amd/include/asic_reg/nbif/nbif_6_1_offset.h, line 913 (as a macro)
- drivers/gpu/drm/amd/include/asic_reg/nbio/nbio_2_3_offset.h, line 526 (as a macro)
- drivers/gpu/drm/amd/include/asic_reg/nbio/nbio_6_1_offset.h, line 2550 (as a macro)
- drivers/gpu/drm/amd/include/asic_reg/nbio/nbio_7_0_offset.h, line 4432 (as a macro)
- drivers/gpu/drm/amd/include/asic_reg/nbio/nbio_7_4_offset.h, line 2854 (as a macro)