Defined in 9 files as a macro:

• drivers/gpu/drm/amd/include/asic_reg/dce/dce_10_0_d.h, line 1651 (as a macro)
• drivers/gpu/drm/amd/include/asic_reg/dce/dce_11_0_d.h, line 1481 (as a macro)
• drivers/gpu/drm/amd/include/asic_reg/dce/dce_11_2_d.h, line 1580 (as a macro)
• drivers/gpu/drm/amd/include/asic_reg/dce/dce_12_0_offset.h, line 2018 (as a macro)
• drivers/gpu/drm/amd/include/asic_reg/dce/dce_6_0_d.h, line 1241 (as a macro)
• drivers/gpu/drm/amd/include/asic_reg/dce/dce_8_0_d.h, line 1360 (as a macro)
• drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_1_0_offset.h, line 10545 (as a macro)
• drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_0_0_offset.h, line 12856 (as a macro)
• drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_1_0_offset.h, line 11418 (as a macro)

Referenced in 2 files:

• drivers/gpu/drm/amd/display/dc/gpio/dce110/hw_translate_dce110.c
  • line 161
  • line 211
  • line 243
• drivers/gpu/drm/amd/display/dc/gpio/dce80/hw_translate_dce80.c
  • line 190
  • line 240
  • line 272