Defined in 7 files as a macro:
- drivers/gpu/drm/amd/include/asic_reg/dce/dce_10_0_d.h, line 7194 (as a macro)
- drivers/gpu/drm/amd/include/asic_reg/dce/dce_11_0_d.h, line 7383 (as a macro)
- drivers/gpu/drm/amd/include/asic_reg/dce/dce_11_2_d.h, line 8776 (as a macro)
- drivers/gpu/drm/amd/include/asic_reg/dce/dce_12_0_offset.h, line 1712 (as a macro)
- drivers/gpu/drm/amd/include/asic_reg/dce/dce_6_0_d.h, line 3807 (as a macro)
- drivers/gpu/drm/amd/include/asic_reg/dce/dce_8_0_d.h, line 3575 (as a macro)
- drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_1_0_offset.h, line 7747 (as a macro)