Defined in 6 files as a macro:

• drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_5_0_d.h, line 39 (as a macro)
• drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_6_0_d.h, line 50 (as a macro)
• drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_7_0_offset.h, line 114 (as a macro)
• drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_1_0_offset.h, line 240 (as a macro)
• drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_2_0_0_offset.h, line 958 (as a macro)
• drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_2_5_offset.h, line 839 (as a macro)

Referenced in 4 files:

• drivers/gpu/drm/amd/amdgpu/uvd_v5_0.c, line 412
• drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c
  • line 922
  • line 1095
• drivers/gpu/drm/amd/amdgpu/vcn_v2_0.c
  • line 1039
  • line 1197
• drivers/gpu/drm/amd/amdgpu/vcn_v2_5.c, line 860