* Freescale (Enhanced) Configurable Serial Peripheral Interface (CSPI/eCSPI) for i.MX Required properties: - compatible : - "fsl,imx1-cspi" for SPI compatible with the one integrated on i.MX1 - "fsl,imx21-cspi" for SPI compatible with the one integrated on i.MX21 - "fsl,imx27-cspi" for SPI compatible with the one integrated on i.MX27 - "fsl,imx31-cspi" for SPI compatible with the one integrated on i.MX31 - "fsl,imx35-cspi" for SPI compatible with the one integrated on i.MX35 - "fsl,imx51-ecspi" for SPI compatible with the one integrated on i.MX51 - "fsl,imx53-ecspi" for SPI compatible with the one integrated on i.MX53 and later Soc - "fsl,imx8mq-ecspi" for SPI compatible with the one integrated on i.MX8M - reg : Offset and length of the register set for the device - interrupts : Should contain CSPI/eCSPI interrupt - clocks : Clock specifiers for both ipg and per clocks. - clock-names : Clock names should include both "ipg" and "per" See the clock consumer binding, Documentation/devicetree/bindings/clock/clock-bindings.txt Recommended properties: - cs-gpios : GPIOs to use as chip selects, see spi-bus.txt. While the native chip select lines can be used, they appear to always generate a pulse between each word of a transfer. Most use cases will require GPIO based chip selects to generate a valid transaction. Optional properties: - num-cs : Number of total chip selects, see spi-bus.txt. - dmas: DMA specifiers for tx and rx dma. See the DMA client binding, Documentation/devicetree/bindings/dma/dma.txt. - dma-names: DMA request names, if present, should include "tx" and "rx". - fsl,spi-rdy-drctl: Integer, representing the value of DRCTL, the register controlling the SPI_READY handling. Note that to enable the DRCTL consideration, the SPI_READY mode-flag needs to be set too. Valid values are: 0 (disabled), 1 (edge-triggered burst) and 2 (level-triggered burst). Obsolete properties: - fsl,spi-num-chipselects : Contains the number of the chipselect Example: ecspi@70010000 { #address-cells = <1>; #size-cells = <0>; compatible = "fsl,imx51-ecspi"; reg = <0x70010000 0x4000>; interrupts = <36>; cs-gpios = <&gpio3 24 0>, /* GPIO3_24 */ <&gpio3 25 0>; /* GPIO3_25 */ dmas = <&sdma 3 7 1>, <&sdma 4 7 2>; dma-names = "rx", "tx"; fsl,spi-rdy-drctl = <1>; }; |