# SPDX-License-Identifier: GPL-2.0 menuconfig [31mCONFIG_ARCH_VEXPRESS[0m bool "ARM Ltd. Versatile Express family" depends on [31mCONFIG_ARCH_MULTI_V7[0m select [31mCONFIG_ARCH_SUPPORTS_BIG_ENDIAN[0m select [31mCONFIG_ARM_AMBA[0m select [31mCONFIG_ARM_GIC[0m select [31mCONFIG_ARM_GLOBAL_TIMER[0m select [31mCONFIG_ARM_TIMER_SP804[0m select [31mCONFIG_COMMON_CLK_VERSATILE[0m select [31mCONFIG_GPIOLIB[0m select [31mCONFIG_HAVE_ARM_SCU[0m if [31mCONFIG_SMP[0m select [31mCONFIG_HAVE_ARM_TWD[0m if [31mCONFIG_SMP[0m select [31mCONFIG_HAVE_PATA_PLATFORM[0m select [31mCONFIG_ICST[0m select [31mCONFIG_NO_IOPORT_MAP[0m select [31mCONFIG_PLAT_VERSATILE[0m select [31mCONFIG_POWER_RESET[0m select [31mCONFIG_POWER_RESET_VEXPRESS[0m select [31mCONFIG_POWER_SUPPLY[0m select [31mCONFIG_REGULATOR[0m if [31mCONFIG_MMC_ARMMMCI[0m select [31mCONFIG_REGULATOR_FIXED_VOLTAGE[0m if [31mCONFIG_REGULATOR[0m select [31mCONFIG_VEXPRESS_CONFIG[0m select [31mCONFIG_VEXPRESS_SYSCFG[0m select [31mCONFIG_MFD_VEXPRESS_SYSREG[0m help This option enables support for systems using Cortex processor based [31mCONFIG_ARM[0m core and logic ([31mCONFIG_FPGA[0m) tiles on the Versatile Express motherboard, for example: - CoreTile Express A5x2 (V2P-CA5s) - CoreTile Express A9x4 (V2P-CA9) - CoreTile Express A15x2 (V2P-CA15) - LogicTile Express 13MG (V2F-2XV6) with A5, A7, A9 or A15 SMMs (Soft Macrocell Models) - Versatile Express RTSMs (Models) You must boot using a Flattened Device Tree in order to use these platforms. The traditional (ATAGs) boot method is not usable on these boards with this option. if [31mCONFIG_ARCH_VEXPRESS[0m config [31mCONFIG_ARCH_VEXPRESS_CORTEX_A5_A9_ERRATA[0m bool "Enable A5 and A9 only errata work-arounds" default y select [31mCONFIG_ARM_ERRATA_643719[0m if [31mCONFIG_SMP[0m select [31mCONFIG_ARM_ERRATA_720789[0m select [31mCONFIG_PL310_ERRATA_753970[0m if [31mCONFIG_CACHE_L2X0[0m help Provides common dependencies for Versatile Express platforms based on Cortex-A5 and Cortex-A9 processors. In order to build a working kernel, you must also enable relevant core tile support or Flattened Device Tree based support options. config [31mCONFIG_ARCH_VEXPRESS_DCSCB[0m bool "Dual Cluster System Control Block (DCSCB) support" depends on [31mCONFIG_MCPM[0m select [31mCONFIG_ARM_CCI400_PORT_CTRL[0m help Support for the Dual Cluster System Configuration Block (DCSCB). This is needed to provide CPU and cluster power management on RTSM implementing big.LITTLE. config [31mCONFIG_ARCH_VEXPRESS_SPC[0m bool "Versatile Express Serial Power Controller (SPC)" select [31mCONFIG_PM_OPP[0m help The TC2 (A15x2 A7x3) versatile express core tile integrates a logic block called Serial Power Controller (SPC) that provides the interface between the dual cluster test-chip and the M3 microcontroller that carries out power management. config [31mCONFIG_ARCH_VEXPRESS_TC2_PM[0m bool "Versatile Express TC2 power management" depends on [31mCONFIG_MCPM[0m select [31mCONFIG_ARM_CCI400_PORT_CTRL[0m select [31mCONFIG_ARCH_VEXPRESS_SPC[0m select [31mCONFIG_ARM_CPU_SUSPEND[0m help Support for CPU and cluster power management on Versatile Express with a TC2 (A15x2 A7x3) big.LITTLE core tile. endif |