# SPDX-License-Identifier: GPL-2.0
menu "DesignWare PCI Core Support"
depends on [31mCONFIG_PCI[0m
config [31mCONFIG_PCIE_DW[0m
bool
config [31mCONFIG_PCIE_DW_HOST[0m
bool
depends on [31mCONFIG_PCI_MSI_IRQ_DOMAIN[0m
select [31mCONFIG_PCIE_DW[0m
config [31mCONFIG_PCIE_DW_EP[0m
bool
depends on [31mCONFIG_PCI_ENDPOINT[0m
select [31mCONFIG_PCIE_DW[0m
config [31mCONFIG_PCI_DRA7XX[0m
bool
config [31mCONFIG_PCI_DRA7XX_HOST[0m
bool "TI DRA7xx PCIe controller Host Mode"
depends on [31mCONFIG_SOC_DRA7XX[0m || [31mCONFIG_COMPILE_TEST[0m
depends on [31mCONFIG_PCI_MSI_IRQ_DOMAIN[0m
depends on [31mCONFIG_OF[0m && [31mCONFIG_HAS_IOMEM[0m && [31mCONFIG_TI_PIPE3[0m
select [31mCONFIG_PCIE_DW_HOST[0m
select [31mCONFIG_PCI_DRA7XX[0m
default y
help
Enables support for the PCIe controller in the DRA7xx SoC to work in
host mode. There are two instances of PCIe controller in DRA7xx.
This controller can work either as EP or RC. In order to enable
host-specific features [31mCONFIG_PCI_DRA7XX_HOST[0m must be selected and in order
to enable device-specific features [31mCONFIG_PCI_DRA7XX_EP[0m must be selected.
This uses the DesignWare core.
config [31mCONFIG_PCI_DRA7XX_EP[0m
bool "TI DRA7xx PCIe controller Endpoint Mode"
depends on [31mCONFIG_SOC_DRA7XX[0m || [31mCONFIG_COMPILE_TEST[0m
depends on [31mCONFIG_PCI_ENDPOINT[0m
depends on [31mCONFIG_OF[0m && [31mCONFIG_HAS_IOMEM[0m && [31mCONFIG_TI_PIPE3[0m
select [31mCONFIG_PCIE_DW_EP[0m
select [31mCONFIG_PCI_DRA7XX[0m
help
Enables support for the PCIe controller in the DRA7xx SoC to work in
endpoint mode. There are two instances of PCIe controller in DRA7xx.
This controller can work either as EP or RC. In order to enable
host-specific features [31mCONFIG_PCI_DRA7XX_HOST[0m must be selected and in order
to enable device-specific features [31mCONFIG_PCI_DRA7XX_EP[0m must be selected.
This uses the DesignWare core.
config [31mCONFIG_PCIE_DW_PLAT[0m
bool
config [31mCONFIG_PCIE_DW_PLAT_HOST[0m
bool "Platform bus based DesignWare PCIe Controller - Host mode"
depends on [31mCONFIG_PCI[0m && [31mCONFIG_PCI_MSI_IRQ_DOMAIN[0m
select [31mCONFIG_PCIE_DW_HOST[0m
select [31mCONFIG_PCIE_DW_PLAT[0m
help
Enables support for the PCIe controller in the Designware IP to
work in host mode. There are two instances of PCIe controller in
Designware IP.
This controller can work either as EP or RC. In order to enable
host-specific features [31mCONFIG_PCIE_DW_PLAT_HOST[0m must be selected and in
order to enable device-specific features PCI_DW_PLAT_EP must be
selected.
config [31mCONFIG_PCIE_DW_PLAT_EP[0m
bool "Platform bus based DesignWare PCIe Controller - Endpoint mode"
depends on [31mCONFIG_PCI[0m && [31mCONFIG_PCI_MSI_IRQ_DOMAIN[0m
depends on [31mCONFIG_PCI_ENDPOINT[0m
select [31mCONFIG_PCIE_DW_EP[0m
select [31mCONFIG_PCIE_DW_PLAT[0m
help
Enables support for the PCIe controller in the Designware IP to
work in endpoint mode. There are two instances of PCIe controller
in Designware IP.
This controller can work either as EP or RC. In order to enable
host-specific features [31mCONFIG_PCIE_DW_PLAT_HOST[0m must be selected and in
order to enable device-specific features PCI_DW_PLAT_EP must be
selected.
config [31mCONFIG_PCI_EXYNOS[0m
bool "Samsung Exynos PCIe controller"
depends on [31mCONFIG_SOC_EXYNOS5440[0m || [31mCONFIG_COMPILE_TEST[0m
depends on [31mCONFIG_PCI_MSI_IRQ_DOMAIN[0m
select [31mCONFIG_PCIE_DW_HOST[0m
config [31mCONFIG_PCI_IMX6[0m
bool "Freescale i.MX6/7/8 PCIe controller"
depends on [31mCONFIG_ARCH_MXC[0m || [31mCONFIG_COMPILE_TEST[0m
depends on [31mCONFIG_PCI_MSI_IRQ_DOMAIN[0m
select [31mCONFIG_PCIE_DW_HOST[0m
config [31mCONFIG_PCIE_SPEAR13XX[0m
bool "STMicroelectronics SPEAr PCIe controller"
depends on [31mCONFIG_ARCH_SPEAR13XX[0m || [31mCONFIG_COMPILE_TEST[0m
depends on [31mCONFIG_PCI_MSI_IRQ_DOMAIN[0m
select [31mCONFIG_PCIE_DW_HOST[0m
help
Say Y here if you want PCIe support on SPEAr13XX SoCs.
config [31mCONFIG_PCI_KEYSTONE[0m
bool
config [31mCONFIG_PCI_KEYSTONE_HOST[0m
bool "PCI Keystone Host Mode"
depends on [31mCONFIG_ARCH_KEYSTONE[0m || [31mCONFIG_ARCH_K3[0m || (([31mCONFIG_ARM[0m || [31mCONFIG_ARM64[0m) && [31mCONFIG_COMPILE_TEST[0m)
depends on [31mCONFIG_PCI_MSI_IRQ_DOMAIN[0m
select [31mCONFIG_PCIE_DW_HOST[0m
select [31mCONFIG_PCI_KEYSTONE[0m
default y
help
Enables support for the PCIe controller in the Keystone SoC to
work in host mode. The [31mCONFIG_PCI[0m controller on Keystone is based on
DesignWare hardware and therefore the driver re-uses the
DesignWare core functions to implement the driver.
config [31mCONFIG_PCI_KEYSTONE_EP[0m
bool "PCI Keystone Endpoint Mode"
depends on [31mCONFIG_ARCH_KEYSTONE[0m || [31mCONFIG_ARCH_K3[0m || (([31mCONFIG_ARM[0m || [31mCONFIG_ARM64[0m) && [31mCONFIG_COMPILE_TEST[0m)
depends on [31mCONFIG_PCI_ENDPOINT[0m
select [31mCONFIG_PCIE_DW_EP[0m
select [31mCONFIG_PCI_KEYSTONE[0m
help
Enables support for the PCIe controller in the Keystone SoC to
work in endpoint mode. The [31mCONFIG_PCI[0m controller on Keystone is based
on DesignWare hardware and therefore the driver re-uses the
DesignWare core functions to implement the driver.
config [31mCONFIG_PCI_LAYERSCAPE[0m
bool "Freescale Layerscape PCIe controller - Host mode"
depends on [31mCONFIG_OF[0m && ([31mCONFIG_ARM[0m || [31mCONFIG_ARCH_LAYERSCAPE[0m || [31mCONFIG_COMPILE_TEST[0m)
depends on [31mCONFIG_PCI_MSI_IRQ_DOMAIN[0m
select [31mCONFIG_MFD_SYSCON[0m
select [31mCONFIG_PCIE_DW_HOST[0m
help
Say Y here if you want to enable PCIe controller support on Layerscape
SoCs to work in Host mode.
This controller can work either as EP or RC. The RCW[HOST_AGT_PEX]
determines which PCIe controller works in EP mode and which PCIe
controller works in RC mode.
config [31mCONFIG_PCI_LAYERSCAPE_EP[0m
bool "Freescale Layerscape PCIe controller - Endpoint mode"
depends on [31mCONFIG_OF[0m && ([31mCONFIG_ARM[0m || [31mCONFIG_ARCH_LAYERSCAPE[0m || [31mCONFIG_COMPILE_TEST[0m)
depends on [31mCONFIG_PCI_ENDPOINT[0m
select [31mCONFIG_PCIE_DW_EP[0m
help
Say Y here if you want to enable PCIe controller support on Layerscape
SoCs to work in Endpoint mode.
This controller can work either as EP or RC. The RCW[HOST_AGT_PEX]
determines which PCIe controller works in EP mode and which PCIe
controller works in RC mode.
config [31mCONFIG_PCI_HISI[0m
depends on [31mCONFIG_OF[0m && ([31mCONFIG_ARM64[0m || [31mCONFIG_COMPILE_TEST[0m)
bool "HiSilicon Hip05 and Hip06 SoCs PCIe controllers"
depends on [31mCONFIG_PCI_MSI_IRQ_DOMAIN[0m
select [31mCONFIG_PCIE_DW_HOST[0m
select [31mCONFIG_PCI_HOST_COMMON[0m
help
Say Y here if you want PCIe controller support on HiSilicon
Hip05 and Hip06 SoCs
config [31mCONFIG_PCIE_QCOM[0m
bool "Qualcomm PCIe controller"
depends on [31mCONFIG_OF[0m && ([31mCONFIG_ARCH_QCOM[0m || [31mCONFIG_COMPILE_TEST[0m)
depends on [31mCONFIG_PCI_MSI_IRQ_DOMAIN[0m
select [31mCONFIG_PCIE_DW_HOST[0m
help
Say Y here to enable PCIe controller support on Qualcomm SoCs. The
PCIe controller uses the DesignWare core plus Qualcomm-specific
hardware wrappers.
config [31mCONFIG_PCIE_ARMADA_8K[0m
bool "Marvell Armada-8K PCIe controller"
depends on [31mCONFIG_ARCH_MVEBU[0m || [31mCONFIG_COMPILE_TEST[0m
depends on [31mCONFIG_PCI_MSI_IRQ_DOMAIN[0m
select [31mCONFIG_PCIE_DW_HOST[0m
help
Say Y here if you want to enable PCIe controller support on
Armada-8K SoCs. The PCIe controller on Armada-8K is based on
DesignWare hardware and therefore the driver re-uses the
DesignWare core functions to implement the driver.
config [31mCONFIG_PCIE_ARTPEC6[0m
bool
config [31mCONFIG_PCIE_ARTPEC6_HOST[0m
bool "Axis ARTPEC-6 PCIe controller Host Mode"
depends on [31mCONFIG_MACH_ARTPEC6[0m || [31mCONFIG_COMPILE_TEST[0m
depends on [31mCONFIG_PCI_MSI_IRQ_DOMAIN[0m
select [31mCONFIG_PCIE_DW_HOST[0m
select [31mCONFIG_PCIE_ARTPEC6[0m
help
Enables support for the PCIe controller in the ARTPEC-6 SoC to work in
host mode. This uses the DesignWare core.
config [31mCONFIG_PCIE_ARTPEC6_EP[0m
bool "Axis ARTPEC-6 PCIe controller Endpoint Mode"
depends on [31mCONFIG_MACH_ARTPEC6[0m || [31mCONFIG_COMPILE_TEST[0m
depends on [31mCONFIG_PCI_ENDPOINT[0m
select [31mCONFIG_PCIE_DW_EP[0m
select [31mCONFIG_PCIE_ARTPEC6[0m
help
Enables support for the PCIe controller in the ARTPEC-6 SoC to work in
endpoint mode. This uses the DesignWare core.
config [31mCONFIG_PCIE_KIRIN[0m
depends on [31mCONFIG_OF[0m && ([31mCONFIG_ARM64[0m || [31mCONFIG_COMPILE_TEST[0m)
bool "HiSilicon Kirin series SoCs PCIe controllers"
depends on [31mCONFIG_PCI_MSI_IRQ_DOMAIN[0m
select [31mCONFIG_PCIE_DW_HOST[0m
help
Say Y here if you want PCIe controller support
on HiSilicon Kirin series SoCs.
config [31mCONFIG_PCIE_HISI_STB[0m
bool "HiSilicon STB SoCs PCIe controllers"
depends on [31mCONFIG_ARCH_HISI[0m || [31mCONFIG_COMPILE_TEST[0m
depends on [31mCONFIG_PCI_MSI_IRQ_DOMAIN[0m
select [31mCONFIG_PCIE_DW_HOST[0m
help
Say Y here if you want PCIe controller support on HiSilicon STB SoCs
config [31mCONFIG_PCI_MESON[0m
bool "MESON PCIe controller"
depends on [31mCONFIG_PCI_MSI_IRQ_DOMAIN[0m
select [31mCONFIG_PCIE_DW_HOST[0m
help
Say Y here if you want to enable [31mCONFIG_PCI[0m controller support on Amlogic
SoCs. The [31mCONFIG_PCI[0m controller on Amlogic is based on DesignWare hardware
and therefore the driver re-uses the DesignWare core functions to
implement the driver.
config [31mCONFIG_PCIE_TEGRA194[0m
tristate "NVIDIA Tegra194 (and later) PCIe controller"
depends on [31mCONFIG_ARCH_TEGRA_194_SOC[0m || [31mCONFIG_COMPILE_TEST[0m
depends on [31mCONFIG_PCI_MSI_IRQ_DOMAIN[0m
select [31mCONFIG_PCIE_DW_HOST[0m
select [31mCONFIG_PHY_TEGRA194_P2U[0m
help
Say Y here if you want support for DesignWare core based PCIe host
controller found in NVIDIA Tegra194 SoC.
config [31mCONFIG_PCIE_UNIPHIER[0m
bool "Socionext UniPhier PCIe controllers"
depends on [31mCONFIG_ARCH_UNIPHIER[0m || [31mCONFIG_COMPILE_TEST[0m
depends on [31mCONFIG_OF[0m && [31mCONFIG_HAS_IOMEM[0m
depends on [31mCONFIG_PCI_MSI_IRQ_DOMAIN[0m
select [31mCONFIG_PCIE_DW_HOST[0m
help
Say Y here if you want PCIe controller support on UniPhier SoCs.
This driver supports LD20 and PXs3 SoCs.
config [31mCONFIG_PCIE_AL[0m
bool "Amazon Annapurna Labs PCIe controller"
depends on [31mCONFIG_OF[0m && ([31mCONFIG_ARM64[0m || [31mCONFIG_COMPILE_TEST[0m)
depends on [31mCONFIG_PCI_MSI_IRQ_DOMAIN[0m
select [31mCONFIG_PCIE_DW_HOST[0m
help
Say Y here to enable support of the Amazon's Annapurna Labs PCIe
controller IP on Amazon SoCs. The PCIe controller uses the DesignWare
core plus Annapurna Labs proprietary hardware wrappers. This is
required only for DT-based platforms. [31mCONFIG_ACPI[0m platforms with the
Annapurna Labs PCIe controller don't need to enable this.
endmenu