.\"	$NetBSD: hpet.4,v 1.3 2011/06/14 13:59:24 jruoho Exp $
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.\" Copyright (c) 2010 Jukka Ruohonen <jruohonen@iki.fi>
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.Dd June 14, 2011
.Dt HPET 4 x86
.Os
.Sh NAME
.Nm hpet
.Nd High Precision Event Timer
.Sh SYNOPSIS
.Cd "hpet* at acpihpetbus?"
.Cd "hpet* at acpinodebus?"
.Cd "hpet* at amdpcib?"
.Cd "hpet* at ichlpcib?"
.Sh DESCRIPTION
The
.Nm
driver supports High Precision Event Timers
.Pq Tn HPETs .
The
.Tn HPET
architecture defines one main 64-bit counter and several
additional timers with variable width.
The minimum clock frequency of the main timecounter is 10 MHz,
but much higher rates are common.
The additional 32 or 64 -bit parts are typically accessible via
.Tn MMIO
that is set by the system
.Tn BIOS
through
.Tn ACPI .
.Pp
As a
.Tn HPET
can provide higher interrupt rates than a
.Tn RTC
or
.Xr attimer 4 ,
multimedia is one typical application context.
The interrupt logic is configurable through
.Tn I/O
.Tn APIC ,
but a legacy mode is provided for older systems.
.Sh SEE ALSO
.Xr acpi 4 ,
.Xr attimer 4 ,
.Xr timecounter 9 ,
.Xr tsc 9
.Rs
.%A Intel Corporation
.%T IA-PC HPET (High Precision Event Timers) Specification
.%N Revision 1.0a
.%D October, 2004
.%U http://www.intel.com/hardwaredesign/hpetspec_1.pdf
.Re