Defined in 2 files as a function:
Referenced in 54 files:
- external/apache2/llvm/dist/llvm/include/llvm/CodeGen/MachineBasicBlock.h
- external/apache2/llvm/dist/llvm/include/llvm/CodeGen/MachineInstrBundle.h
- external/apache2/llvm/dist/llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp, line 1091
- external/apache2/llvm/dist/llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
- external/apache2/llvm/dist/llvm/lib/CodeGen/LiveDebugVariables.cpp, line 1539
- external/apache2/llvm/dist/llvm/lib/CodeGen/MIRCanonicalizerPass.cpp
- external/apache2/llvm/dist/llvm/lib/CodeGen/MIRPrinter.cpp, line 686
- external/apache2/llvm/dist/llvm/lib/CodeGen/MachineBasicBlock.cpp
- external/apache2/llvm/dist/llvm/lib/CodeGen/MachineInstrBundle.cpp
- external/apache2/llvm/dist/llvm/lib/CodeGen/MachinePipeliner.cpp, line 434
- external/apache2/llvm/dist/llvm/lib/CodeGen/MachineSink.cpp, line 717
- external/apache2/llvm/dist/llvm/lib/CodeGen/ModuloSchedule.cpp
- external/apache2/llvm/dist/llvm/lib/CodeGen/ProcessImplicitDefs.cpp, line 98
- external/apache2/llvm/dist/llvm/lib/CodeGen/ReachingDefAnalysis.cpp
- external/apache2/llvm/dist/llvm/lib/CodeGen/VirtRegMap.cpp, line 529
- external/apache2/llvm/dist/llvm/lib/Target/AArch64/AArch64InstrInfo.cpp
- external/apache2/llvm/dist/llvm/lib/Target/AArch64/AArch64SpeculationHardening.cpp
- external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/AMDGPUMCInstLower.cpp
- external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/AMDGPUMachineCFGStructurizer.cpp
- external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/AMDGPUSubtarget.cpp
- external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/GCNHazardRecognizer.cpp, line 236
- external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/R600ControlFlowFinalizer.cpp, line 384
- external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/SIFormMemoryClauses.cpp, line 283
- external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/SIInsertWaitcnts.cpp, line 1470
- external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
- external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/SIMemoryLegalizer.cpp, line 1756
- external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/SIPostRABundler.cpp, line 133
- external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/SIPreEmitPeephole.cpp, line 379
- external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/SIShrinkInstructions.cpp, line 495
- external/apache2/llvm/dist/llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp
- external/apache2/llvm/dist/llvm/lib/Target/ARM/MVEVPTBlockPass.cpp, line 234
- external/apache2/llvm/dist/llvm/lib/Target/ARM/Thumb2SizeReduction.cpp, line 1065
- external/apache2/llvm/dist/llvm/lib/Target/Hexagon/HexagonAsmPrinter.cpp, line 753
- external/apache2/llvm/dist/llvm/lib/Target/Hexagon/HexagonBranchRelaxation.cpp
- external/apache2/llvm/dist/llvm/lib/Target/Hexagon/HexagonFrameLowering.cpp, line 996
- external/apache2/llvm/dist/llvm/lib/Target/Hexagon/HexagonHardwareLoops.cpp
- external/apache2/llvm/dist/llvm/lib/Target/Hexagon/HexagonInstrInfo.cpp
- external/apache2/llvm/dist/llvm/lib/Target/Hexagon/HexagonVLIWPacketizer.cpp
- external/apache2/llvm/dist/llvm/lib/Target/Hexagon/HexagonVectorPrint.cpp
- external/apache2/llvm/dist/llvm/lib/Target/Lanai/LanaiAsmPrinter.cpp, line 199
- external/apache2/llvm/dist/llvm/lib/Target/Lanai/LanaiDelaySlotFiller.cpp
- external/apache2/llvm/dist/llvm/lib/Target/Mips/MicroMipsSizeReduction.cpp
- external/apache2/llvm/dist/llvm/lib/Target/Mips/MipsAsmPrinter.cpp, line 253
- external/apache2/llvm/dist/llvm/lib/Target/Mips/MipsBranchExpansion.cpp, line 298
- external/apache2/llvm/dist/llvm/lib/Target/Mips/MipsConstantIslandPass.cpp, line 1639
- external/apache2/llvm/dist/llvm/lib/Target/PowerPC/PPCInstrInfo.cpp, line 647
- external/apache2/llvm/dist/llvm/lib/Target/PowerPC/PPCMIPeephole.cpp, line 1138
- external/apache2/llvm/dist/llvm/lib/Target/PowerPC/PPCPreEmitPeephole.cpp
- external/apache2/llvm/dist/llvm/lib/Target/Sparc/SparcAsmPrinter.cpp, line 264
- external/apache2/llvm/dist/llvm/lib/Target/VE/VEAsmPrinter.cpp, line 347
- external/apache2/llvm/dist/llvm/lib/Target/WebAssembly/WebAssemblyInstrInfo.cpp
- external/apache2/llvm/dist/llvm/lib/Target/X86/X86FlagsCopyLowering.cpp
- external/apache2/llvm/dist/llvm/lib/Target/X86/X86InsertPrefetch.cpp, line 191
- external/apache2/llvm/dist/llvm/lib/Target/X86/X86SpeculativeLoadHardening.cpp, line 853