sv.gmo - external/gpl3/binutils.old/dist/gas/po/sv.gmo - Netbsd-lockdoc source code (lockdoc-10.99.5-0.1)

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_¹³Ë* êæ			  TI CodeComposer Studio syntax compatibility mode			[default is %d]
			[default is %s]


			specify variant of SPARC architecture
-bump			warn when assembler switches architectures
-sparc			ignored
--enforce-aligned-data	force .long, etc., to be aligned correctly
-relax			relax jumps and branches (default)
-no-relax		avoid changing any jumps and branches

	%s 
 NDS32-specific assembler options:

 input file    	: %s
 options passed	: 
 output file   	: %s
 target        	: %s
 time stamp    	: %s


-no-relax		don't relax relocations
			

D30V options:
-O                      Make adjacent short instructions parallel if possible.
-n                      Warn about all NOPs inserted by the assembler.
-N                      Warn about NOPs inserted after word multiplies.
-c                      Warn about symbols whose names match register names.
-C                      Opposite of -C.  -c is the default.

TIC4X options:
  -mcpu=CPU  -mCPU        select architecture variant. CPU can be:
                            30 - TMS320C30
                            31 - TMS320C31, TMS320LC31
                            32 - TMS320C32
                            33 - TMS320VC33
                            40 - TMS320C40
                            44 - TMS320C44
  -mrev=REV               set cpu hardware revision (integer numbers).
                          Combinations of -mcpu and -mrev will enable/disable
                          the appropriate options (-midle2, -mlowpower and
                          -menhanced) according to the selected type
  -mbig                   select big memory model
  -msmall                 select small memory model (default)
  -mregparm               select register parameters (default)
  -mmemparm               select memory parameters
  -midle2                 enable IDLE2 support
  -mlowpower              enable LOPOWER and MAXSPEED support
  -menhanced              enable enhanced opcode support
                                         constraint violations
                                         for constraint violations
                                         instructions might violate constraints
                                         might violate constraints
                          EXTENSION is combination of:
                          Registers will not need any prefix.
                          Registers will require a `$'-prefix.
                          emulate output (default %s)
                          generate ELF common symbols with STT_COMMON type
                          generate GNU Build notes if none are present in the input
                          generate relax relocations
                          generate x86 used ISA and feature properties
                          use AT&T/Intel mnemonic
                Record the cpu type
        -EB		assemble code for a big-endian cpu
        -EL		assemble code for a little-endian cpu
        -FIXDD		fix data dependencies
        -G gpnum	assemble code for setting gpsize, default is 8 bytes
        -KPIC		generate PIC
        -NWARN		do not print warning message when fixing data dependencies
        -O0		do not perform any optimizations
        -SCORE3		assemble code for target SCORE3
        -SCORE5		assemble code for target SCORE5
        -SCORE5U	assemble code for target SCORE5U
        -SCORE7		assemble code for target SCORE7 [default]
        -USE_R1		assemble code for no warning message when using temp register r1
        -V 		Sunplus release version
        -V                print assembler version number
        -Qy, -Qn          ignored
        -march=score3	assemble code for target SCORE3
        -march=score7	assemble code for target SCORE7 [default]
        S390 options:
        -mregnames        Allow symbolic names for registers
        -mwarn-areg-zero  Warn about zero base/index registers
        -mno-regnames     Do not allow symbolic names for registers
        -m31              Set file format to 31 bit format
        -m64              Set file format to 64 bit format
    ops were:    %s   did you mean this?   other valid variant(s):  --32/--64/--x32         generate 32bit/64bit/x32 code
  --MD FILE               write dependency information in FILE (default none)
  --alternate             initially turn on alternate macro syntax
  --compress-debug-sections[={none|zlib|zlib-gnu|zlib-gabi}]
                          compress DWARF debug sections using zlib
  --compress-debug-sections[={none|zlib|zlib-gnu|zlib-gabi}]
                          compress DWARF debug sections using zlib [default]
  --debug-prefix-map OLD=NEW
                          map OLD to NEW in debug information
  --defsym SYM=VAL        define symbol SYM to given value
  --disp-size-default-22    branch displacement with unknown size is 22 bits (default)
  --disp-size-default-32    branch displacement with unknown size is 32 bits
  --divide                do not treat `/' as a comment character
  --divide                ignored
  --elf-stt-common=[no|yes]   --execstack             require executable stack for this object
  --fatal-warnings        treat warnings as errors
  --fdpic                 generate an FDPIC object file
  --fix-v4bx              Allow BX in ARMv4 code
  --gdwarf-2              generate DWARF2 debugging information
  --gdwarf-sections       generate per-function section names for DWARF line information
  --generate-missing-build-notes=[no|yes]   --gstabs                generate STABS debugging information
  --gstabs+               generate STABS debug info with GNU extensions
  --hash-size=<value>     set the hash table size close to <value>
  --help                  show this message and exit
  --itbl INSTTBL          extend instruction set to include instructions
                          matching the specifications defined in file INSTTBL
  --listing-cont-lines    set the maximum number of continuation lines used
                          for the output data column of the listing
  --listing-lhs-width     set the width in words of the output data column of
                          the listing
  --listing-lhs-width2    set the width in words of the continuation lines
                          of the output data column; ignored if smaller than
                          the width of the first line
  --listing-rhs-width     set the max width in characters of the lines from
                          the source file
  --m32bit-doubles  [default]
  --m32bit-doubles [default]
  --m64bit-doubles
  --m64bit-doubles  Source code uses 64-bit doubles
  --march=<arch>		Generate code for <arch>.  Valid choices for <arch>
				are v0_v10, v10, v32 and common_v10_v32.
  --mbig-endian-data
  --mcpu=<rx100|rx200|rx600|rx610|rxv2|rxv3|rxv3-dfpu>
  --mg10            Enable support for G10 variant
  --mg13            Selects the G13 core.
  --mg14            Selects the G14 core [default]
  --mint-register=<value>
  --mlittle-endian-data [default]
  --mno-allow-string-insns  --mpid
  --mrelax
  --mrelax          Enable link time relaxation
  --mrl78           Alias for --mg14
  --msmall-data-limit
  --muse-conventional-section-names
  --muse-renesas-section-names [default]
  --no-underscore         User symbols do not have any prefix.
  --nocompress-debug-sections
                          don't compress DWARF debug sections
  --nocompress-debug-sections
                          don't compress DWARF debug sections [default]
  --noexecstack           don't require executable stack for this object
  --pic			Enable generation of position-independent code.
  --reduce-memory-overheads 
                          prefer smaller memory use at the cost of longer
                          assembly times
  --sectname-subst        enable section name substitution sequences
  --size-check=[error|warning]
			  ELF .size directive check (default --size-check=error)
  --statistics            print various measured statistics from execution
  --strip-local-absolute  strip local absolute symbols
  --target-help           show target specific options
  --traditional-format    Use same format as native assembler when possible
  --underscore            User symbols are normally prepended with underscore.
  --version               print assembler version number and exit
  --warn                  don't suppress warnings
  -D                      produce assembler debugging messages
  -EB                     assemble code for a big-endian cpu
  -EB                     assemble for a big endian system (default)
  -EL                     assemble for a little endian system
  -EB  -mbig-endian		generate big-endian output
  -EB,-big                produce big endian code and data
  -EL                     assemble code for a little-endian cpu
  -EL  -mlittle-endian		generate little-endian output
  -EL, -mel or -little    Produce little endian output
  -EB, -meb or -big       Produce big endian output
  -mpic			  Generate PIC
  -mno-fp-as-gp-relax	  Suppress fp-as-gp relaxation for this file
  -mb2bb-relax		  Back-to-back branch optimization
  -mno-all-relax	  Suppress all relaxation for this file
  -EL,-little             produce little endian code and data
  -I DIR                  add DIR to search list for .include directives
  -Ip                     synonym for -ignore-parallel-conflicts
  -J                      don't warn about signed overflow
  -K                      warn when differences altered for long displacements
  -KPIC                   generate PIC
  -L,--keep-locals        keep local symbols (e.g. starting with `L')
  -M,--mri                assemble in MRI compatibility mode
  -N                      Warn when branches are expanded to jumps.
  -O                      try to optimize code.  Implies -parallel
  -O1,			  Optimize for performance
  -Os			  Optimize for space
  -Q                      ignored
  -Q                      ignored
  -V                      print assembler version number
  -Q                      ignored
  -V                      print assembler version number
  -EB/-EL                 generate big-endian/little-endian code
  --32/--64               generate 32bit/64bit code
  -Q                      ignored
  -V                      print assembler version number
  -k                      ignored
  -R                      fold data section into text section
  -W  --no-warn           suppress warnings
  -Wnp                    synonym for -no-warn-explicit-parallel-conflicts
  -Wnuh                   synonym for -no-warn-unmatched-high
  -Wp                     synonym for -warn-explicit-parallel-conflicts
  -Wuh                    synonym for -warn-unmatched-high
  -X                      ignored
  -Z                      generate object file even after errors
  -c                      print a warning if a comment is found
  -f                      skip whitespace and comment preprocessing
  -fixed-special-register-names
                          Allow only the original special register names.
  -force2bsr  -mforce2bsr	transform jbsr to bsr
  -fpic  -pic			generate position-independent code
  -g --gen-debug          generate debugging information
  -globalize-symbols      Make all symbols global.
  -gnu-syntax             Turn off mmixal syntax compatibility.
  -h, -H                  Don't execute, print this help text.  Deprecated.
  -h-tick-hex              Support H'00 style hex constants
  -ignore-parallel-conflicts            do not check parallel instructions
  -jsri2bsr  -mjsri2bsr		transform jsri to bsr
  -linker-allocated-gregs If there's no suitable GREG definition for the                          operands of an instruction, let the linker resolve.
  -m%s%s
  -m32r                   disable support for the m32rx instruction set
  -m32r2                  support the extended m32r2 instruction set
  -m32rx                  support the extended m32rx instruction set
  -m4byte-align             Mark the binary as using 32-bit alignment (default)
  -m8byte-align             Mark the binary as using 64-bit alignment
  -mEA
  -mbarrel-shifter
  -mbarrel_shifter
  -mcrc
  -mdsp-packa
  -mdsp_packa
  -mdvbf
  -mld-extension-reg-mask
  -mlock
  -mmac-24
  -mmac-d16
  -mmac_24
  -mmac_d16
  -mmin-max
  -mmin_max
  -mmul64
  -mno-mpy
  -mnorm
  -mrtsc
  -msimd
  -mswap
  -mswape
  -mtelephony
  -muser-mode-only
  -mxy
  -mN - do not insert NOPs after changing interrupts (default)
  -mQ - enable relaxation at assembly time. DANGEROUS!
  -mP - enable polymorph instructions
  -mY - do not warn about missing NOPs after changing interrupts
  -m[no-]%-17sEnable/Disable %s
  -mach=<name>             Set the H8300 machine type to one of:
                           h8300h, h8300hn, h8300s, h8300sn, h8300sx, h8300sxn
  -madd-bnd-prefix        add BND prefix for all valid branches
  -mall-ext		  Turn on all extensions and instructions support
  -mall-opcodes    accept all AVR opcodes, even if not supported by MCU
  -mno-skip-bug    disable warnings for skipping two-word instructions
                   (default for avr4, avr5)
  -mno-wrap        reject rjmp/rcall instructions with 8K wrap-around
                   (default for avr3, avr5)
  -mrmw            accept Read-Modify-Write instructions
  -mlink-relax     generate relocations for linker relaxation (default)
  -mno-link-relax  don't generate relocations for linker relaxation.
  -mgcc-isr        accept the __gcc_isr pseudo-instruction.
  -mamd64                 accept only AMD64 ISA [default]
  -march=ARCH			select architecture ARCH:  -march=ARCH             enable instructions from architecture ARCH
  -march=CPU[,+EXTENSION...]
                          generate code for CPU and EXTENSION, CPU is one of:
  -march=ms1-16-002         allow ms1-16-002 instructions (default)
  -march=ms1-16-003         allow ms1-16-003 instructions
  -march=ms1-64-001         allow ms1-64-001 instructions
  -march=ms2                allow ms2 instructions 
  -mavxscalar=[128|256] (default: 128)
                          encode scalar AVX instructions with specific vector
                           length
  -mbig-endian            generate big-endian code
  -mbig-obj               generate big object files
  -mbranch-stub			enable branch stubs for PC-relative calls
  -mcache			enable cache prefetch instruction
  -mcp				enable coprocessor instructions
  -mcpu=<cpu[-sirevision]> specify the name of the target CPU
  -mcpu=CPU			select processor CPU:  -md - Force copying of data from ROM to RAM at startup
  -mdata-region={none|lower|upper|either} - select region data will be
    placed in.
  -mdsbt                  code uses DSBT addressing
  -mdsp				enable DSP instructions
  -medsp			enable enhanced DSP instructions
  -melrw			enable extended lrw (CK800 only)
  -mevexlig=[128|256|512] (default: 128)
                          encode scalar EVEX instructions with specific vector
                           length
  -mevexrcig=[rne|rd|ru|rz] (default: rne)
                          encode EVEX instructions with specific EVEX.RC value
                           for SAE-only ignored instructions
  -mevexwig=[0|1] (default: 0)
                          encode EVEX instructions with specific EVEX.W value
                           for EVEX.W bit ignored instructions
  -mextension               enable extension opcode support
  -mfdpic                  assemble for the FDPIC ABI
  -mfence-as-lock-add=[no|yes] (default: no)
                          encode lfence, mfence and sfence as
                           lock addl $0x0, (%%{re}sp)
  -mgcc-abi                 Mark the binary as using the old GCC ABI
  -mhard-float			enable hard float instructions
  -mhard-float              Mark the binary as using FP insns (default for e2v3 and up)
  -mindex-reg             support pseudo index registers
  -mintel64               accept only Intel64 ISA
  -mip2022               restrict to IP2022 insns 
  -mip2022ext            permit extended IP2022 insn
  -mistack			enable interrupt stack instructions
  -ml - enable large code model
  -mlabr  -mliterals-after-br	emit literals after branch instructions
  -mlaf  -mliterals-after-func	emit literals after each function
  -mlittle-endian         generate little-endian code
  -mljump			transform jbf, jbt, jbr to jmpi (CK800 only)
  -mmnemonic=[att|intel]   -mmp				enable multiprocessor instructions
  -mn - insert a NOP after changing interrupts
  -mnaked-reg             don't require `%%' prefix for registers
  -mno-bcond17		  disable b<cond> disp17 instruction
  -mno-branch-stub
  -mno-dsbt               code does not use DSBT addressing
  -mno-elrw
  -mno-fdpic/-mnopic       disable -mfdpic
  -mno-istack
  -mno-labr  -mnoliterals-after-br
  -mno-laf  -mno-literals-after-func
  -mno-ljump
  -mno-pic                code addressing is position-dependent
  -mno-stld23		  disable st/ld offset23 instruction
  -mnolrw  -mno-lrw		implement lrw as movih + ori
  -momit-lock-prefix=[no|yes] (default: no)
                          strip all lock prefixes
  -moperand-check=[none|error|warning] (default: warning)
                          check operand combinations for validity
  -mpic                   code addressing is position-independent
  -mpid=far               code uses position-independent data addressing,
                            GOT accesses use far DP addressing
  -mpid=near              code uses position-independent data addressing,
                            GOT accesses use near DP addressing
  -mpid=no                code uses position-dependent data addressing
  -mrelax                   Enable relaxation
  -mrelax                 enable relaxation
  -mrelax-relocations=[no|yes]   -mrh850-abi               Mark the binary as using the RH850 ABI (default)
  -msecurity			enable security instructions
  -mshared                disable branch optimization for shared code
  -msilicon-errata=<name>[,<name>...] - enable fixups for silicon errata
  -msilicon-errata-warn=<name>[,<name>...] - warn when a fixup might be needed
   supported errata names: cpu4, cpu8, cpu11, cpu12, cpu13, cpu19
  -msoft-float              Mark the binary as not using FP insns (default for pre e2v3)
  -msse-check=[none|error|warning] (default: warning)
                          check SSE instructions
  -msse2avx               encode SSE instructions with VEX prefix
  -msyntax=[att|intel] (default: att)
                          use AT&T/Intel syntax
  -mtrust			enable trust instructions
  -mtune=CPU              optimize for CPU, CPU is one of:
  -mv850                    The code is targeted at the v850
  -mv850e                   The code is targeted at the v850e
  -mv850e1                  The code is targeted at the v850e1
  -mv850e2                  The code is targeted at the v850e2
  -mv850e2v3                The code is targeted at the v850e2v3
  -mv850e2v4                Alias for -mv850e3v5
  -mv850e3v5                The code is targeted at the v850e3v5
  -mvdsp			enable vector DSP instructions
  -mvexwig=[0|1] (default: 0)
                          encode VEX instructions with specific VEX.W value
                           for VEX.W bit ignored instructions
  -mwarn-signed-overflow    Warn if signed immediate values overflow
  -mwarn-unsigned-overflow  Warn if unsigned immediate values overflow
  -mx86-used-note=[no|yes]   -my - warn about missing NOPs after changing interrupts (default)
  -n                      Do not optimize code alignment
  -q                      quieten some warnings
  -nIp                    synonym for -no-ignore-parallel-conflicts
  -no-bitinst             disallow the M32R2's extended bit-field instructions
  -no-expand              Do not expand GETA, branches, PUSHJ or JUMP
                          into multiple instructions.
  -no-force2bsr  -mno-force2bsr
  -no-ignore-parallel-conflicts         check parallel instructions for
  -no-jsri2bsr  -mno-jsri2bsr
  -no-merge-gregs         Do not merge GREG definitions with nearby values.
  -no-pad-sections        do not pad the end of sections to alignment boundaries
  -no-parallel            disable -parallel
  -no-predefined-syms     Do not provide mmixal built-in constants.
                          Implies -fixed-special-register-names.
  -no-warn-explicit-parallel-conflicts  do not warn when parallel
  -no-warn-unmatched-high do not warn about missing low relocs
  -nocpp                  ignored
  -nosched                  disable scheduling restrictions
  -o OBJFILE              name the object-file output OBJFILE (default a.out)
  -parallel               try to combine instructions in parallel
  -relax                  Create linker relaxable code.
  -s                      ignored
  -w                      ignored
  -warn-explicit-parallel-conflicts     warn when parallel instructions
  -warn-unmatched-high    warn when an (s)high reloc has no matching low reloc
  -x                      Do not warn when an operand to GETA, a branch,
                          PUSHJ or JUMP is not known to be within range.
                          The linker will catch any errors.  Implies
                          -linker-allocated-gregs.  -xauto		  automagically remove dependency violations (default)
  -xnone		  turn off dependency violation checking
  -xdebug		  debug dependency violation checker
  -xdebugn		  debug dependency violation checker but turn off
			  dependency violation checking
  -xdebugx		  debug dependency violation checker and turn on
			  dependency violation checking
  @FILE                   read options from FILE
 %s; (default) *input_line_pointer == '%c' 0x%02x
 AArch64-specific assembler options:
 ARM-specific assembler options:
 Blackfin specific assembler options:
 FR30 specific command line options:
 GNU assembler version %s (%s)
	 using BFD version %s. H8300-specific assembler options:
 M32C specific command line options:
 M32R specific command line options:
 MMIX-specific command line options:
 Meta specific command line options:
 RL78 specific command line options:
 RX specific command line options:
 Score-specific assembler options:
 V850 options:
 XC16X specific command line options:
 XSTORMY16 specific command line options:
 Z8K options:
  -z8001                  generate segmented code
  -z8002                  generate unsegmented code
  -linkrelax              create linker relaxable code
 branch relocation truncate (0x%x)  [-2^9 ~ 2^9-1] branch relocation truncate (0x%x) [-2^19 ~ 2^19-1] branch relocation truncate (0x%x) [-2^9 ~ 2^9-1]!%s does not use a sequence number!samegp reloc against symbol without .prologue: %s"%d" (instance number %d of a %s label)".else" without matching ".if"".elseif" after ".else"".elseif" without matching ".if"".endif" without ".if"# Example of `%s' instructions
	.sect .text
_start:
# bars register# conflicts length#4 not valid on H8/300.#<imm16>#<imm8>#<mask>$DPR_BYTE not supported in this context$DPR_GOT not supported in this context$DPR_HWORD not supported in this context$DPR_WORD not supported in this context$DSBT_INDEX must be used with __c6xabi_DSBT_BASE$DSBT_INDEX not supported in this context$GOT not supported in this context$PCR_OFFSET not supported in this context$dbg and $depc are disabled when DEBUG is off$hi and $lo are disabled when MUL and DIV are off$mb0, $me0, $mb1, and $me1 are disabled when COP is off% operator needs absolute expression%%%s() must be outermost term in expression%%hi16/%%lo16 only applies to .short or .hword%%hi8 only applies to .byte%d error%d errors%d warning%d warnings%s %s -- `%s'%s -- statement `%s' ignored%s NOP inserted%s `%s' already has an alias `%s'%s argument must be a string%s at operand %d -- `%s'%s directive has no name%s for `%s'%s for instruction '%s'%s howto doesn't match size/pcrel in gas%s instruction does not accept a .b suffix%s instruction, operand %d doesn't match%s is enabled by vle flag%s is not used for the selected target%s may not occupy the delay slot of another branch insn.%s must be %d at operand %d -- `%s'%s must have a constant value%s not disabled by vle flag%s not supported in MIPS16 mode%s offset %d out of range%s offset %d out of range %d to %d%s out of domain (%d is not a multiple of %d)%s out of range %d to %d at operand %d -- `%s'%s out of range (%d is not between %d and %d)%s out of range (0x%s is not between 0x%s and 0x%s)%s register same as write-back base%s relocations do not fit in %d byte%s relocations do not fit in %d bytes%s relocations do not fit in %u byte%s relocations do not fit in %u bytes%s requires value 0-2 as operand 1%s second argument cannot be a negative number %d%s shortened to %s%s symbol recursion stopped at second appearance of '%s'%s unsupported%s unsupported as instruction fixup%s unsupported on this instruction%s without %s%s, %s, generating bad object file
%s, treating warnings as errors%s: attempt to rotate the PC register%s: global symbols not supported in common sections%s: no such section%s: output of 1st instruction is the same as an input to 2nd instruction - is this intentional ?%s: output of 2nd instruction is the same as an input to 1st instruction - is this intentional ?%s: total time in assembly: %ld.%06ld
%s: unexpected function type: %d%s: unrecognized processor name%s: would close weakref loop: %s%s:%u: bad return from bfd_install_relocation: %x%u-byte relocation cannot be applied to %u-byte field'%.*s' instruction not at start of execute packet'%.*s' instruction not in a software pipelined loop'%.*s' instruction not supported on this architecture'%.*s' instruction not supported on this functional unit'%.*s' instruction not supported on this functional unit for this architecture'%s' can't be a weak_definition (currently only supported in sections of type coalesced)'%s' can't be a weak_definition (since it is undefined)'%s' is not repeatable. Resulting behavior is undefined.'%s' is only available in DD2.0 or higher.'%s' may not be bundled with other instructions.'%s' previously declared as '%s'.'%s': only the NOP instruction can be issued in parallel on the m32r')' required',' expected'APSR', 'CPSR' or 'SPSR' expected'ASR' required'H' modifier only valid for accumulator registers'L' modifier not valid for this instruction'LSL' or 'ASR' required'LSL' required'MFC_RdTagMask' (channel 12) is only available in DD2.0 or higher.'P', 'N' or 'Z' flags may only be specified when accumulating'ROR' shift is not permitted'SPU_RdEventMask' (channel 11) is only available in DD2.0 or higher.'[' expected'[' expected after PLD mnemonic'[' expected after PLI mnemonic']' expected'||' after predicate'||' not followed by instruction'||^' without previous SPMASK'}' expected at end of 'option' field(PC)+ unpredictable(Requires %s; requested architecture is %s.)(default: att)
(default: intel)
(default: no)
(default: yes)
(plt) is only valid on branch targets(unknown reason)*<abs8>-%s conflicts with the other architecture options, which imply -%s-(PC) unpredictable-- unterminated string--absolute-literals option not supported in this Xtensa configuration--compress-debug-sections=%s is unsupported--density option is ignored--fdpic			generate an FDPIC object file
--generics is deprecated; use --transform instead--gstabs is not supported for ia64--hash-size needs a numeric argument--no-density option is ignored--no-generics is deprecated; use --no-transform instead--no-relax is deprecated; use --no-transform instead--no-underscore is invalid with a.out format--nops needs a numeric argument--pic is invalid for this object format--relax is deprecated; use --transform instead-32			create 32 bit object file
-64			create 64 bit object file
-32			create o32 ABI object file%s
-64			create 64 ABI object file%s
-EL			generate code for a little endian machine
-EB			generate code for a big endian machine
--little-endian-data	generate code for a machine having big endian
                        instructions and little endian data.
-G may not be used in position-independent code-G may not be used with SVR4 PIC code-G may not be used with abicalls-G n            Put data <= n bytes in the small data area
-G not supported in this configuration-KPIC			generate PIC
-V			print assembler version number
-undeclared-regs	ignore application global register usage without
			appropriate .register directive (default)
-no-undeclared-regs	force error on application global register usage
			without appropriate .register directive
--dcti-couples-detect	warn when an unpredictable DCTI couple is found
-q			ignored
-Qy, -Qn		ignored
-s			ignored
-KPIC, -call_shared	generate SVR4 position independent code
-call_nonpic		generate non-PIC code that can operate with DSOs
-mvxworks-pic		generate VxWorks position independent code
-non_shared		do not generate code that can operate with DSOs
-xgot			assume a 32 bit GOT
-mpdr, -mno-pdr		enable/disable creation of .pdr sections
-mshared, -mno-shared   disable/enable .cpload optimization for
                        position dependent (non shared) code
-mabi=ABI		create ABI conformant object file for:
-R option not supported on this target.-TSO			use Total Store Ordering
-PSO			use Partial Store Ordering
-RMO			use Relaxed Memory Ordering
-l			use 1 word for refs to undefined symbols [default 2]
-pic, -k		generate position independent code
-S			turn jbsr into jsr
--pcrel                 never turn PC-relative branches into absolute jumps
--register-prefix-optional
			recognize register names without prefix character
--bitwise-or		do not treat `|' as a comment character
--base-size-default-16	base reg without size is 16 bits
--base-size-default-32	base reg without size is 32 bits (default)
--disp-size-default-16	displacement with unknown size is 16 bits
--disp-size-default-32	displacement with unknown size is 32 bits (default)
-mCPU			equivalent to -march=CPU -mtune=CPU. Deprecated.
-no-mCPU		don't generate code specific to CPU.
			For -mCPU and -no-mCPU, CPU must be one of:
-mPIC           Mark generated file as using large position independent code
-m[no-]%-16s enable/disable %s architecture extension
-maltivec               generate code for AltiVec
-mvsx                   generate code for Vector-Scalar (VSX) instructions
-me300                  generate code for PowerPC e300 family
-me500, -me500x2        generate code for Motorola e500 core complex
-me500mc,               generate code for Freescale e500mc core complex
-me500mc64,             generate code for Freescale e500mc64 core complex
-me5500,                generate code for Freescale e5500 core complex
-me6500,                generate code for Freescale e6500 core complex
-mspe                   generate code for Motorola SPE instructions
-mspe2                  generate code for Freescale SPE2 instructions
-mvle                   generate code for Freescale VLE instructions
-mtitan                 generate code for AppliedMicro Titan core complex
-mregnames              Allow symbolic names for registers
-mno-regnames           Do not allow symbolic names for registers
-march=%s is not compatible with the selected ABI-march=<arch>		set architecture
-mcpu=<cpu>		set cpu [default %s]
-mcpu conflict with -march option, using -mcpu-mcpu conflict with other model parameters, using -mcpu-mcpu=<CPU version>       Specify the CPU version
-mcpu={fr500|fr550|fr400|fr405|fr450|fr300|frv|simple|tomcat}
-mcrc			generate CRC instructions
-mno-crc		do not generate CRC instructions
-mdouble        Mark generated file as using double precision FP insns
-mdsp			generate DSP instructions
-mno-dsp		do not generate DSP instructions
-mdspr2			generate DSP R2 instructions
-mno-dspr2		do not generate DSP R2 instructions
-mdspr3			generate DSP R3 instructions
-mno-dspr3		do not generate DSP R3 instructions
-mdword         Mark generated file as using a 8-byte stack alignment
-me <filename>            Redirect errors to a file
-medsp option is only supported by ck803s, ignoring -medsp-merrors-to-file <filename>
-mfar-mode | -mf          Use extended addressing
-mfdpic         Assemble for the FDPIC ABI
-mfix-loongson2f-jump	work around Loongson2F JUMP instructions
-mfix-loongson2f-nop	work around Loongson2F NOP errata
-mfix-vr4120		work around certain VR4120 errata
-mfix-vr4130		work around VR4130 mflo/mfhi errata
-mfix-24k		insert a nop after ERET and DERET instructions
-mfix-cn63xxp1		work around CN63XXP1 PREF errata
-mfix-r5900		work around R5900 short loop errata
-mgp32			use 32-bit GPRs, regardless of the chosen ISA
-mfp32			use 32-bit FPRs, regardless of the chosen ISA
-msym32			assume all symbols have 32-bit values
-O0			do not remove unneeded NOPs, do not swap branches
-O, -O1			remove unneeded NOPs, do not swap branches
-O2			remove unneeded NOPs and swap branches
--trap, --no-break	trap exception on div by 0 and mult overflow
--break, --no-trap	break exception on div by 0 and mult overflow
-mfpr-32        Mark generated file as only using 32 FPRs
-mfpr-64        Mark generated file as using all 64 FPRs
-mginv			generate Global INValidate (GINV) instructions
-mno-ginv		do not generate Global INValidate instructions
-mgpr-32        Mark generated file as only using 32 GPRs
-mgpr-64        Mark generated file as using all 64 GPRs
-mhard-float		allow floating-point instructions
-msoft-float		do not allow floating-point instructions
-msingle-float		only allow 32-bit floating-point operations
-mdouble-float		allow 32-bit and 64-bit floating-point operations
--[no-]construct-floats	[dis]allow floating point values to be constructed
--[no-]relax-branch	[dis]allow out-of-range branches to be relaxed
-mignore-branch-isa	accept invalid branches requiring an ISA mode switch
-mno-ignore-branch-isa	reject invalid branches requiring an ISA mode switch
-mnan=ENCODING		select an IEEE 754 NaN encoding convention, either of:
-minsn32		only generate 32-bit microMIPS instructions
-mno-insn32		generate all microMIPS instructions
-mips1			generate MIPS ISA I instructions
-mips2			generate MIPS ISA II instructions
-mips3			generate MIPS ISA III instructions
-mips4			generate MIPS ISA IV instructions
-mips5                  generate MIPS ISA V instructions
-mips32                 generate MIPS32 ISA instructions
-mips32r2               generate MIPS32 release 2 ISA instructions
-mips32r3               generate MIPS32 release 3 ISA instructions
-mips32r5               generate MIPS32 release 5 ISA instructions
-mips32r6               generate MIPS32 release 6 ISA instructions
-mips64                 generate MIPS64 ISA instructions
-mips64r2               generate MIPS64 release 2 ISA instructions
-mips64r3               generate MIPS64 release 3 ISA instructions
-mips64r5               generate MIPS64 release 5 ISA instructions
-mips64r6               generate MIPS64 release 6 ISA instructions
-march=CPU/-mtune=CPU	generate code/schedule for CPU, where CPU is one of:
-mips16			generate mips16 instructions
-no-mips16		do not generate mips16 instructions
-mips16 cannot be used with -micromips-mlibrary-pic   Mark generated file as using position independent code for libraries
-mljump is ignored for ck801/ck802-mloongson-cam		generate Loongson Content Address Memory (CAM) instructions
-mno-loongson-cam	do not generate Loongson Content Address Memory Instructions
-mloongson-ext		generate Loongson EXTensions (EXT) instructions
-mno-loongson-ext	do not generate Loongson EXTensions Instructions
-mloongson-ext2		generate Loongson EXTensions R2 (EXT2) instructions
-mno-loongson-ext2	do not generate Loongson EXTensions R2 Instructions
-mloongson-mmi		generate Loongson MultiMedia extensions Instructions (MMI) instructions
-mno-loongson-mmi	do not generate Loongson MultiMedia extensions Instructions
-mmcu			generate MCU instructions
-mno-mcu		do not generate MCU instructions
-mmedia         Mark generated file as using media insns
-mmicromips		generate microMIPS instructions
-mno-micromips		do not generate microMIPS instructions
-mmicromips cannot be used with -mips16-mmips16e2		generate MIPS16e2 instructions
-mno-mips16e2		do not generate MIPS16e2 instructions
-mmsa			generate MSA instructions
-mno-msa		do not generate MSA instructions
-mmt			generate MT instructions
-mno-mt			do not generate MT instructions
-mmuladd        Mark generated file as using multiply add/subtract insns
-mno-dword      Mark generated file as using a 4-byte stack alignment
-mno-force2bsr is ignored for ck801/ck802-mno-force2bsr is ignored with -mbranch-stub-mno-pack       Do not allow instructions to be packed
-mnopic         Disable -mpic, -mPIC, -mlibrary-pic and -mfdpic
-mpack          Allow instructions to be packed
-mpic           Mark generated file as using small position independent code
-mppc64, -m620          generate code for PowerPC 620/625/630
-mppc64bridge           generate code for PowerPC 64, including bridge insns
-mbooke                 generate code for 32-bit PowerPC BookE
-ma2                    generate code for A2 architecture
-mpower4, -mpwr4        generate code for Power4 architecture
-mpower5, -mpwr5, -mpwr5x
                        generate code for Power5 architecture
-mpower6, -mpwr6        generate code for Power6 architecture
-mpower7, -mpwr7        generate code for Power7 architecture
-mpower8, -mpwr8        generate code for Power8 architecture
-mpower9, -mpwr9        generate code for Power9 architecture
-mcell                  generate code for Cell Broadband Engine architecture
-mcom                   generate code for Power/PowerPC common instructions
-many                   generate code for any architecture (PWR/PWRX/PPC)
-mrelocatable           support for GCC's -mrelocatble option
-mrelocatable-lib       support for GCC's -mrelocatble-lib option
-memb                   set PPC_EMB bit in ELF flags
-mlittle, -mlittle-endian, -le
                        generate code for a little endian machine
-mbig, -mbig-endian, -be
                        generate code for a big endian machine
-msolaris               generate code for Solaris
-mno-solaris            do not generate code for Solaris
-K PIC                  set EF_PPC_RELOCATABLE_LIB in ELF flags
-V                      print assembler version number
-Qy, -Qn                ignored
-msmartmips		generate smartmips instructions
-mno-smartmips		do not generate smartmips instructions
-msoft-float    Mark generated file as using software FP
-mtomcat-debug  Debug tomcat workarounds
-mtomcat-stats  Print out stats for tomcat workarounds
-mvirt			generate Virtualization instructions
-mno-virt		do not generate Virtualization instructions
-mxpa			generate eXtended Physical Address (XPA) instructions
-mno-xpa		do not generate eXtended Physical Address (XPA) instructions
-n32			create n32 ABI object file%s
-nops=count             when aligning, more than COUNT nops uses a branch
-ppc476-workaround      warn if emitting data to code sections
.%s outside of %s....COMMon length (%d.) < 0! Ignored..COMMon length (%ld.) <0! Ignored..COMMon length (%lu) out of range ignored.EQU must use a label.EXIT must appear within a procedure.REG expression must be a register.REG must use a label.SCOMMon length (%ld.) <0! Ignored..abiversion expression does not evaluate to a constant.abort detected.  Abandoning ship..arch <arch> requires a matching --march=... option.asmfunc pseudo-op only available with -mccs flag..asmfunc repeated..asmfunc without function..attribute arch must set before any instructions.begin [no-]density is ignored.begin directive with no matching .end directive.begin directive without a preceding .ent directive.begin directive without a preceding .file directive.begin literal is deprecated; use .literal instead.begin/.bend in different segments.bend directive names unknown symbol.bend directive without a preceding .ent directive.bend directive without a preceding .file directive.bss size %d < 0!.bss size %ld < 0!.bss size argument missing
.bundle_align_mode alignment too large (maximum %u).bundle_lock is meaningless without .bundle_align_mode.bundle_lock sequence at %u bytes, but .bundle_align_mode limit is %u bytes.bundle_lock sequence is %u bytes, but bundle size is only %u bytes.bundle_lock with no matching .bundle_unlock.bundle_unlock without preceding .bundle_lock.callinfo is not within a procedure definition.cfi_endproc without corresponding .cfi_startproc.cfi_fde_data is not supported for this target.cfi_fde_data without corresponding .cfi_startproc.cfi_inline_lsda is not supported for this target.cfi_inline_lsda not valid for this frame.cfi_inline_lsda seen for frame without .cfi_lsda.cfi_lsda requires encoding and symbol arguments.cfi_personality requires encoding and symbol arguments.cfi_personality_id is not supported for this target.compiler directive missing language and version.compiler directive missing version.cpload not in noreorder section.def pseudo-op only available with -mccs flag..def pseudo-op used inside of .def/.endef: ignored..def pseudo-op used inside of .def/.endef; ignored.dim pseudo-op used outside of .def/.endef: ignored..dim pseudo-op used outside of .def/.endef; ignored.ef with no preceding .function.end [no-]density is ignored.end directive has no name.end directive missing or unknown symbol.end directive names different symbol than .ent.end directive names unknown symbol.end directive without a preceding .ent directive.end directive without a preceding .ent directive..end directive without a preceding .file directive.end directive without matching .ent.end not in text section.end symbol does not match .ent symbol.end symbol does not match .ent symbol..end%c encountered without preceding %s.end%s without preceding .%s.endasmfunc pseudo-op only available with -mccs flag..endasmfunc without a .asmfunc..endasmfunc without function..endef pseudo-op used before .def; ignored.endef pseudo-op used outside of .def/.endef: ignored..endfunc missing for previous .func.endfunc missing for previous .proc.ent directive has no name.ent directive has no symbol.ent directive without matching .end.ent or .aent not in text section.ent or .aent not in text section..err encountered.error directive invoked in source file.es without preceding .bs.fail %ld encountered.field count '%d' out of range (1 <= X <= 32).fill size clamped to %d.fmask outside of .ent.fnend directive without .fnstart.frame outside of .ent.gnu_attribute %d,%d is incompatible with `%s'.gnu_attribute %d,%d is no longer supported.gnu_attribute %d,%d is not a recognized floating-point ABI.gnu_attribute %d,%d requires `%s'.handler directive has no name.ifeqs syntax error.incbin count zero, ignoring `%s'.inst.n operand too big. Use .inst.w instead.largecomm supported only in 64bit mode, producing .comm.linkonce is not supported for this object file format.literal not allowed inside .begin literal region.literal_position inside literal directive; ignoring.ln pseudo-op inside .def/.endef: ignored..loc before .file.loc outside of .text.loc pseudo-op inside .def/.endef: ignored..localentry expression for `%s' does not evaluate to a constant.localentry expression for `%s' is not a valid power of 2.longcall pseudo-op seen when not relaxing.longjump pseudo-op seen when not relaxing.machine stack overflow.machine stack underflow.machinemode stack overflow.machinemode stack underflow.mask outside of .ent.mask/.fmask outside of .ent.module is not permitted after generating code.module used with unrecognized symbol: %s
.name directive has no symbol.name directive not in link (.link) section.option pic%d not supported.option pic%d not supported in VxWorks PIC mode.option pop with no .option push.pdesc directive has no entry symbol.pdesc directive not in link (.link) section.pdesc doesn't match with last .ent.pdesc has a bad entry symbol.popsection without corresponding .pushsection; ignored.previous without corresponding .section; ignored.profiler pseudo requires at least two operands..prologue directive without a preceding .ent directive.prologue within prologue.ref outside .csect.ref pseudo-op only available with -mccs flag..sblock may be used for initialized sections only.scl pseudo-op used outside of .def/.endef: ignored..scl pseudo-op used outside of .def/.endef; ignored.sect: subsection name ignored.set pop with no .set push.set syntax invalid
.size expression for %s does not evaluate to a constant.size pseudo-op used outside of .def/.endef: ignored..size pseudo-op used outside of .def/.endef; ignored.space repeat count is negative, ignored.space repeat count is zero, ignored.space specifies non-absolute value.space, .nops or .fill with negative value, ignored.space/.bes repeat count is negative, ignored.space/.bes repeat count is zero, ignored.stab%c is not supported.stab%c: description field '%x' too big, try a different debug format.stab%c: ignoring non-zero other field.stab%c: missing comma.stab%c: missing string.stabx of storage class stsym must be within .bs/.es.syntax %s requires command-line option `--no-underscore'.syntax %s requires command-line option `--underscore'.tag pseudo-op used outside of .def/.endef: ignored..tag pseudo-op used outside of .def/.endef; ignored.tag requires a structure tag.tag target '%s' undefined.tc not in .toc section.tc with no label.type pseudo-op used outside of .def/.endef: ignored..type pseudo-op used outside of .def/.endef; ignored.unwind_save does not support this kind of register.usect: non-zero alignment flag ignored.usepv directive has no name.usepv directive has no type.uses does not refer to a local symbol in the same section.uses pseudo-op seen when not relaxing.uses target does not refer to a local symbol in the same section.val expression is too complex.val pseudo-op used outside of .def/.endef: ignored..val pseudo-op used outside of .def/.endef; ignored.var may only be used within a macro definition.vframepsp is meaningless, assuming .vframesp was meant.vliw unavailable when VLIW is disabled..warning directive invoked in source file.word %s-%s+%s didn't fit.word case-table handling failed: table too large0x%lx out range of signed 32bit displacement0x%lx: "%s" type = %ld, class = %d, segment = %d
128-bit SIMD scalar or floating-point quad precision register expected16-bit SIMD scalar or floating-point half precision register expected16-bit address isn't allowed in MPX instructions16-bit extension16-bit instruction is disabled: %s.16-bit jump out of range16-bit relocation used in 8-bit operand3-bit immediate out of range32-bit SIMD scalar or floating-point single precision register expected32-bit address isn't allowed in 64-bit MPX instructions.32-bit conditional branch generated32bit mode not supported on `%s'.32bit x86_64 is only supported for ELF6-bit displacement out of range6-bit immediate out of range62-bit relocation not yet implemented64-bit SIMD scalar or floating-point double precision register expected64-bit integer or SP register expected64-bit operator src/dst register must be less than 1564bit mode not supported on `%s'.68040 and 68851 specified; mmu instructions may assemble incorrectly8-bit SIMD scalar register expected8-bit displacement out of range8-bit immediate out of range8-bit relocation used in 16-bit operand: Immediate value in cbcond is out of range.: Instruction requires frs2 and frsd must be the same register: PC-relative operand can't be a constant: TLS operand can't be a constant: There are only 32 f registers; [0-31]: There are only 32 single precision f registers; [0-31]: There are only 64 f registers; [0-63]: asr number must be between 0 and 31: crypto immediate must be between 0 and 31: expected register name ccr : expected register name pc : expected register name r0-r7 : expecting %asrN: expecting crypto immediate: imm2 immediate operand out of range (0-3): invalid ASI expression: invalid ASI name: invalid ASI number: invalid cpreg name: invalid membar mask expression: invalid membar mask name: invalid membar mask number: invalid prefetch function expression: invalid prefetch function name: invalid prefetch function number: invalid siam mode expression: invalid siam mode number: non-immdiate imm2 operand: processing macro, real opcode handle not found in hash: unrecognizable ancillary state register: unrecognizable hyperprivileged register: unrecognizable privileged register:b not permitted; defaulting to :w:lower16: not allowed in this instruction:operand has too many bits:operand value(%d) too big for constraint:unknown relocation constraint size:upper16: not allowed in this instruction<abi name>	  specify for ABI <abi name><abi>	          Specify a abi version
			  <abi> could be v1, v2, v2fp, v2fpp<abi>	  assemble for floating point ABI <abi><abs><arch name>	  Assemble for architecture <arch name>
			  <arch name> could be
			  v3, v3j, v3m, v3f, v3s, v2, v2j, v2f, v2s<arch name>	  assemble for architecture <arch name><baseline>	  Assemble for baseline <baseline>
			  <baseline> could be v2, v3, v3m<cpu name>	  assemble for CPU <cpu name><dsp name>	  assemble for DSP architecture <dsp name><fpu name>	  assemble for FPU architecture <fpu name><freg>	  Specify a FPU configuration
			  <freg>
			  0:     8 SP /  4 DP registers
			  1:    16 SP /  8 DP registers
			  2:    32 SP / 16 DP registers
			  3:    32 SP / 32 DP registers<gnu build note><imm8>,X<label><mode>	  controls implicit insertion of IT instructions<unknown><ver>		  assemble for eabi version <ver>? section flag ignored with G present@%s is not a complex relocation.@%s reloc is not supported with %d-bit output format@tls may not be used with "%s" operands@tls may only be used in last operandA bignum/flonum may not be a displacement: 0x%lx usedA jump instruction with long immediate detected at the end of the ZOL label @%sA parameter named `%s' already exists for macro `%s'A status register or status bit name is requiredA0.2,A0.3,A1.2,A1.3 required for QUICKRoT registerAAARG -> unhandled constant reloc: %dADD/SUB sp, sp #immADRADRL used for a symbol not defined in the same fileAR %d can only be accessed by %c-unitAR register not found in indirect referenceARC-specific assembler options:
ARM register expectedARMv8.2 scalar fp16 instruction cannot be conditional, the behaviour is UNPREDICTABLEAUDIO ISA extensionAVR Assembler options:
  -mmcu=[avr-name] select microcontroller variant
                   [avr-name] can be:
                   avr1  - classic AVR core without data RAM
                   avr2  - classic AVR core with up to 8K program memory
                   avr25 - classic AVR core with up to 8K program memory
                           plus the MOVW instruction
                   avr3  - classic AVR core with up to 64K program memory
                   avr31 - classic AVR core with up to 128K program memory
                   avr35 - classic AVR core with up to 64K program memory
                           plus the MOVW instruction
                   avr4  - enhanced AVR core with up to 8K program memory
                   avr5  - enhanced AVR core with up to 64K program memory
                   avr51 - enhanced AVR core with up to 128K program memory
                   avr6  - enhanced AVR core with up to 256K program memory
                   avrxmega2 - XMEGA, > 8K, < 64K FLASH, < 64K RAM
                   avrxmega3 - XMEGA, RAM + FLASH < 64K, Flash visible in RAM
                   avrxmega4 - XMEGA, > 64K, <= 128K FLASH, <= 64K RAM
                   avrxmega5 - XMEGA, > 64K, <= 128K FLASH, > 64K RAM
                   avrxmega6 - XMEGA, > 128K, <= 256K FLASH, <= 64K RAM
                   avrxmega7 - XMEGA, > 128K, <= 256K FLASH, > 64K RAM
                   avrtiny   - AVR Tiny core with 16 gp registers
Aborting because statement has "%s"Absolute PC-relative value in relaxation code.  Assembler error.....Absolute value in relaxation code.  Assembler error.....Accessing `%s' as thread-local objectAccessing function `%s' as thread-local objectAddend to unresolved symbol is not on word boundary.Addend to unresolved symbol not on word boundary.Address mode *+ARx is not allowed in memory-mapped register addressing.  Resulting behavior is undefined.Address mode *+ARx is write-only. Results of reading are undefined.Address of immediate operandAddressing mode not implemented yet.Adjusted signed .word (%#lx) overflows: `switch'-statement too large.Adjusted signed .word (%ld) overflows: `switch'-statement too large.Alignment (%lu) too large: 15 assumed.Alignment must be a power of 2Alignment negative: 0 assumedAlignment negative: 0 assumed.Alignment too large: %d assumedAlignment too large: %d. assumedAlignment too large: %d. assumed.Alpha options:
-32addr			treat addresses as 32-bit values
-F			lack floating point instructions support
-mev4 | -mev45 | -mev5 | -mev56 | -mpca56 | -mev6 | -mev67 | -mev68 | -mall
			specify variant of Alpha architecture
-m21064 | -m21066 | -m21164 | -m21164a | -m21164pc | -m21264 | -m21264a | -m21264b
			these variants include PALcode opcodes
An IMM instruction should not be present in the .s fileAn illegal use of delay slot detected at the end of the ZOL label @%sArchitecture mismatch on "%s %s".Architecture variants are: Argument of .vec_size is expected 4 or 16, actual: %d.Argument of .vec_size is not a constant.Argument to .BLOCK/.BLOCKZ must be between 0 and 0x3fffffffArgument to .even ignoredAssembler messages:
At least one PR argument expectedAt least two PR arguments expectedAttempt to purge non-existing macro `%s'Attempt to put a common symbol into set %sAttempt to put an undefined symbol into set %sAttempt to redefine register set `%s'Attribute name not recognised: %sAuto increment/decrement offset '%ld' is out of range.Auxiliary register AR0--AR7 required for indirectBAD MULBALIGN immediate not 0, 1, 2 or 3 (%lu)BFD is out of sync with GAS, unhandled well-known section type `%s'BSPEC already active.  Nesting is not supported.BSPEC without ESPEC.BSS length (%d) < 0 ignoredBSS length (%d.) <0! Ignored.BYTE expression not a pure numberBYTE expression not in the range 0..255Bad .fmask directiveBad .frame directive 1./2. paramBad .frame directive 3./4. paramBad .mask directiveBad .section directive: want a,s,w,x,M,S,G,T in stringBad COFF version '%s'Bad CPU version '%s'Bad RA (%d) register for .frameBad base register, using $%d.Bad call to MD_ATOF()Bad call to MD_NTOF()Bad call to md_atof ()Bad call to md_atof () - floating point formats are not supportedBad call to md_atof()Bad direct addressing construct %sBad displacement %d (require 0--255)
Bad expression: @%s + %s.Bad opcode table, broken assembler.Bad opcode-table-option, check in file ns32k-opcode.hBad operandBad operand for a load instruction: <%s>Bad operand for a store instruction: <%s>Bad operand for constant offsetBad operand value: %sBad parameter list for macro `%s'Bad register nameBad register name %sBad register rangeBad relocation fixup type (%d)Bad relocation type: 0x%02xBad segment (should be absolute).Bad segment in expression.Bad sequence number: !%s!%sBad shift *directionBad shift modeBad sizeBad suffix after ':' use {b|w|d} Defaulting to dBad suffix, defaulting to dBadly formed address expressionBanked registers are not available with this architecture.Big number is too bigBig-endian R2 is not supported.Bignum not permitted in short literal. Immediate mode assumed.Bignum too big for %c format; truncatedBignum too big for longBit field out of rangeBoth arguments must be substitution symbolsBoth the_insn.HI and the_insn.LO are set : %sBrackets in operand field incorrectBranch to unaligned addressBroken assembler.  No assembly attempted.Buggy opcode: `%s' "%s"
C-SKY ABI v1 (ck510/ck610) does not support -mbranch-stubC-SKY assembler options:
C0 - C15 expectedC54x-specific command line options:
CFI instruction used without previous .cfi_startprocCFI is not supported for this targetCFI state restore without previous rememberCPU version has already been setCPU11: PC is destination of SR altering instructionCPU12: CMP/BIT with PC destination ignores next instructionCPU13: SR is destination of SR altering instructionCPU19: Instruction setting CPUOFF must be followed by a NOPCPU8: Stack pointer accessed with an odd offsetCRIS-specific options:
C_EFCN symbol for %s out of scopeCalling gen_cond_branch_32 for .arch common_v10_v32
Can not do %d byte %srelocationCan not do %d byte pc-relative pic relocationCan not do %d byte pc-relative relocationCan not do %d byte pc-relative relocation for storage type %dCan not do %d byte pic relocationCan not do %d byte relocationCan not do %d byte relocation for storage type %dCan not find match relax hint.  Line: %dCan not represent %s relocation in this object file formatCan not set dlx_skip_hi16_flagCan't add stop bit to mark end of instruction groupCan't change spaces within a procedure definition. IgnoredCan't change subspaces within a procedure definition. IgnoredCan't deal with expression; defaulting to %ldCan't do flonum short literal: immediate mode used.Can't find opcode to match operandsCan't handle O_big in s390_exp_compareCan't hash %s: %sCan't hash `%s': %s
Can't hash instruction '%s':%sCan't redirect stderr to the file '%s'Can't relax differenceCan't relocate expressionCan't set GP valueCan't set register masksCan't use long branches on this architectureCan't work out size of operand.
Cannot allocate unwind descriptor
Cannot assemble instructionCannot define export symbol: %s
Cannot define static symbol: %s
Cannot express %s%d%s relocationCannot find relocation type for symbol %s, code %dCannot generate relocation type for symbol %s, code %sCannot handle fixupCannot make %s relocation PC relativeCannot represent %s relocation in object fileCannot represent exponent in %d bitsCannot represent relocation type %sCannot use POPM to restore the SR registerCannot use special register with this instructionCase value %ld unexpected at line %d of file "%s"
Changing of CPU version on the fly not supportedChanging processor generation on fly not supported...Chose GP value of %lx
Closing bracket missingComma and symbol expected for '.asg STRING, SYMBOL'Comma and symbol expected for '.eval EXPR, SYMBOL'Comma expectedComma expected
Comma expected after section nameCommand-line value overrides ".cpu" directiveCommon alignment negative; 0 assumedCommon alignment not a power of 2Complex expression not supportedComplicated LAPC target operand is not a multiple of two.  Use LAPC.DCondition "%s" does not match preceding groupCondition "%s" uses a different accumulator from a preceding conditionCondition <%c%c> in structured control directive can not be encoded correctlyConstant expression %d out of range, [%d, %d].Conversion of PC relative BSR to absolute JSRConversion of PC relative branch to absolute jumpConversion of PC relative conditional branch to absolute jumpConversion of PC relative displacement to absoluteCopyright (C) 2019 Free Software Foundation, Inc.
Could not set architecture and machineCould not set architecture and machine.Couldn't generate extension instruction opcodesCreating sections with .xdataN/.xrealN/.xstringZ is deprecated.Current section is uninitialized, section name required for .clinkD register out of range for selected VFP versionD10V options:
-O                      Optimize.  Will do some operations in parallel.
--gstabs-packing        Pack adjacent short instructions together even
                        when --gstabs is specified.  On by default.
--no-gstabs-packing     If --gstabs is specified, do not pack adjacent
                        instructions together.
DSP RAM pointer in incorrect unitDSP extensionDangerous simultaneous use of `f%d' and `f%d'Default target `%s' is not supported.Delayed branches not available on SH1Deprecated syntax.Destination accumulator for each part of this parallel instruction must be differentDestination register must be ARnDestination register must be R0 or R1Destination register must be R2 or R3Difference of symbols in different sections is not supportedDifferent arguments of .vec_size are found, previous %d, current %dDirect value of %ld is not suitableDirective invalid within a bundleDisplacement length %s ignored!Displacement too large for :dDisplacement value of %ld is too largeDivide instructions supportDon't know how to figure out width of %c in md_assemble()Don't know how to handle this field. %sDon't know how to relocate plain operands of type %sDot Product instructions cannot be conditional,  the behaviour is UNPREDICTABLEDuplicate %s conditionalDuplicate equal sign (=) in instructionDuplicate predicate register ignoredDuplicated pseudo-opcode %s.EBCDIC constants are not supportedECOFF debugging is disabled.ENDLOOP without corresponding LOOPEPIPHANY specific command line options:
ESPEC without preceding BSPECEmpty argument of .endpEmpty argument of .procEpilogue count of %lu exceeds number of nested prologues (%u)Equal parallel destination registers, one result will be discardedError %s in %s
Error in argument %d.  Expecting:  "%s"Error in expressionError in relocation handlingError in statement syntaxError setting flags for "%s": %sError: Even number required. Rounded to %dExecuting %s in IU in reverse serial may not workExecuting %s in IU may not workExecuting %s in IU may not work in parallel executionExecuting %s in reverse serial with %s may not workExpected '('Expected ')'Expected ':'Expected '['Expected ']'Expected comma after common lengthExpected comma after nameExpected comma after name "%s"Expected comma after symbol-nameExpected comma after symbol-name: rest of line ignored.Expected immediate expressionExpected quoted stringExpected register, got '%s'.Expected separator `='Expected simple number.Expecting '%c'Expecting a constant valueExpecting a register nameExpecting a register.Expecting character constant argumentExpecting comma after CPU errata name, not: %sExpecting operand after ','Expecting operand after ','; got nothingExpecting operand before ','; got nothingExpecting register D for indexed indirect mode.Expecting second argumentExplicit stops are ignored in auto modeExpression Error for operand modifier %%hi/%%lo
Expression inside %%%s could not be parsedExpression out of range, using 0Expression too complex.Extended addressing not supported on the specified CPUExtra )Extra junk in function call, expecting ')'Extra junk on lineFATAL: Attaching compiler header %sFIRST not supported as a .SUBSPACE argumentFP branch in delay slotFP branch preceded by FP compare; NOP insertedFPA .unwind_save does not take a register listFPA register expectedFPU DP extensionFPU SP extensionFPU fused-multiply-add instructionsFRAME parameter must be a multiple of 8: %d
FRV specific command line options:
FT32 options:
Failed to create property section `%s'
Failed to find a valid mode for `%s'.Failed to find real start of function: %s
Fatal error: Field not properly aligned [%d] (%d).Field out of range [%d..%d] (%d).File '%s' not in macro archive formatFirst invalid token: "%s"First opcode is long.  Unable to mix instructions as specified.First operand to .%s must be a predicateFirst operand to .%s not a registerFirst operand to .%s not a valid registerFirst operand to .altrp not a valid branch registerFirst operand to .fframe must be a constantFirst operand to .prologue must be a positive 4-bit constantFirst operand to .restore must be stack pointer (sp)First operand to .save not a registerFirst operand to .save not a valid registerFirst operand to .save.b must be a positive 5-bit constantFirst operand to .save.g must be a positive 4-bit constantFirst operand to .save.gf must be a non-negative 4-bit constantFirst operand to .unwabi must be a constantFirst operand to .vframe must be a general registerFix data dependency: %s %s -- %s %s (insert %d nop!/%d)Fix data dependency: %s %s -- %s %s (insert 1 pflush/%d)Float AC not legal as integer operandFloating point number not valid in expressionFloating point register in register listForced short literal to immediate mode. now_seg=%s to_seg=%sForcing byte displacementFound '{' after explicit switch to automatic modeFound '{' when already bundling.Found '{' when manual bundling is already turned onFound '}' when manual bundling is offFound '}' when not bundling.Found use of non-canonical register name %s; use %s instead.Freescale XGATE co-processor options:
  -mshort                 use 16-bit int ABI (default)
  -mlong                  use 32-bit int ABI
  -mshort-double          use 32-bit double ABI
  -mlong-double           use 64-bit double ABI (default)
  --mxgate                specify the processor variant [default %s]
  --print-insn-syntax     print the syntax of instruction in case of error
  --print-opcodes         print the list of instructions with syntax
  --generate-example      generate an example of each instructionFunction expects two argumentsGNU assembler %s
GNU assembler version %s (%s) using BFD version %s
GOT already in symbol tableGOT already in the symbol tableGOT bad expression with %s.GP prologue size exceeds field size, using 0 insteadGREG expression too complicatedGarbage at end of instructionGarbage at end of instruction: `%s'.Gas failure, reloc type #%i
Gas failure, reloc type %s
Gas failure, reloc value %d
General register not legal as float operandGroup section `%s' has no group signatureHI/LO registers should be specified togetherHI/LO registers should be specified without additional registersHardware capability "%s" not enabled for "%s".Hi-register ADD, MOV, CMP using pcHi-register ADD, MOV, CMP, BX, BLX using pcI don't need or use temp. file "%s".I don't use an interpass file! -V ignoredIA-64 options:
  --mconstant-gp	  mark output file as using the constant-GP model
			  (sets ELF header flag EF_IA_64_CONS_GP)
  --mauto-pic		  mark output file as using the constant-GP model
			  without function descriptors (sets ELF header flag
			  EF_IA_64_NOFUNCDESC_CONS_GP)
  -milp32|-milp64|-mlp64|-mp64	select data model (default -mlp64)
  -mle | -mbe		  select little- or big-endian byte order (default -mle)
  -mtune=[itanium1|itanium2]
			  tune for a specific CPU (default -mtune=itanium2)
  -munwind-check=[warning|error]
			  unwind directive check (default -munwind-check=warning)
  -mhint.b=[ok|warning|error]
			  hint.b check (default -mhint.b=error)
  -x | -xexplicit	  turn on dependency violation checking
IP2K specific command line options:
IT blocks containing 16-bit Thumb instructions of the following class are performance deprecated in ARMv8-A and ARMv8-R: %sIT blocks containing 32-bit Thumb instructions are performance deprecated in ARMv8-A and ARMv8-RIT blocks containing more than one conditional instruction are performance deprecated in ARMv8-A and ARMv8-RIT falling in the range of a previous IT blockIU instruction may not be in the left containerIgnoring attempt to re-define symbolIgnoring attempt to re-define symbol %sIgnoring attempt to re-define symbol `%s'.Ignoring attempt to spill beyond end of regionIgnoring changed section attributes for %sIgnoring statement due to "%s"Illegal 32 bit - processor register (`%s') in Instruction: `%s'Illegal AR register in indirect referenceIllegal Scale - `%d'Illegal `cinv' parameter: `%c'Illegal `mask16' operand, operation is undefined - `%s'Illegal co-processor register in instruction `%s'Illegal co-processor special register in instruction `%s'Illegal combination of relocation functionsIllegal emulated instructionIllegal index register pair (`%s') in Instruction: `%s'Illegal instruction or not implemented opcode.Illegal operand (arg %d)Illegal operand separator `%c'Illegal operand.Illegal operandsIllegal operands (whitespace): `%s'Illegal operands%sIllegal operands: %%%s can be only used with call __tls_get_addrIllegal operands: %%%s cannot be used together with other relocs in the insn ()Illegal operands: %%%s requires arguments in ()Illegal operands: %%r_%s%d requires arguments in ()Illegal operands: %%r_plt in %d-byte data fieldIllegal operands: %%r_tls_dtpoff in %d-byte data fieldIllegal operands: %%tls_ldo in %d-byte data fieldIllegal operands: %%tls_ldo requires arguments in ()Illegal operands: Can't add non-constant expression to %%%s()Illegal operands: Can't do arithmetics involving %%%s() of a relocatable symbolIllegal operands: Can't do arithmetics other than + and - involving %%%s()Illegal operands: Only %%r_%s%d allowed in %d-byte data fieldsIllegal operands: garbage after %%r_%s%d()Illegal operands: garbage after %%tls_ldo()Illegal processor register (`%s') in Instruction: `%s'Illegal register (`%s') in Instruction: `%s'Illegal register (`%s') in instruction: `%s'Illegal register `%s' in Instruction `%s'Illegal register `%s' in cop-register listIllegal register `%s' in cop-special-register listIllegal register `%s' in instruction `%s'Illegal register `%s' in register listIllegal register `%s' in user register listIllegal register pair (`%s') in Instruction: `%s'Illegal register pair `%s' in Instruction `%s'Illegal section name `%s' (causes unwind section name clash)Illegal type of operand (arg %d)Immediate operand %ld is inappropriate for size of instructionImmediate operand is not allowed for operand %d.Immediate value %ld is out of range for instruction %sImmediate value %ld too largeImmediate value for mbar > 32. using <value %% 32>Immediate value not in 16 bit range: %ldImmediate value not in 16 bit signed range: %ldImmediate value not in 16 bit unsigned range: %ldImmediate value not in 4 bit unsigned range: %ldImmediate value not in 5 bit unsigned range: %ldImmediate value not in 6 bit range: %ldImmediate value not in 6 bit unsigned range: %ldImmediate value not in 8 bit range: %ldImmediate value not in 8 bit signed range: %ldImmediate value not in 8 bit unsigned range: %ldImmediate value of %ld is too largeImmediate value of %ld is too large for ldfImmediates %d and %d will give undefined behavior.Improper CSR address (%lu)Improper CSRxI immediate (%lu)Improper shift amount (%lu)Improper use of OP1_IMM_IMPLIEDImproper use of OP1_MUST_BE_IMMIncompatible first and second operands in instructionIncorrect fr_opcode value in frag.  Internal error.....Incorrect number of operandsIncorrect number of operands givenIncorrect syntax, %s.Increment/decrement value is out of range: `%ld'.Index can only be applied to rotating or indirect registersIndex must be a general registerIndex out of range 0..%uIndex register IR0,IR1 required for displacementIndexed indirect mode is not allowed for movb/movw.Indirect indexed addressing is not valid for 68HC11.Indirect register index must be a general registerInfinite loop encountered whilst attempting to compute the addresses of symbols in section %sInfinities are not supported by this target
Info: Initial .body should precede any instructionsInitial .prologue should precede any instructionsInserting "%s" into address type table failed: %sInserting "%s" into constant hash table failed: %sInserting "%s" into entry hint table failed: %sInserting "%s" into register table failed: %sInserting "%s" into structure table failed: %sInsn %s has a jump/branch instruction %s in its delay slot.Insn %s has an instruction %s with limm in its delay slot.Insn slot not set in unwind record.Instruction %s not allowed in a delay slot.Instruction %s not supported in the baseline.Instruction %s requires absolute expressionInstruction '%s' requires an LP cpu versionInstruction '%s' requires far mode addressingInstruction `%s' is not recognized.Instruction does not fit in available delay slots (%d-word insn, %d slot left)Instruction does not fit in available delay slots (%d-word insn, %d slots left)Instruction does not fit in available delay slots (%d-word insn, %d slot left). Resulting behavior is undefined.Instruction does not fit in available delay slots (%d-word insn, %d slots left). Resulting behavior is undefined.Instruction does not support =N addressesInstruction form not available on this architecture.Instruction formats for `%s':Instruction in R container is squashed by flow control instruction in L container.Instruction must be executed in parallelInstruction must be executed in parallel with another instruction.Instruction not supported by this architectureInstruction uses long version, so it cannot be mixed as specifiedInstructions do not use parallel execution pipelines.Instructions may not be executed in parallelInstructions share the same execution pipelineInstructions using long offset modifiers or absolute addresses are not repeatable. Resulting behavior is undefined.Instructions which cause PC discontinuity are not allowed in a delay slot. Resulting behavior is undefined.Intel K1OM is 64bit ELF onlyIntel K1OM is 64bit onlyIntel L1OM is 64bit ELF onlyIntel L1OM is 64bit onlyIntel MCU doesn't support `%s' architectureIntel MCU is 32bit ELF onlyIntel MCU is 32bit onlyInternal Error:  Can't hash %s: %sInternal Error: Can't find %s in hash tableInternal Error: Can't hash %s: %sInternal assembler error for instruction %sInternal assembler error for instruction format %sInternal bug. Try to use 0(r%d) instead of @r%dInternal consistency error.  check ns32k-opcode.hInternal error (%s).
Internal error at %s:%d.
Internal error found in md_convert_frag: offset %ld.  Please report this.Internal error in %s at %s:%d.
Internal error: .relax_hint KEY is not a number!Internal error: Can't hash %s: %sInternal error: Range error. %sInternal error: Relax hint (%s) error. %s: %s (%x)Internal error: Unable to find containing space for %s.Internal error: Unknown fixup type %d (`%s')Internal error: can't find opcode `%s' for `%s'
Internal error: can't hash `%s': %s
Internal error: don't know how to force %s to end of instruction groupInternal error: losing opcode: `%s' "%s"
Internal logic error in iif.iifP[].typeInternal logic error in iif.iifP[n].typeInternal logic error.  Line %d, file: "%s"Internal logic error. line %d, file "%s"Invalid --compress-debug-sections option: `%s'Invalid --elf-stt-common= option: `%s'Invalid --generate-missing-build-notes option: `%s'Invalid --size-check= option: `%s'Invalid .CALL argument: %sInvalid .CALLINFO argument: %sInvalid .SPACE argumentInvalid .SUBSPACE argumentInvalid .insn format
Invalid Add Condition: %sInvalid Add and Branch ConditionInvalid Branch On Bit Condition: %cInvalid COPR identifierInvalid CST4 operand value (arg %d)Invalid Compare and Branch ConditionInvalid Compare/Subtract ConditionInvalid Compare/Subtract Condition: %sInvalid DISPU4 operand value (arg %d)Invalid FP Compare Condition: %sInvalid FP Operand Format: %3sInvalid FTEST completer: %sInvalid Floating Point Operand Format.Invalid Indexed Load Completer Syntax.Invalid Indexed Load Completer.Invalid Logical Instruction Condition.Invalid Nullification: (%c)Invalid PIC expression.Invalid SFU identifierInvalid Shift/Extract/Deposit Condition.Invalid Short Load/Store Completer.Invalid Store Bytes Short CompleterInvalid Unit Instruction Condition.Invalid accumulator register.Invalid argument %d to .prologue.Invalid argument description: %dInvalid argument location: %s
Invalid argument to --isa option: %sInvalid argument to --mach option: %sInvalid auxiliary register (use AR0-AR7)Invalid character %s before %s operandInvalid character %s in %s operandInvalid character %s in opcodeInvalid combination of instructions for bundle.Invalid constant operand %sInvalid default architecture, broken assembler.Invalid destination register for this instruction, use 'tfr'.Invalid destination register.Invalid directiveInvalid displacement in indirect referenceInvalid dmad syntax '%s'Invalid duplicate use of `%c%d'Invalid expression after # number
Invalid expression after %%%%
Invalid expression.Invalid field selector.  Assuming F%%.Invalid field size, must be from 1 to 32Invalid floating point numberInvalid immediate write operand.Invalid indexed indirect mode.Invalid indexed register, expecting register X.Invalid indexed register, expecting register Y.Invalid indexed register.Invalid indirect addressing modeInvalid indirect addressing mode displacement %dInvalid instruction %sInvalid instruction: "%s"Invalid label '%s'Invalid left/right combination completerInvalid length (use 0 to %d)Invalid mnemonic '%s'Invalid mode: %s
Invalid numberInvalid offset value for %sInvalid opcode/operandsInvalid operand (s) for parallel instruction "%s"Invalid operand (use 1, 2, or 3)Invalid operand for `%s'Invalid operand for register offsetInvalid operand: immediate value used as address.Invalid operand: immediate value used as base address.Invalid operandsInvalid operands %sInvalid operands for %sInvalid operation on symbolInvalid operator for operand.Invalid or illegal addressing mode combined with scaled-indexInvalid pc-relative relocationInvalid permutation completerInvalid record type for P3 format.Invalid record type for format B1Invalid record type for format P6Invalid record type for format X1Invalid record type for format X3Invalid register for dbcc/tbcc instruction.Invalid register for post/pre increment.Invalid register for postdecrement operationInvalid register for predecrement operationInvalid register for preincrement operationInvalid register for single precision fmpyadd or fmpysubInvalid register in register listInvalid register list for ldm/stm
Invalid register number at '%.6s'Invalid register specification.Invalid register.Invalid register: 'r%d'Invalid register: r0 and r15 illegalInvalid relocationInvalid scaled-indexed mode, use (b,w,d,q)Invalid simultaneous use of `f%d' and `f%d'Invalid source register for this instruction, use 'tfr'.Invalid source register.Invalid status register "%s"Invalid subscript (use 1 to %d)Invalid suffix for literal pool entryInvalid syntax in External addressing modeInvalid syntax in Memory Relative addressing modeInvalid syntax in PC-relative addressing modeInvalid use of `%c%d' as output operandInvalid use of `r%d' as base update address operandInvalid use of parallelization operator.Invalid width value for %sJALX to a symbol in the same ISA modeJump/Branch instruction detected at the end of the ZOL label @%sJunk after '}': '%s'Junk at end of line, %s.Kernel instruction detected at the end of the ZOL label @%sKnown MCU names:LDP instruction needs a 24-bit operandLOC expression stepping backwards is not supportedLOC to section unknown or indeterminable at first passLR and PC should not both be in register listLabel "$%d" redefinedLabel "%s" matches a CPU register nameLabel must be first in a bundleLabel required for .tagLeading plus sign not allowed in core modeLength of .comm "%s" is already %ld. Not changed to %d.Length of .comm "%s" is already %ld. Not changed to %ld.Length of .lcomm "%s" is already %ld. Not changed to %ld.Length of .scomm "%s" is already %ld. Not changed to %ld.Length specification ignored. Address mode 9F usedLine %d: unknown relocation type: 0x%x.Line numbers must be positive integers
Literal loadsLong instructions may not be combined.Low order bits truncated in immediate float operandM340 specific opcode used when assembling for M210MCORE specific options:
  -{no-}jsri2bsr	  {dis}able jsri to bsr transformation (def: dis)
  -{no-}sifilter	  {dis}able silicon filter behavior (def: dis)
  -cpu=[210|340]          select CPU type
  -EB                     assemble for a big endian system (default)
  -EL                     assemble for a little endian system
MCU option requires a name
MDRD value must be between 1 and 8MIPS PIC call to register other than $25MIPS options:
-EB			generate big endian output
-EL			generate little endian output
-g, -g2			do not remove unneeded NOPs or swap branches
-G NUM			allow referencing objects up to NUM bytes
			implicitly with the gp register [default 8]
MN10200 options:
none yet
MN10300 assembler options:
none yet
MRI style ORG pseudo-op not supportedMSP430 options:
  -mmcu=<msp430-name>     - select microcontroller type
  -mcpu={430|430x|430xv2} - select microcontroller architecture
MT specific command line options:
MU instruction may not be in the right containerMacro %s not implementedMacro `%s' was already definedMaverick DSPSC register expectedMaverick MVAX register expectedMaverick MVD register expectedMaverick MVDX register expectedMaverick MVF register expectedMaverick MVFX register expectedMaximum %d bits may be set in `mask16' operandMeP specific command line options:
  -EB                     assemble for a big endian system
  -EL                     assemble for a little endian system (default)
  -mconfig=<name>         specify a chip configuration to use
  -maverage -mno-average -mmult -mno-mult -mdiv -mno-div
  -mbitops -mno-bitops -mleadz -mno-leadz -mabsdiff -mno-absdiff
  -mminmax -mno-minmax -mclip -mno-clip -msatur -mno-satur -mcop32
                          enable/disable the given opcodes

  If -mconfig is given, the other -m options modify it.  Otherwise,
  if no -m options are given, all core opcodes are enabled;
  if any enabling -m options are given, only those are enabled;
  if only disabling -m options are given, only those are disabled.
Memory mapped register "%s" out of rangeMiscellaneous 16-bit instructionsMisplaced .entry. Ignored.Missing '(' after substitution symbol functionMissing ')'Missing ')' in subscripted substitution symbol expressionMissing ','Missing '}' at end of fileMissing '}': '%s'Missing )Missing ) in ra(rb)Missing .EXIT for a .ENTRYMissing .callinfoMissing .callinfo for this procedureMissing .callinfo.Missing .endp after previous .procMissing .exit
Missing .label_state %ldMissing .procend
Missing Branch On Bit ConditionMissing `]' to close indexed-indirect mode.Missing `]' to close register indirect operand.Missing arguments for opcode <%s>.Missing forced substitution terminator ':'Missing function name for .PROCMissing function name for .PROC (corrupted label chain)Missing label name on .LABELMissing macro nameMissing matching brackets : `%s'Missing operandMissing operand.Missing parameter qualifier for `%s' in macro `%s'Missing predicate relation typeMissing second register for indexed-indirect mode.Missing second register or offset for indexed-indirect mode.Missing section nameMissing size argumentMissing symbol name in directiveMissing value for required parameter `%s' of macro `%s'Mixing of normal and extended addressing not supportedMixing register syntax, with and without '$'.More than one AR register found in indirect referenceMore than one displacement found in indirect referenceMore than one relocation op per insnMotorola 68HC11/68HC12/68HCS12 options:
  -m68hc11 | -m68hc12 |
  -m68hcs12 | -mm9s12x |
  -mm9s12xg               specify the processor [default %s]
  -mshort                 use 16-bit int ABI (default)
  -mlong                  use 32-bit int ABI
  -mshort-double          use 32-bit double ABI
  -mlong-double           use 64-bit double ABI (default)
  --force-long-branches   always turn relative branches into absolute ones
  -S,--short-branches     do not turn relative branches into absolute ones
                          when the offset is out of range
  --strict-direct-mode    do not turn the direct mode into extended mode
                          when the instruction does not support direct mode
  --print-insn-syntax     print the syntax of instruction in case of error
  --print-opcodes         print the list of instructions with syntax
  --xgate-ramoffset       offset ram addresses by 0xc000
  --generate-example      generate an example of each instruction
                          (used for testing)
Multiple .cpu directives foundMultiple BFD_RELOC_NDS32_PTR_RESOLVED patterns are not supported yet!Multiply instructions supportMust be in a space before changing or declaring subspaces.
NS32K options:
-m32032 | -m32532	select variant of NS32K architecture
--disp-size-default=<1|2|4>
NaNs are not supported by this target
Name   # Modes  Min ops  Max ops  Modes mask  # Used
Nan, using zero.Need #1 or #2 hereNeon double or quad precision register expectedNeon quad precision register expectedNeon single or double precision register expectedNested proceduresNo !literal!%ld was foundNo !tlsgd!%ld was foundNo !tlsldm!%ld was foundNo .ENTRY for this .EXITNo addend allowed in @fptr() relocationNo comma after .pdesc <entryname>No compiled in support for %d bit object file formatNo current frameNo instruction foundNo instruction or missing opcode.No lda !gpdisp!%ld was foundNo ldah !gpdisp!%ld was foundNo operatorNo relocation operandNo such entry in list. (cpu/mmu register)No such opcodeNo symbol after .code_addressNo symbol after .linkageNo valid label relocation operandNon-absolute symbol: '%s'.Non-constant symbols not allowed
Non-global symbol: '%s' can't be a weak_definition.Not a defined coldfire architectureNot a function typeNot a symbolic expressionNot enough operandsNot in a space.
Not in a subspace.
Not support instruction %s in verbatim.Number of elements must be positiveNumber too largeOPF immediate operand out of range (0-0x1ff)Odd numbered register used as target of multi-register instructionOffset is outside of 15 bit rangeOffset on nested structures is ignoredOffset out of 16-bit range for movw/movb insn: %ldOffset out of 16-bit range: %ld.Offset out of 5-bit range for movw/movb insn: %ldOffset out of 5-bit range for movw/movb insn: %ld.Offset out of 9-bit range for movw/movb insn: %ldOne of these instructions may not be executed in parallel.Only constant offsets are supportedOnly constant space allocation is supportedOnly one .compiler pseudo-op per file!Only one .copyright pseudo-op per file!Only one .version pseudo-op per file!Only one comparison conditional allowedOnly one overflow conditional allowedOnly the first path encountering the conflict is reportedOpcode %s not available in this modeOpcode `%s' is not recognized.Opcode `%s' with these operand types not available in %s modeOpcode `%s' with these operand types not available in H8/300 modeOpcode `%s' with these operand types not available in H8/300H modeOpcode `%s' with these operand types not available in H8/300S modeOpcode(%d.%s): Operand "%s" out of range (use 1 or 2)Operand %d to .%s must be a constantOperand %d to .%s must be a preserved registerOperand %d to .%s must be a writable registerOperand %u of `%s' should be %sOperand '%s' out of range (%d <= x <= %d)Operand `%x' not recognized in fixup16.Operand `%x' not recognized in fixup8.Operand has odd displacement (arg %d)Operand is not a constant. `%s'Operand mismatchOperand of .vframe contradicts .prologueOperand out of 16-bit range: `%ld'.Operand out of 8-bit range: `%ld'.Operand out of range (arg %d)Operand out of range for a relative branch: `%ld'Operand out of range, %s.Operand to .copy_state must be a constantOperand to .label_state must be a constantOperand to .save.f must be a positive 20-bit constantOperand to .spill must be a constantOperand to .vframesp must be a constant (sp-relative offset)Operand value is not within upper 64 KB (arg %d)Operands to .save.gf may not be both zeroOperator may only be applied to symbols.Option -b is depreciated, please use -mbigOption -p is depreciated, please use -mmemparmOption -r is depreciated, please use -mregparmOption -s is depreciated, please use -msmallOption `%s' is not recognized.Options:
  -a[sub-option...]	  turn on listings
                      	  Sub-options [default hls]:
                      	  c      omit false conditionals
                      	  d      omit debugging directives
                      	  g      include general info
                      	  h      include high-level source
                      	  l      include assembly
                      	  m      include macro expansions
                      	  n      omit forms processing
                      	  s      include symbols
                      	  =FILE  list to FILE (must be last sub-option)
Out-of-range .word offset handling is not implemented for .arch common_v10_v32Overflow in expression, truncated to 16 bitsOverflow in expression, truncated to 8 bitsOverwrite explicitly set Tag_ARC_ABI_rf16 to full register fileOverwrite explicitly set Tag_ARC_CPU_basePC not allowed in register listPC part of operand unpredictablePC relative branch to label %s which is not in the instruction spacePC relative relocation not allowed for (internal) type %dPC used as an argument to RPTPC, CT, TR and TT are treated as if they are a single unit but operands must be in different unitsPC-relative access out of rangePC-relative access to misaligned address (%lx)PC-relative access using misaligned offset (%lx)PC-relative access using misaligned symbol (%lx)PC-relative offset not 4-byte-alignedPC-relative offset out of rangePC-relative reference to a different sectionPC-relative relocation must be trivially resolvedPIC code offset overflow (max 16 signed bits)PIC code offset overflow (max 32 signed bits)PIC relocation size does not match operand sizePJ options:
-little			generate little endian code
-big			generate big endian code
PRU options:
  -mlink-relax     generate relocations for linker relaxation (default).
  -mno-link-relax  don't generate relocations for linker relaxation.
Parallel opcode cannot contain more than two instructionsParameter named `%s' does not exist for macro `%s'Parameters of an existing subspace can't be modifiedParse failed.Performance extensionPerformance extension 2Perhaps you are missing %%tpoff()?Please report this bug.
Please use --help to see usage and options for this assembler.
Pointless default value for required parameter `%s' in macro `%s'Pointless use of p0 as first operand to .%sPointless use of zero first operand to .prologuePost-decrement mode is not valid for 68HC11.Post-increment mode is not valid for 68HC11.PowerPC options:
-a32                    generate ELF32/XCOFF32
-a64                    generate ELF64/XCOFF64
-u                      ignored
-mpwrx, -mpwr2          generate code for POWER/2 (RIOS2)
-mpwr                   generate code for POWER (RIOS1)
-m601                   generate code for PowerPC 601
-mppc, -mppc32, -m603, -m604
                        generate code for PowerPC 603/604
-m403                   generate code for PowerPC 403
-m405                   generate code for PowerPC 405
-m440                   generate code for PowerPC 440
-m464                   generate code for PowerPC 464
-m476                   generate code for PowerPC 476
-m7400, -m7410, -m7450, -m7455
                        generate code for PowerPC 7400/7410/7450/7455
-m750cl, -mgekko, -mbroadway
                        generate code for PowerPC 750cl/Gekko/Broadway
-m821, -m850, -m860     generate code for PowerPC 821/850/860
Pre-increment mode is not valid for 68HC11Predicate register expectedPredicate source and target requiredPremature end of suffix -- Defaulting to dPrevious .save incompleteProcessor variants are: Prohibited register used for reduced-register, %s.Pseudocode already used %sPseudodirective .file is only valid when generating ELFPseudodirective .loc is only valid when generating ELFQUICKRoT 64-bit extension not applicable to this instructionQUICKRoT extension requires 4 registersQualifying predicate expectedRA register is saved twice.RC/SAE operand must follow immediate operandsRC/SAE operand must precede immediate operandsRDRD, (RI,#offs5)RD,RSRI, #imm4RISC-V options:
  -fpic          generate position-independent code
  -fno-pic       don't generate position-independent code (default)
  -march=ISA     set the RISC-V architecture
  -mabi=ABI      set the RISC-V ABI
  -mrelax        enable relax (default)
  -mno-relax     disable relax
  -march-attr    generate RISC-V arch attribute
  -mno-arch-attr don't generate RISC-V arch attribute
Radix `%s' unsupported or invalidRd and Rm should be different in mlaRd and Rm should be different in mulReduced Register configuration (GPR16) optionRedundant `#' suffix operatorsReg not valid for H8/300Register at (r1) can sometimes be corrupted by assembler optimizations.
Use .set noat to turn off those optimizations (and this warning).Register must be R0--R7Register must be RnRegister must be address registerRegister must be ivtp or tvtpRegister name %s conflicts with symbol of the same nameRegister name expectedRegister number (R%ld) for double word access must be even.Register number must be EVENRegister number out of range 0..%uRegister symbol %s already defined.Register value annotation ignoredRegisters cannot be used as a prefix of indexed expression [%s]Registers cannot be used within absolute expression [%s]Registers cannot be used within immediate expression [%s]Relaxation should never occurRelaxation to long branches for .arch common_v10_v32 not implementedReloc %d not supported by object file formatRelocatable values require at least WORD storageRelocation %d is not supported by object file format.Relocation %s is not safe for %sRelocation doesn't fit. (relocation value = 0x%lx)Relocation supported only in FDPIC modeReport bugs to %s
Reserved word `%s' used as parameter in macro `%s'Rn must not overlap other operandsRotating register index must be a non-negative constantS+core co-processor register expectedS+core register expectedS+core special-register expectedSH options:
--little		generate little endian code
--big			generate big endian code
--relax			alter jump instructions for long displacements
--renesas		disable optimization with section symbol for
			compatibility with Renesas assembler.
--small			align sections to 4 byte boundaries, not 16
--dsp			enable sh-dsp insns, and disable floating-point ISAs.
--allow-reg-prefix	allow '$' as a register name prefix.
--isa=[any		use most appropriate isa
    | dsp               same as '-dsp'
    | fpSHF_ALLOC isn't set for GNU_MBIND section: %sSIMD scalar or floating-point register expectedSMC is not permitted on this architectureSP and PC not permitted in .unwind_movsp directiveSP not allowed in register listSPARC options:
SPU options:
  --apuasm		  emulate behaviour of apuasm
SRS base register must be r13SSE instruction `%s' is usedSVC is not permitted on this architectureSVE predicate register expectedSVE vector register expectedSYMBOL TABLE not implementedS^# may only read-accessS^# needs expressionSame src/dest register is used (`r%d'), result is undefinedSame src/dest register is used (`r%d'),result is undefinedScaled-indexed addressing mode combined with scaled-indexSecond operand of .save contradicts .prologueSecond operand to .%s not a constantSecond operand to .prologue must be a general registerSecond operand to .prologue must be the first of %d general registersSecond operand to .restore must be a constant >= 0Second operand to .save not a valid registerSecond operand to .save.b must be a general registerSecond operand to .save.b must be the first of %d general registersSecond operand to .save.g must be a general registerSecond operand to .save.g must be the first of %d general registersSecond operand to .save.gf must be a non-negative 20-bit constantSecond operand to .unwabi must be a constantSection switching in code is not supported.Semantics error.  This type of operand can not be relocated, it must be an assembly-time constantShift value > 32. using <value %% 32>Shift value should be in the range [0,31]Short branches, Undefined, SVC, LDM/STMShort literal overflow(%ld.), immediate mode assumed.Signed immediate value %ld too largeSize of frame exceeds maximum of 96 registersSize of rotating registers exceeds frame sizeSomething forgot to clean up
Source and destination register should not be equalSource register for %s is no larger than the destination registerSource registers must be in the same unitSpurious `,' or bad indirect register addressing mode.Spurious operands; (%d operands/instruction max)Standalone `#' is illegalString extensionSubstitution symbols must begin with a letterSubtype %d is not recognized.Sunplus-v2-0-0-20060510
Support for 64-bit arithmetic not compiled in.Supported ARCH values are:Swapping instruction orderSymbol %s used as immediate operand in PIC mode.Symbol '%s' could not be created.Symbol `%s' can not be both weak and commonSymbol expectedSymbol missing
Symbol missing for .set/.equSymbol used as immediate for mbar instructionSymbol used as immediate for shift instructionSymbol used as immediate value for msrset/msrclr instructionsSyntax in scaled-indexed mode, use [Rn:m] where n=[0..7] m={b,w,d,q}TLS relocation against a constantTLS relocation not allowed in FLIX bundleTLS relocation size does not match operand sizeTLS_*_S9 relocs are not supported yetTMS320C6000 options:
TOC section size exceeds 64kTOKEN TRACE not implementedTag must come before qualifying predicate.Tag name expectedTags on unwind pseudo-ops aren't supported, yetTarget processor does not support this instruction.The ".%s" pseudo-op is not implemented
The %s operand doesn't matchThe .BTEQU pseudo-op is not implemented.The .DEFINE pseudo-op is not implementedThe .ENTER pseudo-op is not supportedThe .LEAVE pseudo-op is not supportedThe .MACRO pseudo-op is not implementedThe 64 bit file format is used without esame instructions.The debugger will corrupt bt (r25).
If you don't need to debug this code use .set nobreak to turn off this warning.The debugger will corrupt sstatus/ba (r30).
If you don't need to debug this code use .set nobreak to turn off this warning.The following ARC-specific assembler options are deprecated and are accepted
for compatibility only:
The input '%s' and output '%s' files are the sameThe option "--no-allow-flix" prohibits multi-slot flix.The trap id must be a constant.This architecture doesn't support atomic instructionThis architecture doesn't support mmuThis assembler does not support processor generation %ldThis assembler was configured for a target of `%s' and default,
cpu type `%s'.
This assembler was configured for a target of `%s'.
This coprocessor register access is deprecated in ARMv8This instruction may be unpredictable if executed on M-profile cores with interrupts enabled.This is the location of the conflicting usageThis operator only produces two byte values.This program is free software; you may redistribute it under the terms of
the GNU General Public License version 3 or later.
This program has absolutely no warranty.
Thumb does not support NOP with hintsThumb does not support conditional executionThumb does not support negative register indexingThumb does not support register indexing with writebackThumb does not support register post-indexingThumb does not support the 2-argument form of this instructionThumb does not support this addressing modeThumb encoding does not support an immediate hereThumb encoding does not support rotationThumb load/store multiple does not support {reglist}^Thumb supports only LSL in shifted register indexingThumb-2 MUL must not set flagsThumb-2 instruction only valid in unified syntaxThumb2 branch out of rangeToo few operands to '%s'.Too many argument. `%s'Too many instructions for bundle.Too many operandsToo many operands passed to instructionToo many operands scannedToo many operands: %sToo many registers poppedTrap id `%ld' is out of range.Trap id must be within [0x30..0x39] or [0x40..0xff].Treating '%-*s' as a symbol.Tried to .set unrecognized mode `%s'Tried to convert PC relative branch to absolute jumpTwo IU instructions may not be executed in parallelTwo MU instructions may not be executed in parallelTwo instructions in the same bundle both write to register %s, which is not allowed.Unable to allocate memory for new instructions
Unable to determine default target processor from string: %sUnable to find %s relocation for instruction %sUnable to generate `%s' compliant code without mthc1Unable to mix instructions as specifiedUnable to parse TLS base: %sUnable to process relocation for thumb opcode: %lxUnable to produce reloc against symbol '%s'Unable to use @pcl relocation for insn %sUnable to use @plt relocation for insn %sUnaligned operand. Needs to be 16bit alignedUnaligned operand. Needs to be 32bit alignedUnary operator %c ignored because bad operand followsUnbalanced parenthesis in %s operand.Unbalanced parenthesis in operand %dUndefined .EXPORT/.IMPORT argument (ignored): %sUndefined absolute constant: '%s'.Undefined register: '%s'.Undefined space: '%s' Assuming space number = 0.Undefined substitution symbol '%s'Unexpected branch conversion with `%x'Unexpected character '%c' after operand %d to %s.Unexpected reference to a symbol in a non-code sectionUnexpected return value [%d] from parse_toc_entry!
Unhandled dependency %s for %s (%s), note %dUnhandled reloc typeUnimplemented register `%s' specifiedUnknown .syntax operandUnknown CPU identifier `%s'Unknown TMS320C30 instruction: %sUnknown cpu -mcpu=%sUnknown exception: `%s'Unknown extensionUnknown indirect addressing modeUnknown instruction '%s'Unknown opcode `%.*s'.Unknown opcode `%s'Unknown opcode `%s'.Unknown opcode: `%s'Unknown operatorUnknown processor register (32 bit) : `%d'Unknown processor register : `%d'Unknown psr option `%s'Unknown register pair - index relative mode: `%d'Unknown register pair: `%d'Unknown register: `%d'Unknown reloc in md_apply_fix: %sUnknown relocation encountered in md_apply_fix.Unknown relocation operand: !%sUnknown relocation operand: @%sUnknown segment typeUnknown size of floating point registersUnknown typeUnknown type %c
Unmatched high relocationUnmatched high/shigh relocUnrecognised CPU errata name starting here: %sUnrecognised option: -hiddenUnrecognized .LEVEL argument
Unrecognized .option directive: %s
Unrecognized .type argumentUnrecognized condition code "%s"Unrecognized dependency specifier %d
Unrecognized field type '%c'Unrecognized indirect address format "%s"Unrecognized instruction "%s"Unrecognized opcode format: `%s'Unrecognized opcode, %s.Unrecognized opcode: `%s'Unrecognized operand list '%s' for instruction '%s'Unrecognized operand/register, %s.Unrecognized option '-x%s'Unrecognized option following -KUnrecognized or unsupported floating point constantUnrecognized parallel instruction "%s"Unrecognized parallel instruction '%s'Unrecognized parallel instruction combination "%s || %s"Unrecognized predicate relation typeUnrecognized section '%s'Unrecognized status bit "%s"Unrecognized struct/union tag '%s'Unrecognized substitution symbol functionUnrecognized version '%s'Unsigned immediate value %ld too largeUnsupported RISC-V relocation number %dUnsupported broadcast: `%s'Unsupported fixup size %dUnsupported instruction set extension: %sUnsupported operation on relocUnsupported processor generation %dUnsupported relocation size %dUnsupported use of %sUnsupported use of .gpwordUnsupported use of spUnterminated string after absolute expressionUnwind directive not followed by an instruction.Usage: %s [option...] [asmfile...]
Use of .def/.ref is deprecated.  Use .global insteadUse of PC here is UNPREDICTABLEUse of PC here is deprecatedUse of an RX string instruction detected in a file being assembled without string instruction supportUse of p0 is not valid in this contextUse of r%u as a source register is deprecated when r%u is the destination register.Use the .mmregs directive to use memory-mapped register names such as '%s'Used $at without ".set noat"Used FPU instructions requires enabling FPU extensionUsed more than the available 48 rotating registersUsed more than the available 96 rotating registersUsed more than the declared %d rotating registersUsing ENTRY rather than CODE in export directive for %sUsing a constant as second operand to .prologue is deprecatedUsing old style, %%hi(expr), please change to PPC style, expr@h.Using old style, %%lo(expr), please change to PPC style, expr@l.Using temp register (r1)Using temp register(r1)VAX options:
-d LENGTH		ignored
-J			ignored
-S			ignored
-t FILE			ignored
-T			ignored
-V			ignored
VFP registers must be adjacentVFP single or double precision register expectedVFP single precision register expectedVFP single, double or Neon quad precision register expectedVFP system register expectedVFP/Neon double precision register expectedVIP_BEGIN error:%sVLIW packing constraint violationVLIW packing used for -mno-packVMS options:
-+			encode (don't truncate) names longer than 64 characters
-H			show new symbol after hash truncation
-replace/-noreplace	enable or disable the optimization of procedure calls
VMS options:
-+			hash encode names longer than 31 characters
-1			`const' handling compatible with gcc 1.x
-H			show new symbol after hash truncation
-h NUM			don't hash mixed-case names, and adjust case:
			0 = upper, 2 = lower, 3 = preserve case
-v"VERSION"		code being assembled was produced by compiler "VERSION"
Value %d and %d out of rangeValue %d doesn't fit in signed %d-bit fieldValue %d doesn't fit in unsigned %d-bit fieldValue %ld not aligned by 2 for 10-bit PC-relative branch.Value %ld not aligned by 2 for 9-bit PC-relative branch.Value %ld too large for 10-bit PC-relative branch.Value %ld too large for 8-bit PC-relative branch.Value %ld too large for 9-bit PC-relative branch.Value for ENTRY_FR must be in the range 12..21
Value for ENTRY_GR must be in the range 3..18
Value for ENTRY_SR must be 3
Value for parameter `%s' of macro `%s' was already specifiedValue not in 16 bit range: %ldValue not in 16 bit signed range: %ldValue not in 4 bit unsigned range: %ldValue not in 5 bit unsigned range: %ldValue not in 6 bit range: %ldValue not in 6 bit unsigned range: %ldValue not in 8 bit range: %ldValue not in 8 bit signed range: %ldValue out of 16-bit range.Value out of 3-bit range.Value out of 4-bit range.Value out of 5-bit range.Value truncated to 62 bitsVariable is accessed using small data read only anchor, but it is not in the small data read only sectionVariable is accessed using small data read write anchor, but it is not in the small data read write sectionVery short instr to option, ie you can't do it on a NULLstrVirtual memory exhaustedWarning: Warning: conditional outside an IT block for Thumb.Warning: duplicated register (r%d) in register listWarning: internal error: forgetting to set endndx of %sWarning: register range not in ascending orderWrites to register '%s' are not allowed.Wrong displacement %dWrong number of input operandsWrong number of operandsWrong number of output operandsWrong numbers of operands in default, check ns32k-opcodes.hWrong register in floating-point reglistWrong register in register indirect mode.Wrong size pointer register for architecture.XScale accumulator register expectedXtensa absolute literals option not supported; ignored[-mwarn-syms]: Assignment makes a symbol match an ARM instruction: %s[0-9]H labels do not mix with dot-pseudos[0-9]H labels may not appear alone on a line[PC] index banned[]index same as ()+register: unpredictable[]index same as -()register: unpredictable[no-]generics is deprecated; use [no-]transform instead[no-]relax is deprecated; use [no-]transform instead[tocv] symbol is not a toc symbol`%s %d' after `%s %d' from %s:%u`%s %d' but no chunk open yet`%s%s' can't be used for write mask`%s%s' not allowed with `%s%c'`%s' Illegal count-register combination.`%s' Illegal use of register.`%s' Illegal use of registers.`%s' and `%s' can't be undefined in `%s' - `%s'`%s' can't be equated to common symbol `%s'`%s' can't be undefined in `%s' - `%s' {%s section}`%s' can't be undefined in `%s' {%s section} - `%s'`%s' can't be versioned to common symbol '%s'`%s' can't go in %s of %s template`%s' cannot be predicated`%s' cannot be used here`%s' cannot be used with `%s'`%s' does not fit into %s template`%s' does not fit into bundle`%s' does not support legacy NaN`%s' has undefined result`%s' is already the alias of %s `%s'`%s' is deprecated, use `%s'`%s' is not a valid %s expression`%s' is not a valid parameter qualifier for `%s' in macro `%s'`%s' is not supported in 64-bit mode`%s' is not supported on `%s%s'`%s' is not supported on `%s'`%s' is not valid here (expected `%c%s%s%c')`%s' is only supported in 64-bit mode`%s' must be last in bundle`%s' must be last in instruction group`%s' operand %d must use `%ses' segment`%s' should be an operand to this .endp`%s' symbol without preceding function`%s' was already defined`%s' was already used as parameter (or another local) name`%s' was not defined within procedure`%s' was not specified with previous .proc`&' serial number operator is not supported`)' required`,' required`af' must appear alone`fp=32' used with a 64-bit ABI`fp=32' used with a MIPS R6 cpu`fp=64' used with a 32-bit ABI`fp=64' used with a 32-bit fpu`fp=xx' cannot be used with `singlefloat'`fp=xx' used with a cpu lacking ldc1/sdc1 instructions`gp=32' used with a 64-bit ABI`gp=64' used with a 32-bit ABI`gp=64' used with a 32-bit processor`nooddspreg` cannot be used with a 64-bit ABI`noreorder' must be set before `nomacro'a bignum with underscores may not have more than 8 hex digits in any worda bignum with underscores must have exactly 4 wordsa destination register must be supplieda different %s was already specified, is now %sa register has no addressa reloc on this operand implies an overflowaccumulator not a valid destinationaddend used with $DSBT_INDEXaddress calculation needs a strongly defined nearby symboladdress offset must be half word alignmentaddress offset must be word alignmentaddress prohibits #address prohibits ()address prohibits ()+address prohibits -()address prohibits @address prohibits []address prohibits displacement length specifieraddress prohibits registeraddress too high for vector table jmp/jsraddress units must be one of %saddressing mode not supportedalias = %s
align value not recognized, using sizealignment is not a positive numberalignment is not a power of 2alignment must be constantalignment negative, 0 assumedalignment negative; 0 assumedalignment not a power of 2alignment padding (%lu byte) not a multiple of %ldalignment padding (%lu bytes) not a multiple of %ldalignment too large, %d assumedalignment too large: %u assumedalignment too large; %d assumedalignments greater than %d bytes not supported in .text sections.already assembled instructionsambiguous flags combination - '.profiler' directive ignored.ambiguous memory operand size for `%s`ambiguous operand size for `%s'an .indirect_symbol must be in a symbol pointer or stub section.architectural extension `%s' is not allowed for the current base architecturearchitectural extensions must be specified in alphabetical orderarchitecture `%s' unrecognizedarchitecture bumped from "%s" to "%s" on "%s"architecture features both enabled and disabledarchitecture variant invalidassemble Thumb codeassemble for big-endianassemble for little-endianassembly 0x%08x, expected %sassembly state not set for first frag in section %sassuming %s on symbolassuming all members of group `%s' are COMDATat most %d displacement operands are allowedat most %d immediate operands are allowedattaching copyright header %s: %sattaching version header %s: %sattempt to .org/.space/.nops backwards? (%ld)attempt to .space/.bes backwards? (%ld)attempt to add an indirect_symbol to a stub or reference section with a zero-sized element at %sattempt to allocate data in absolute sectionattempt to allocate data in common sectionattempt to fill absolute section with non-zero valueattempt to fill section `%s' with non-zero valueattempt to get value of unresolved symbol `%s'attempt to move .org backwardsattempt to re-define symbol `%s'attempt to recreate an unwind entryattempt to redefine `%s' with a different lengthattempt to redefine pseudo-op `%s' ignoredattempt to redefine symbolattempt to redefine typed aliasattempt to store float in absolute sectionattempt to store float in section `%s'attempt to store non-empty string in section `%s'attempt to store non-zero value in section `%s'attempt to store value in absolute sectionattempt to use an ARM instruction on a Thumb-only processor -- `%s'backward ref to unknown label "%d:"bad .common segment %sbad .fmask directivebad .frame directivebad .longcall formatbad .mask directivebad .mask/.fmask directivebad .nan directivebad .relax formatbad .reserve segment -- expected BSS segmentbad .section directive: want a,e,v,w,x,M,S,G,T in stringbad .section directive: want a,l,w,x,M,S,G,T in stringbad .section directive: want a,o,s,w,x,M,S,G,T in stringbad .section directive: want a,s,w,x,M,S,G,T in stringbad .section directive: want a,v,w,x,M,S in stringbad .section directive: want a,w,x,M,S,G,T in stringbad .uses formatbad .weakext directivebad COFF debugging informationbad FUNCT field specifier 'F%c'
bad Opcode field specifier 'O%c'
bad RVC field specifier 'C%c'
bad alignmentbad argument to %s_check directive.bad argument to syntax directive.bad arguments to instructionbad base register: must be r0bad bitmask specified after APSRbad call to MD_ATOF()bad call to md_atofbad combined pmuls output operandbad compressed FUNCT field specifier 'CF%c'
bad coprocessor idbad defsym; format is --defsym name=valuebad element type for instructionbad escaped character in stringbad expressionbad expression syntaxbad floating literal: %sbad floating-point constant: exponent overflowbad floating-point constant: unknown error code=%dbad format for ifc or ifncbad format of OPT NEST=depthbad frag at %p : fix %ld addr %ld %ld 
bad functional unit for operand %u of '%.*s'bad immediate value for 8-bit offset (%ld)bad immediate value for offset (%ld)bad instruction `%s'bad instruction formatbad instruction syntaxbad list lengthbad list length for table lookupbad list type for instructionbad memory operand `%s'bad number of operands to '%.*s'bad offset 0x%08lX (must be an 8-bit number of words)bad offset 0x%08lX (must be word-aligned)bad offset 0x%08lX (only 12 bits available for the magnitude)bad offset 0x%08lX (only 8 bits available for the magnitude)bad opcode or operandsbad operand %u of '%.*s'bad operand combination for '%.*s'bad or irreducible absolute expressionbad or irreducible absolute expression; zero assumedbad or missing co-processor numberbad or unhandled relocation type: 0x%02xbad personality routine numberbad predicate '%s'bad range in register listbad register expressionbad register for mrsbad register for operand %u of '%.*s'bad register for post-indexbad register in []bad register listbad register list: %sbad register name `%s'bad register name: %sbad register number: %sbad register or register pair for operand %u of '%.*s'bad register pair for operand %u of '%.*s'bad register rangebad relaxation statebad reloc expressionbad relocation expression for '%s'bad relocation fixup type (%d)bad segmentbad size %d in type specifierbad size %d in vector width specifierbad starting register: r0 and r15 invalidbad string constantbad symbol suffixbad type for registerbad type for scalarbad type in Neon instructionbad value (%s) for %sbad value for funct2 field, value must be 0...3bad value for funct3 field, value must be 0...7bad value for funct4 field, value must be 0...15bad value for funct6 field, value must be 0...64bad value for funct7 field, value must be 0...127bad value for opcode field, value must be 0...127 and lower 2 bits must be 0x3bad value for opcode field, value must be 0...2bad vector arrangement typebad/missing psr specifierbadly formed .dim directivebadly formed .dim directive ignoredbadly formed .size directivebadly formed .weak directive ignoredbadly formed expression near %sbase and offset must be from the same unitbase register expectedbase register specified but zerobase register written back, and overlaps one of transfer registersbase register written back, and overlaps second transfer registerbase unit must be either A0 or A1base unit must be one of %sbfd-target = %s
bfd_set_section_flags: %sbignum invalidbignum invalid; zero assumedbignum truncated to %d bytebignum truncated to %d bytesbit-field extends past end of registerblx to '%s' an ARM ISA state function changed to blblx to Thumb func '%s' from Thumb ISA state changed to blboth insns for !gpdisp!%ld must be in the same sectionbr_gr record before region record!br_mem record before region record!bra or bsr with undefined symbol.branch %s is always truebranch address range overflow (0x%lx)branch must be last instruction in IT blockbranch offset %d out of rangebranch offset %d out of range %d to %dbranch offset out of range
branch operand has odd offset (%lx)
branch out of rangebranch relaxation failed
branch relaxation is not supported in `%s'branch target frequency must be greater than 0branch target not word alignedbranch to a symbol in another ISA modebranch to misaligned address (0x%lx)branching or jumping to a loop end may trigger hardware erratabreak outside of structured loopbroadcast is needed for operand of such typebroken assembler, no assembly attemptedbyte count constant %ld is out of range [1..%d]byte displacement out of rangebyte or halfword not valid for base registercall target address 0x%08x out of range 0x%08x to 0x%08xcall to md_convert_frag
call to md_convert_frag 
call to md_estimate_size_before_relax
call to md_estimate_size_before_relax 
call to tc_aout_fix_to_chars 
can not do %d byte pc-relative relocationcan not do %d byte relocationcan not resolve expressioncan only load two consecutive registerscan only store two consecutive registerscan only transfer two consecutive registerscan't []index a register, because it has no addresscan't change index for operandcan't close %s: %scan't close `%s'can't create %s: %scan't create group: %scan't create relocationcan't create section %scan't encode register '%s%s' in an instruction requiring REX prefix.can't extend fragcan't extend frag %lu charcan't extend frag %lu charscan't fill %ld byte in section %s of %s: '%s'can't fill %ld bytes in section %s of %s: '%s'can't find fixup pointed to by .usescan't find opcodecan't find opcode can't find previous opcode can't handle expressioncan't handle generation of literal/labels yetcan't handle non absolute segment in `%s'can't handle undefined OP TYPEcan't hash %s: %scan't have relocation for ipushcan't make global register symbol `%s'can't mix positional and keyword argumentscan't mix relocation modifier with explicit shiftcan't open %s for reading: %scan't open %s: %scan't open `%s' for writingcan't open a bfd on stdout %scan't open macro library file '%s' for reading: %scan't predecrementcan't read from %s: %scan't redefine the index of a scalar aliascan't redefine the type of a register aliascan't redefine type for operandcan't represent relocation type %scan't resolve `%s' {%s section} - `%s' {%s section}can't resolve value for symbol `%s'can't set section flags for section %scan't start writing .mdebug section: %scan't use Neon quad register herecan't use R0 herecan't use alignment with this instructioncan't use high part of register in operand %dcan't use register '%s%s' as operand %d in '%s'.can't write %ld byte to section %s of %s: '%s'can't write %ld bytes to section %s of %s: '%s'cannot assemble DSP instruction, DSP option not set: %scannot assemble FPU instruction, FPU option not set: %scannot assemble into a literal fragmentcannot both predecrement and postincrementcannot branch to odd addresscannot change .bundle_align_mode inside .bundle_lockcannot change section or subsection inside .bundle_lockcannot combine index with optioncannot combine pre- and post-indexingcannot convert expression symbol %s to complex relocationcannot create 64-bit relocationcannot create floating-point numbercannot decode instruction formatcannot define symbol `%s' in absolute sectioncannot determine Thumb instruction size. Use .inst.n/.inst.w insteadcannot do %s %u byte relocationcannot do %u byte pc-relative relocationcannot do %u-byte relocationcannot emit PC relative %s relocation%s%scannot emit relocation %s against subsy symbol %scannot encode misaligned addend in the relocatable field (0x%lx)cannot encode opcode "%s"cannot encode opcode "%s" in the given format "%s"cannot find suitable trampolinecannot generate relocation type for symbol %s, code %scannot honor width suffix -- `%s'cannot make a relative jump to an absolute locationcannot mask instruction using no functional unitcannot override zerofill section type for `%s,%s'cannot pack %s and %s togethercannot pack %s and %s together with a 16-bit insncannot pack %s into slot P1cannot pack %s with a 16-bit insncannot represent %s relocation in object filecannot represent %s relocation in this object file formatcannot represent %s relocation in this object file format1cannot represent `%s' relocation in object filecannot represent relocation type %scannot represent relocation type %s in x32 modecannot resolve @slotcount parametercannot set literal_prefix inside literal fragmentcannot use `%s' in this sectioncannot use indirect addressing with the PCcannot use partial register %s for addressingcannot use post-indexing with PC-relative addressingcannot use post-indexing with this instructioncannot use register index with PC-relative addressingcannot use register index with this instructioncannot use writeback with PC-relative addressingcannot use writeback with this instructioncanonical = %s
character constant too largecharacter following name is not '#'cmpu doesn't support condition code %sco-processor offset out of rangeco-processor register expectedcode is ATPCS conformantcode uses 26-bit program countercode uses 32-bit program countercomma expected between operandscomma is  expectedcomma missing in .xstabscommon alignment not a power of 2comparison must be with register or #0condition code %s value (%d) too largecondition code invalid for jrcondition code register should be 0 or 4 for %s, was %dcondition code register should be even for %s, was %dcondition not followed by conditionalizable insncondition requiredcondition sa cannot be used hereconditional branch or jal insn's operand references R%ld of previous arithmetic or logic insn.conditional branch out of rangeconditional branch target not word alignedconditional infixes are deprecated in unified syntaxconditional instruction cannot use B flagconditional instruction cannot use G flagconditional instruction cannot use R flagconflicting ISA extension attributes.confusing relocation expressionsconfusion in formal parametersconstant doesn't fit in 4 bitsconstant expression expectedconstant expression or register list expectedconstant expression requiredconstant expression required.constant generator destination register found in %sconstant generator source register found in %sconstant offset requiredconstant out of 8-bit range: %dconstant shift amount requiredconstant too big to fit into instructionconstant value requiredcontrol register '%s' not supported on this architecturecontrol register expected, but saw '%.6s'convert_frag
core and copro insn lengths must total 32 bits.core and copro insn lengths must total 64 bits.core register %s value (%d) too largecould not assemble: %scould not build transition for %s => %scould not parse INSN_PATTERN '%s'could not parse INSN_REPL '%s'could not parse template definitioncould not set architecture and machinecould not skip to %ld in file `%s'could not update architecture and machinecould not write .mdebug section: %scouldn't find a valid instruction formatcouldn't find relocation to usecpu `%s' unrecognizedcpu-type = %s
cpu4: not converting PUSH #4 to shorter formcpu4: not converting PUSH #8 to shorter formcr%ld is a reserved control registerctoff() is not supported by the rh850 ABI. Use -mgcc-abi insteadctoff() relocation used on an instruction which does not support itcustom instruction opcode %u out of range %u to %ud0/d1 registersdangerous MULS/MULU location; give it higher alignmentdangling `__gcc_isr %d'dangling `__gcc_isr'data dependency: %s %s -- %s %s (%d/%d bubble)data in executable sectiondata item with alignment larger than locationdata size prefix invalid with `%s'data transfer register cannot be halfworddefault mask isn't alloweddest and source1 must be the same registerdest must overlap one source registerdestinationdestination for add/subtract can only be R2 or R3destination for multiply can only be R0 or R1destination operand must be 16 bit registerdestination operand must be 16bit absolute addressdestination operand must be 8 bit registerdestination register is same for parallel insnsdestination register modified by displacement-post-modified addressdestination register must be full-worddestination register must be r1destination register same as write-back basedestination register should be even numbereddestination unit must be RDdetected global register use not covered by .register pseudo-opdifference of two symbols only supported with .long, .short, or .bytedirective %s cannot be negateddirective .big encountered when option -big requireddirective .little encountered when option -little requireddirective LOC from within a BSPEC/ESPEC pair is not supporteddirective LOCAL must be placed in code or datadirectives are not valid inside bundlesdisable warnings about symobls that match instructionsdiscriminator less than zerodisplacement is too largedisplacement must be an unsigned 8-bit numberdisplacement overflows 12-bit fielddisplacement overflows 8-bit fielddisplacement to defined symbol %s overflows 12-bit fielddisplacement to defined symbol %s overflows 8-bit fielddisplacement to undefined symbol %s overflows 12-bit fielddisplacement to undefined symbol %s overflows 8-bit field displacement too large (%d)displacement too large for this architecture; needs 68020 or higherdiv / mul are reserved instructionsdivide by zerodivision by zerodivision by zero when setting `%s'dla used to load 32-bit register; recommend using la insteaddo not output verbose error messagesdo not warn on use of deprecated featuredoes not match begin %s%s at %s:%ddon't use Rn-Rm syntax with non-unit stridedsp immediate shift value not constantduplicate !tlsgd!%ldduplicate !tlsldm!%ldduplicate ".else"duplicate .fnstart directiveduplicate .handlerdata directiveduplicate .personality directiveduplicate .personalityindex directiveduplicate instruction %sduplicate macro %sduplicated `%s'duplicated psr bit specifierelements must be smaller than reversal regionelse without matching ifemit_one_bundle: unexpected dynamic opempty label field for ISempty symbol name in .def; ignoredempty vector register listemulations not handled in this configurationend of file after a one-character quote; \0 insertedend of file in commentend of file in comment; newline insertedend of file in escape characterend of file in multiline commentend of file in string; '%c' insertedend of file inside conditionalend of file not at end of a line; newline insertedend of macro inside conditionalend of vector register list not foundend on line errorendf without forendi without matching ifending register must be r15endw without whileentity size for SHF_MERGE not specifiedentry instruction with stack decrement < 16error checking for overflow - broken assemblererror constructing %s pseudo-op table: %serror parsing element/structure listerror setting flags for "%s": %serror setting flags for ".sbss": %serror: unsupported #foo() directive used on symbolestimate size
estimate_size_before_relax calledeven register number requiredeven register requiredexcess operands: '%s'expected #constantexpected #n as first argument of %sexpected %cexpected ',' after section nameexpected ',' after symbol nameexpected ',' after symbol sizeexpected ']', not %c in %sexpected , <constant>expected .L, .W or .B for register in indexed addressing modeexpected 0 operands for generated labelexpected 0 or 1expected <Rm> or <Dm> or <Qm> operandexpected <nn>expected <offset>, <opcode>expected <reg>, <reg>expected <tag> , <value>expected @(exp, reg16)expected EP registerexpected `%s' to have already been set for .vtable_inheritexpected a %s name followed by a `,'expected address expressionexpected alignment after sizeexpected closing parenexpected commaexpected comma after "%s"expected comma after instruction nameexpected comma after major opcodeexpected comma after nameexpected comma after name "%s"expected comma after name `%s' in .localentry directiveexpected comma after name `%s' in .size directiveexpected comma after name in .symverexpected comma after name in .vtable_entryexpected comma after name in .vtable_inheritexpected comma after register modeexpected comma after register numberexpected comma after symbol nameexpected comma after symbol-name: rest of line ignored.expected comma or colon after symbol name; rest of line ignoredexpected comma separatorexpected constant expression as first argument of %sexpected constant expression, got %sexpected constant in the range 2..16expected constant or register name as argument to RPT insnexpected constant value as argument to RPTexpected expressionexpected expression, got %sexpected fill pattern missingexpected first argument of %s to be in the range 1-4expected indexexpected numeric constantexpected one operand for generated literalexpected quoted stringexpected registerexpected register as second argument of %sexpected register listexpected register name or constant as first argument of %sexpected simple numberexpected symbolexpected symbol nameexpected valid addressing mode for mova: "@(disp, ea.sz),ERn"expected value of first argument of %s to fit into 20-bitsexpected }expecting %c near %sexpecting )expecting ]expecting `)' after scale factor in `%s'expecting `,' or `)' after base register in `%s'expecting `,' or `)' after index register in `%s'expecting comma delimited operandsexpecting comma delimited register operandsexpecting control registerexpecting either ON or OFF after .listexpecting index register or scale factor after `,'; got '%c'expecting indirect branch instruction after `notrack'expecting indirect register `($rA)'expecting indirect register `($rX)'expecting lockable instruction after `lock'expecting mnemonic; got nothingexpecting opcode string in self test modeexpecting operand after ','; got nothingexpecting operand before ','; got nothingexpecting prefix; got nothingexpecting registerexpecting scale factor of 1, 2, 4, or 8: got `%s'expecting valid branch instruction after `bnd'expecting {expression doesn't fit in BYTEexpression doesn't fit in WORDexpression errorexpression must be constantexpression out of range: defaulting to 0expression out of range: defaulting to 1expression too complexextended instruction in a branch delay slotextended instruction in delay slotextended operand requested but not requiredextending shift is not permittedextension `%s' unrecognizedextension does not apply to the base architectureextra .LABEL arguments ignored.extra characters '%s' at end of constant expression '%s'extra characters '%s' at end of immediate expression '%s'extra characters '%s' at end of operand '%s'extra characters '%s' at the end of absolute operand '%s'extra closing braceextra colonextra commaextra dotextra opening braceextra stuff on line ignoredextraneous characters at end of numeric section typeextraneous shift as part of operand to shift insnfailed for %d
failed general register sanity check.failed regnum sanity check.failed sanity checkfailed sanity check.failed sanity check: long_jumpfailed sanity check: short_jumpfailed special case insn sanity checkfailed to assemble instruction: "%s"failed to parse flagsfailed to read instruction table %s
failed to set flags for "%s": %sfailed to set subsections by symbolsfailed to set up debugging information: %sfake .file after real onefall through frequency must be greater than 0field fx_size too small to hold %dfield size must be 16 when value is relocatablefield value "%s" too complex for a bitfieldfield value truncatedfield width "%s" too complex for a bitfieldfield width %lu too big to fit in %d byte: truncated to %d bitsfield width %lu too big to fit in %d bytes: truncated to %d bitsfifthfile finished with an open IT block.file not found: %sfile number %ld already allocatedfile number less than onefilename goes over one page boundaryfill pattern too long, truncating to %ufirstfirst and second operands shall be the same registerfirst operand is floating pointfirst operand is too large for 16-bit signed intfirst operand is too large for a 24-bit displacementfirst register must be r4first transfer register must be evenfixes not all moved from %sflag for {c}psr instruction expectedfloat register should be even, was %dfloating point args are in fp regsfloating point constant too largefloating point number invalidfloating point number invalid; zero assumedfloating point numbers are not implementedfloating-point expression requiredformat = %s
format names only valid inside bundlesfound %d operand for '%s':  Expected %dfound %d operands for '%s':  Expected %dfound '%c', expected: '%c'fourthfr_mem record before region record!fr_var %lu < length %dfr_var (%ld) < length (%d)fraction bits value out of rangeframe reg expected, using $%d.frame size specified twicefrgr_mem record before region record!functional unit already maskedfunctional unit already masked for operand %u of '%.*s'functional unit already used in this execute packetgarbage after index spec ignoredgarbage at end of linegarbage following instructiongenerate PIC codeget_expanded_loop_offset: invalid opcodegr_gr record before region record!gr_mem record before region record!group name for SHF_GROUP not specifiedgroup section `%s' has no group signaturehandlerdata in cantunwind framehard-float conflicts with specified fpuhardware dividehardware loop extensionhaving the base register in the register list when using write back is UNPREDICTABLEhere is the "else" of the unterminated conditionalhere is the previous ".else"here is the previous ".if"here is the start of the unterminated conditionalhi() relocation used on an instruction which does not support ithi0() relocation used on an instruction which does not support ithigh bits set in register list expressionhint in B unit can't be usedhint in B unit may be treated as nophint.b may be treated as nophint.b shouldn't be usediWMMXt control register expectediWMMXt data or control register expectediWMMXt data register expectediWMMXt scalar register expectedia64.md_begin: can't hash `%s': %sidentifier+constant@%s means identifier@%s+constantidentifier+constant@got means identifier@got+constantif writeback register is in list, it must be the lowest reg in the listignoring attempt to re-define symbol `%s'.ignoring attempt to redefine built-in register '%s'ignoring attempt to redefine symbol %signoring attempt to undefine built-in register '%s'ignoring attempt to use .unreq on fixed register name: '%s'ignoring bad alignmentignoring changed section attributes for %signoring changed section entity size for %signoring changed section type for %signoring extra '-rename-section' delimiter ':'ignoring fill value in absolute sectionignoring fill value in section `%s'ignoring incorrect section type for %signoring invalid '-rename-section' specification: '%s'ignoring macro exit outside a macro definition.ignoring operands: %s ignoring redefinition of register alias '%s'iif convert internal pcrel/binaryiif convert internal pcrel/pointerillegal %s relocation size: %dillegal .stab%c directive, bad characterillegal .stabx expression; zero assumedillegal double indirectionillegal expressionillegal immediate register operand %sillegal indirect referenceillegal opcode %s for mcu %sillegal operandillegal operand - register name found where none expectedillegal operandsillegal range of target hardware versionsillegal register after @illegal register after @-illegal register included in listillegal register numberillegal resource usage in bundleillegal use of control registerillegal use of coprocessor registerimm3imm5 should >= 2immediate 0 cannot be used hereimmediate 1 or 2 expectedimmediate cannot be moved by a single instructionimmediate constant is valid both as a bit-pattern and a floating point value (using the fp value)immediate expression requires a # prefiximmediate has bits set outside the operand sizeimmediate is not a power of twoimmediate must be 1 or 2immediate offset not 2-byte-alignedimmediate offset not 4-byte-alignedimmediate offset out of rangeimmediate operand illegal with absolute jumpimmediate operand is not matchimmediate operand is too largeimmediate operand requiredimmediate operand requires iWMMXt2immediate operands sum to greater than 32immediate out of rangeimmediate out of range for insertimmediate out of range for narrowing operationimmediate out of range for shiftimmediate valueimmediate value %d out of range %d to %dimmediate value %llu out of range %u to %luimmediate value %u out of range %u to %uimmediate value 0x%x truncated to 0x%ximmediate value is out of rangeimmediate value must be a multiple of %d at operand %d -- `%s'immediate value not allowed when source & dest differimmediate value out of rangeimmediate value out of range immediate value out of range, expected range [0, 16]immediate value out of range, expected range [1, 32]immediate zero expectedinappropriate arguments for opcode '%s'inappropriate arguments for opcode `%s'incompatible flag %i in line directiveinconsistent types in Neon instructioninconsistent uses of .cfi_sectionsincorrect condition in IT blockincorrect format for multiply parallel instructionincorrect number of operands given in the first instructionincorrect number of operands given in the second instructionincorrect register `%s%s' used with `%c' suffixincorrect register in reglistincorrect register number, ignoringindex and destination registers should be distinctindex not allowed inside register listindex offset out of rangeindex register overlaps transfer registerindex register specified but zeroindex value too big for %sindexed vector register expectedindirect %s without `*'inserting "%s" into %s alias hash table failed: %sinserting "%s" into %s name hash table failed: %sinserting "%s" into string hash table: %sinserting "%s" into symbol table failed: %sinserting "%s" into tag hash table: %sinsn can't be combined with parallel processing insninsn cannot be combined with non-nopxinsn cannot be combined with non-nopyinsn cannot be combined with pmulsinstruction %s may not follow another I/O instruction.instruction %s may not follow another memory access instruction.instruction %s requires %d operandinstruction %s requires %d operandsinstruction %s requires MSP430X mcuinstruction %s requires enabling AUDIO extensioninstruction %s requires enabling DIV & DX_REGS extensioninstruction %s requires enabling DX_REGS extensioninstruction %s requires enabling FPU extensioninstruction %s requires enabling FPU_DP extensioninstruction %s requires enabling FPU_MAC extensioninstruction %s requires enabling FPU_SP extensioninstruction %s requires enabling STRING extensioninstruction %s requires enabling dsp extensioninstruction %s requires enabling performance extensioninstruction %s requires enabling performance extension IIinstruction %s requires enabling zol extensioninstruction %s.a does not existinstruction %s: result is always falseinstruction %s: result is always trueinstruction '%.*s' cannot be predicatedinstruction '%s' cannot be executed in parallel.instruction '%s' is for the M32R2 onlyinstruction '%s' is for the M32RX onlyinstruction `%s' after `xacquire' not allowedinstruction `%s' isn't supported in 16-bit mode.instruction address is not a multiple of %dinstruction address is not a multiple of 16instruction address is not a multiple of 2instruction address is not a multiple of 8instruction cannot be conditionalinstruction cannot operate on pair valuesinstruction does not accept preindexed addressinginstruction does not accept scaled register indexinstruction does not accept this addressing modeinstruction does not accept unindexed addressinginstruction does not allow shifted indexinstruction does not support unindexed addressinginstruction does not support writebackinstruction does not take a block typeinstruction form not available on this architecture.instruction implicitly accesses R31 of previous load.instruction is always unconditionalinstruction mnemonic too long: %sinstruction not allowed in IT blockinstruction not supported in Thumb16 modeinstruction requires labelinstruction requires label or value in range -511:512instruction requires label sans '$'instruction requires register indexinstruction sequence (write a0, branch, retw) may trigger hardware erratainstructions write to the same destination register.integer 32-bit register expectedinteger 64-bit register expectedinteger operand out of rangeinteger or SP register expectedinteger or zero register expectedinteger register expectedinteger register expected in the extended/shifted operand registerinteger, zero or SP register expectedinternal confusion: relocation in a section without contentsinternal error in argument parsinginternal error: [%s] unexpected code [%lx] in frob symbolinternal error: bad CFA value #%dinternal error: bad argument type %cinternal error: bad file property ID %dinternal error: bad microMIPS opcode (incorrect length: %u): %s %sinternal error: bad microMIPS opcode (opcode/length mismatch): %s %sinternal error: bad relocation #%dinternal error: base section index out of rangeinternal error: broken opcode descriptor for `%s %s'
internal error: can't export reloc type %d (`%s')internal error: can't hash `%s': %sinternal error: can't hash `%s': %s
internal error: can't hash aux register '%s': %sinternal error: can't hash macro `%s': %sinternal error: can't hash opcode '%s': %sinternal error: can't hash opcode `%s': %sinternal error: can't install fix for reloc type %d (`%s')internal error: failed to allocate %d indirectsymbol pointersinternal error: fixup not contained within fraginternal error: invalid macrointernal error: lookup/get operands failedinternal error: losing opcode: `%s' "%s"
internal error: more indirect mach-o symbols than expectedinternal error: reloc %d (`%s') not supported by object file formatinternal error: unknown dwarf2 formatinternal error: unknown instruction attribute: 0x%08xinternal error: unknown nop check stateinternal error: unknown option name '%s'internal error; cannot generate `%s' relocationinternal error? cannot generate `%s' relocationinternal error? cannot generate `%s' relocation (%d, %d)internal failure in parse_register_listinternal inconsistency in %s: bdap.w with no symbolinternal inconsistency in %s: bdapq no symbolinternal inconsistency problem in %s: %lxinternal inconsistency problem in %s: ext. insn %04lxinternal inconsistency problem in %s: fr_subtype %dinternal inconsistency problem in %s: fr_symbol %lxinternal inconsistency problem in %s: insn %04lxinternal inconsistency problem in %s: resolved symbolinternal inconsistency problem: %s called for %d bytesinternal relocation (type: IMMEDIATE) not fixed upinternal: BFD_RELOC_MMIX_BASE_PLUS_OFFSET not resolved to sectioninternal: GREG expression not resolved to sectioninternal: bad RISC-V opcode (bits 0x%lx undefined): %s %sinternal: bad RISC-V opcode (mask error): %s %sinternal: bad RISC-V opcode (unknown operand type `%c'): %s %sinternal: bad RISC-V opcode (unknown operand type `C%c'): %s %sinternal: bad RISC-V opcode (unknown operand type `CF%c'): %s %sinternal: bad RISC-V opcode (unknown operand type `F%c'): %s %sinternal: bad mips opcode (bits 0x%08lx defined): %s %sinternal: bad mips opcode (bits 0x%08lx doubly defined): %s %sinternal: bad mips opcode (bits 0x%08lx undefined): %s %sinternal: bad mips opcode (mask error): %s %sinternal: can't hash `%s': %sinternal: mmix_prefix_name but empty prefixinternal: unexpected relax type %d:%dinternal: unhandled label %sinternal: unknown operand type: %s %sinternal_relocation (type: OFFSET_IMM) not fixed upinterrupt vector for trap instruction out of rangeinvalid %s option for %s cpuinvalid -march= option: `%s'invalid -mavxscalar= option: `%s'invalid -mevexlig= option: `%s'invalid -mevexrcig= option: `%s'invalid -mevexwig= option: `%s'invalid -mfence-as-lock-add= option: `%s'invalid -mmnemonic= option: `%s'invalid -momit-lock-prefix= option: `%s'invalid -moperand-check= option: `%s'invalid -mrelax-relocations= option: `%s'invalid -msse-check= option: `%s'invalid -msyntax= option: `%s'invalid -mtune= option: `%s'invalid -mvexwig= option: `%s'invalid -mx86-used-note= option: `%s'invalid <arch> in --march=<arch>: %sinvalid @slotcount valueinvalid BSPEC expressioninvalid FPA immediate expressioninvalid Hi register with immediateinvalid LOC expressioninvalid NaN setting -mnan=%sinvalid PC-relative operandinvalid PLT expression `%s'invalid VSIB addressinvalid WakeOnStatus %ldinvalid XFR WideBus Address %ldinvalid abi -mabi=%sinvalid accumulator registerinvalid addressinvalid addressing modeinvalid architectural extensioninvalid architecture -A%sinvalid architecture -xarch=%sinvalid architecture -z%sinvalid architecture option -m%s, ignoredinvalid argument '%s' to -fdebug-prefix-mapinvalid attempt to declare external version name as default in symbol `%s'invalid auto-litpool-limit argumentinvalid auto-litpool-limit argument (range is 100-10000)invalid barrier typeinvalid base register for register offsetinvalid branch operandinvalid byte branch offsetinvalid cache operation nameinvalid char %s beginning operand %d `%s'invalid character %s before operand %dinvalid character %s in mnemonicinvalid character %s in operand %dinvalid characters in inputinvalid co-processor operandinvalid conditioninvalid condition code '%s'invalid condition code nameinvalid configuration option '%s' in transition rule '%s'invalid constantinvalid constant (%lx) after fixupinvalid constant table offset %ldinvalid constant: %d bit expression not in range %d..%dinvalid constant: %d bit expression not in range %u..%uinvalid constant: %d is not word align integerinvalid constant: 10 bit expression not in range [-2^9, 2^9-1]invalid constant: 20 bit expression not in range -2^19..2^19-1invalid constant: 25 bit expression not in range [-16777216, 16777215]invalid constant: 32 bit expression not in range [-0x80000000, 0x7fffffff]invalid constant: 32 bit expression not in range [0, 0xffffffff]invalid constant: 32 bit expression not word aligninvalid constant: bit expression not definedinvalid control register nameinvalid default displacement size "%s". Defaulting to %d.invalid destination memory operandinvalid destination registerinvalid destination register listinvalid destination unitinvalid element selectorinvalid element size %d and vector size combination %cinvalid empty loopinvalid expression evaluation type %dinvalid expression for operand %i of '%s'invalid expression in load/store multipleinvalid expression in the addressinvalid flag '%s'invalid floating point register pair.  Valid fp register pair operands are 0, 1, 4, 5, 8, 9, 12 or 13.invalid floating-point constantinvalid fourth registerinvalid frame sizeinvalid hvc expressioninvalid identifier for ".ifdef"invalid immediateinvalid immediate field positioninvalid immediate for address calculation (value = 0x%08lX)invalid immediate for stack address calculationinvalid immediate sizeinvalid immediate valueinvalid immediate: %ld is out of rangeinvalid index size for coldfireinvalid indirect register sizeinvalid instruction `%s' after `%s'invalid instruction for this architecture; needs invalid instruction shapeinvalid instruction size selected (%d)invalid instruction suffixinvalid last instruction for a zero-overhead loopinvalid length field specifiedinvalid length for .scomm directiveinvalid listing option `%c'invalid literal constant: pool needs to be closerinvalid lrlive '%lu'invalid machine `%s'invalid machine mode `%s'invalid memory operandinvalid merge entity sizeinvalid modeinvalid movx address registerinvalid movx dsp registerinvalid movy address registerinvalid movy dsp registerinvalid neon suffix for non neon instructioninvalid numberinvalid number of registers in the list; %d registers are expected at operand %d -- `%s'invalid number of registers in the list; only 1 register is expected at operand %d -- `%s'invalid offset expressioninvalid offset, target not word aligned (0x%08lX)invalid offset, value too big (0x%08lX)invalid opcodeinvalid opcode '%s' in transition rule '%s'invalid operandinvalid operand (%s section) for `%s'invalid operand (%s section) for `%s' when setting `%s'invalid operand in ldminvalid operand in stminvalid operand mode for this architecture; needs 68020 or higherinvalid operand of ()+invalid operand of -()invalid operand of S^#invalid operand size requestedinvalid operand suffixinvalid operand to .code directive (%d) (expecting 16 or 32)invalid operand to opcode %s: `%s'invalid operandsinvalid operands (%s and %s sections) for `%s'invalid operands (%s and %s sections) for `%s' when setting `%s'invalid operands for cross-unit opinvalid operands for opcodeinvalid operands to opcode %s: `%s'invalid or unsupported encoding in .cfi_lsdainvalid or unsupported encoding in .cfi_personalityinvalid pc-relative addressinvalid performance registerinvalid pref operation nameinvalid priority '%lu'invalid pseudo operationinvalid quickrot register specifiedinvalid quickrot unit specifiedinvalid range in vector register listinvalid registerinvalid register %sinvalid register '%s' for '%s' instructioninvalid register expressioninvalid register for memory accessinvalid register listinvalid register list to push/pop instructioninvalid register maskinvalid register nameinvalid register number (%ld) for '%s'invalid register number (%ld) for '%s' instructioninvalid register number: %d is not in [r0--r7]invalid register operandinvalid register operand #1invalid register operand #2invalid register operand #3invalid register operand #4invalid register operand size for `%s'invalid register operand: %sinvalid register rangeinvalid register type %dinvalid register: r15 illegalinvalid relaxation fragment resultinvalid reloc expressioninvalid relocationinvalid relocation %s for fieldinvalid relocation expressioninvalid relocation for '%s' instructioninvalid relocation for fieldinvalid relocation for instructioninvalid relocation for operand %d of '%s'invalid relocation for operand %i of '%s'invalid relocation in instruction slot %iinvalid rotationinvalid rounding modeinvalid scalar register in listinvalid segment "%s"invalid shiftinvalid shift for the register offset addressing modeinvalid shift operatorinvalid shift value: %ldinvalid short form floating point immediate operandinvalid single nop size: %d (expect within [0, %d])invalid smc expressioninvalid source memory operandinvalid source registerinvalid source register listinvalid source unitinvalid suffixinvalid suffix after register.invalid swi expressioninvalid switch -m%sinvalid symbolic operandinvalid syntax for .dn directiveinvalid syntax for .qn directiveinvalid syntax for .req directiveinvalid syntax for .unreq directiveinvalid system register nameinvalid target hardware versioninvalid type for literal poolinvalid unextended operand valueinvalid unwind opcodeinvalid use of "=immediate"invalid use of %s relocationinvalid use of 'MSL'invalid use of 'MUL'invalid use of 32-bit register offsetinvalid use of 64-bit register offsetinvalid use of operator "%s"invalid use of vector registerinvalid value for special purpose registerinvalid vector register in listinvalid vector register nameinvalid write mask `%s'invalid zeroing-masking `%s'is_stmt value not 0 or 1isa number less than zerojump not 3..10 bytes away (is %d)jump over nop padding out of rangejump target out of rangejump target out of range; no usable trampoline foundjump to a symbol in another ISA modejump to misaligned address (0x%lx)junk `%s' after expressionjunk `%s' after registerjunk after operand %u of '%.*s'junk at end of line, first unrecognized character is `%c'junk at end of line, first unrecognized character valued 0x%xjunk at end of line: "%s"junk at end of line: `%s'junk at end of machine string, first unrecognized character is `%c'junk found after instruction: %s.%sla must use with symbol. '%s'la used to load 64-bit address; recommend using dla insteadlabel "$%d" redefinedlabel "%d$" redefinedlabel %s was not defined in this dwarf sectionlabel after '||'label after predicatelabel not at start of execute packetlabels are not valid inside bundleslacking labellacking label  last register must be r7ldr to register 15 must be 4-byte alignedldrd/strd requires even:odd register pairleb128 operand is an undefined symbol: %sleft operand is a bignum; integer 0 assumedleft operand is a float; integer 0 assumedlength not neededlength of .comm "%s" is already %ld. Not changed to %ld.length of .lcomm "%s" is already %ld. Not changed to %ld.li rd label isn't correct instruction formlibbfd ABI mismatchline %d: rep or repi must include at least 4 instructionsline %d: unable to place address of symbol '%s' into a byteline %d: unable to place address of symbol '%s' into a quadline %d: unable to place address of symbol '%s' into a shortline %d: unable to place value %lx into a byteline %d: unable to place value %lx into a shortline %d: unknown relocation type: 0x%xline number (%d) for .stab%c directive cannot fit in index field (20 bits)line numbers must be positive; line number %d rejectedlink register must be in a low numbered registerlink register unit must be one of %sliteral pool insertion failedliteral pool location required for text-section-literals; specify with .literal_positionliteral pool overflowliteral referenced across section boundarylk addressing modes are invalid for memory-mapped register addressinglmi pseudo instruction should not use a label in imm fieldlo register requiredlo() relocation used on an instruction which does not support itloading the same register in parallel operationlocal label `%s' is not definedlong jump requiredloop containing less than three instructions may trigger hardware errataloop count constant %ld is out of range [1..%d]loop end too close to another loop end may trigger hardware errataloop target does not follow loop instruction in sectionloop too long for LOOP instructionloop: 32-bit displacement not supportedlow register (r0-r15) expected, not '%.100s'lower 16 bits of mask ignoredlui expression not in range 0..1048575m68k and cf features both selectedmacro %s not implemented yetmacro instruction expanded into a wrong size instruction in a 16-bit branch delay slotmacro instruction expanded into a wrong size instruction in a 32-bit branch delay slotmacro instruction expanded into multiple instructionsmacro instruction expanded into multiple instructions in a branch delay slotmacro requires $at register while noat in effectmacro requires $at while $at in usemacro used $at after ".set noat"macros nested too deeplymajor opcode is not sorted for %smajor opcode not in range [0x%02x - 0x%02x]malformed reglist in push/popmask not on destination operandmask trims opcode bits for %smask, index, and destination registers must be distinctmask, index, and destination registers should be distinctmatching operands to opcodemd_apply_fix: unknown r_type 0x%x
md_estimate_size_before_relax
memory destination needed for instruction `%s' after `xrelease'minor opcode not in range [0x00 - 0x3f]misaligned branch destinationmisaligned datamisaligned offsetmismatch between opcode size and operand sizemismatch between register and suffixmismatch for format '%s': #slots = %d, #opcodes = %dmismatched .ebmismatched element/structure types in listmismatched parenthesesmisplaced .procendmisplaced PIC operandmissing '%c'missing ')'missing ']'missing +missing .endmissing .end at end of assemblymissing .end or .bend at end of filemissing .endp before .cfi_startprocmissing .fnstart before unwinding directivemissing .funcmissing .procmissing =missing CPS flagsmissing DSP name `%s'missing [missing ]missing `)'missing `)' after formals in macro definition `%s'missing `.end'missing `]'missing `lock' with `%s'missing `}'missing `}' in `%s'missing abi name `%s'missing alignmentmissing alignment hintmissing architectural extensionmissing architecture name `%s'missing argumentmissing argument for %s_check directivemissing argument separator ',' for .cpsetupmissing block typemissing break countmissing call argumentmissing call signaturemissing classmissing close quote; (assumed)missing closing '"'missing closing `%c'missing closing bracemissing closing parenthesismissing commamissing comma after insn constant
missing comma or colonmissing condition code in structured control directivemissing cpu architecturemissing cpu name `%s'missing domissing element sizemissing emulation mode namemissing expressionmissing expression in .abiversion directivemissing expression in .localentry directivemissing expression in .size directivemissing flags: one of 'P', 'N' or 'Z' requiredmissing fpu name `%s'missing frame sizemissing immediate expressionmissing labelmissing local expressionmissing local indexmissing model parametermissing namemissing offsetmissing offset in the pre-indexed addressmissing operandmissing operand after commamissing operand; zero assumedmissing or bad offset expressionmissing or invalid displacement expression `%s'missing or invalid displacement expression `%s' taken as 0missing or invalid expression `%s'missing or invalid immediate expression `%s'missing predication typemissing real symbol namemissing reloc typemissing rename stringmissing reserved current_memory/grow_memory argumentmissing rotation field after commamissing separatormissing shift amountmissing sizemissing size expressionmissing sizeof_stub expressionmissing stack sizemissing stringmissing symbol namemissing table indexmissing thenmissing to or downtomissing typemissing type suffixmissing valuemissing version name in `%s' for symbol `%s'more than 65K literal poolsmov cannot use RD port as destinationmultiple '||' on same linemultiple branches or jumps in the same bundlemultiple condition specificationsmultiple emulation names specifiedmultiple formats specified for one bundle; using '%s'multiple literals in expansionmultiple movx specificationsmultiple movy specificationsmultiple parallel processing specificationsmultiple predicates on same linemultiple sections remapped to output section %smultiple versions [`%s'|`%s'] for symbol `%s'multiple writes to the same registermust be @(r0,...)must specify extensions to add before specifying those to removeneed PIC qualifier with symbol. '%s'needs @GOT or @GOTOFF. %snegative alignmentnegative count for %s - ignorednegative nop control byte, ignorednegative offsetnegative sizenegative value ignored in %sneither Power nor PowerPC opcodes were selected.nested .bs blocksnested .ent directivesnested software pipelined loopnew line in titlenew section '%s' defined without attributes - this might cause problemsnext outside of structured loopno %d-byte relocations availableno '(' to match ')'no '[' to match ']'no .cprestore pseudo-op used in PIC codeno .frame pseudo-op used in PIC codeno architecture contains all the instructions used
no compiled in support for 32bit x86_64no compiled in support for 64 bit object file formatno compiled in support for x86_64no current file pointerno entry symbol for global function '%s'no file name following -t optionno filename following .INCLUDE pseudo-opno floating point unit specifiedno function type on PLT relocno hppa_fixup entry for fixup type 0x%xno instruction mnemonic suffix given and no register operands; can't size instructionno instruction mnemonic suffix given; can't determine immediate sizeno known dwarf XCOFF section for flag 0x%08x
no previous section to return to, ignored.no registered fragment for literalno relaxation found for this instruction.no sequence number after !%sno size modifier after period, .w assumedno such architecture modifier: `%s'no such architecture: `%s'no such instruction: `%s'no such machine extension `%s'no suitable GREG definition for operandsno tag specified for %sno way to handle .file within .ent/.end sectionno-auto-litpools is incompatible with auto-litpool-limitnon-PIC jump used in PIC librarynon-absolute expression in constant fieldnon-absolute value used with .space/.besnon-constant .%cleb128 is not supportednon-constant byte countnon-constant expression in ".elseif" statementnon-constant expression in ".if" statementnon-constant fill count for absolute sectionnon-contiguous register rangenon-immediate OPF operand, ignorednon-optional operand %d follows optional operand in %snon-pc-relative relocation for pc-relative fieldnot a 16 bit instruction '%s'not enough operands (%d) for '%s'; expected %dnumber (0x%s) larger than 32 bitsnumber larger than 64 bitsnumber must be positive and less than %dnumber of literal tokens != 1number of operands mismatchnumber of registers must be in the range [1:4]numeric view can only be asserted to zeroodd address operand: %ldodd displacement at %xodd distance branch (0x%lx byte)odd distance branch (0x%lx bytes)odd number cannot be used hereodd number of bytes in operand descriptionodd numbered general purpose register specified as register pairodd register cannot be used hereoffset and base must be from the same unitoffset has different size from baseoffset in operand %u of '%.*s' not divisible by %uoffset in operand %u of '%.*s' out of rangeoffset must be a multiple of %doffset must be zero in ARM encodingoffset not a multiple of 4offset out of rangeoffset register expectedoffset to unaligned destinationoffset too largeoffset value out of rangeonly 'LSL' shift is permittedonly 'MUL VL' is permittedonly 'MUL' is permittedonly D registers may be indexedonly LSL shift allowed in thumb modeonly SUBS PC, LR, #const allowedonly constant expression allowedonly constant offsets supported in absolute sectiononly floating point zero is allowed as immediate valueonly lo regs allowed with immediateonly lower 16-bits of first operand are usedonly one type should be specified for operandonly r0 can be used as byte count registeronly r0.bX byte fields of r0 can be used as byte countonly r15 allowed hereonly single block types allowedonly two consecutive VFP SP registers allowed hereopcode %s not found in opcode hash tableopcode '%s' not supported for target %sopcode '%s': cannot find literal definitionopcode '%s': could not parse operand '%s' in '%s'opcode '%s': no bound opname '%s' for precondition in '%s'opcode '%s': precondition only contains constants in '%s'opcode '%s': replacement does not have %d opopcode '%s': replacement does not have %d opsopcode '%s': unidentified operand '%s' in '%s'opcode 'NOP.N' unavailable in this configurationopcode `%s' not supported for target %sopcode has no effectopcode missing or not found on input lineopcode not supported in the `insn32' modeopcode not supported in the `insn32' mode `%s'opcode not supported on this processor: %s (%s)opcode not valid for this cpu variantopcode-specific %s relocation used outside an instructionopcodes '%s' (slot %d) and '%s' (slot %d) both have volatile port accessesopcodes '%s' (slot %d) and '%s' (slot %d) write the same portopcodes '%s' (slot %d) and '%s' (slot %d) write the same registeropcodes '%s' (slot %d) and '%s' (slot %d) write the same stateopen CFI at the end of file; missing .cfi_endproc directiveoperandoperand %d must be %s -- `%s'operand %d must be an immediateoperand %d must be an immediate expressionoperand %d must be constantoperand %d must be scalaroperand %d must be the same register as operand 1 -- `%s'operand %d of '%s' has invalid value '%u'operand %d of '%s' has out of range value '%u'operand %d out of rangeoperand %d overlap in %soperand %d: illegal use expression: `%s`operand %s0x%lx out of range.operand %u of '%.*s' is read-onlyoperand %u of '%.*s' is write-onlyoperand %u of '%.*s' not a valid base address registeroperand %u of '%.*s' not a valid memory referenceoperand %u of '%.*s' not a valid return address registeroperand %u of '%.*s' not constantoperand %u of '%.*s' on wrong sideoperand %u of '%.*s' out of rangeoperand 1 must be FPSCRoperand index error for %soperand is not an absolute constantoperand is not an immediateoperand mask overflowoperand mismatch -- `%s'operand must be a constantoperand must be a constant or a labeloperand must be a multiple of 2operand must be a multiple of 4operand must be absolute in range %lx..%lx, not %lxoperand must be absolute in range %u..%u, not %ldoperand number mismatchoperand out of rangeoperand out of range (%d is not between %d and %d)operand out of range (%s not between %ld and %ld)operand out of range, instruction expandedoperand out of range: %ldoperand out of range: %luoperand out of range: 0x%lxoperand overflowoperand references R%ld of instruction before previous.operand references R%ld of previous instruction.operand references R%ld of previous load.operand size mismatchoperand size must be specified for immediate VMOVoperand size must match register widthoperand type mismatchoperand types can't be inferredoperand value out of range for instructionoperand/size mis-matchoperands 0 and 1 must be the same registeroperands for opcode `%s' do not match any valid formatoperands mismatchoperands were not reducible at assembly-timeoperation combines symbols in different segmentsoption -mdsp conflicts with -medsp, only enabling -medspoption `%s' may not be negatedoption `%s' not recognizedoption `-%c%s' is deprecated: %soption `-A%s' is deprecated: use `-%s'or higherout of memoryout of rangeoutput verbose error messagesoverflowoverflow in branch to %s; converted into longer instruction sequenceoverflow in immediate argumentoverflow in literal (.lit8) tableoverflow in literal (.lita) tablep2align not supported on this targetpacking conflict: %s must dispatch sequentiallypadding addedparallelparallel instruction not following another instructionparentheses ignoredparse errorpc may not be used with write-backpc-relative pc-relative address offset out of rangepc-relative load offset not word alignedpc-relative load offset out of rangepce instruction error (16 bit || 16 bit).pcrel for branch to %s too far (0x%lx)pcrel for branch to %s too far (0x%x)pcrel for loopt too far (0x%lx)pcrel for lrw/jmpi/jsri to %s too far (0x%lx)pcrel offset for branch to %s too far (0x%lx)pcrel relocation not allowed in an instructionpcrel too farpcrel too far BFD_RELOC_BFIN_10pcrel too far BFD_RELOC_BFIN_11_PCRELpcrel too far BFD_RELOC_BFIN_12pcrel too far BFD_RELOC_BFIN_24pcrel too far BFD_RELOC_BFIN_5pcrel too far BFD_RELOC_MOXIE_10personality routine required before .handlerdata directivepersonality routine specified for cantunwind framepointer register (X, Y or Z) requiredpointer register (Y or Z) requiredpointer register Z requiredpolymorphs are not enabled. Use -mP option to enable.post-index must be a registerpost-indexed expression used in preload instructionpostincrement not supportedpowerpc_operands[%d] duplicates powerpc_operands[%d]powerpc_operands[%d].bitm invalidpre-indexed expression expectedpredicate not followed by instructionpredication on A0 not supported on this architectureprefer-const16 conflicts with prefer-l32rprefer-l32r conflicts with prefer-const16premature end of floating point prefixprevious .ent not closed by a .endprevious CFI entry not closed (missing .cfi_endproc)previous `%s' sequence has not been closedprevious movx requires nopyprevious movy requires nopxprofiling in absolute section?pseudo instruction `%s' not supportedpseudo prefix without instructionpseudo-op illegal within .struct/.unionpush/pop do not support {reglist}^qualifying predicate not followed by instructionquick branch offset %d out of range %d to %dr12 not allowed herer13 not allowed herer14 not allowed as first register when second register is omittedr14 not allowed herer15 based store not allowedr15 not allowed herer2 should not be used in indexed addressing moder31 cannot be used with jmp; use ret insteadr31 cannot be used with jmpr.n; use ret.n insteadrd must be even number.rdhi and rdlo must be differentrdhi, rdlo and rm must all be differentre-entrant coderecord type is not validrecord_type_not_validredefined symbol cannot be used on relocredefinition of global registerredefinition of mcu type `%s' to `%s'redundant %s prefixreg should <= 31reg-reg expectedregister expectedregister expected, but saw '%.6s'register expected, not '%.100s'register is out of orderregister is wrong size for a word %sregister is wrong size for address %sregister list must be even numberedregister list must be from the same unitregister list must contain at least 1 and at most 16 registersregister list must not contain duplicatesregister list not in ascending orderregister must be either sp or set by a previousunwind_movsp directiveregister name or number from 0 to 31 requiredregister name or number from 16 to 31 requiredregister number %u not supported on this architectureregister number above 15 requiredregister number out of rangeregister number too large for push/popregister offset not allowed in pre-indexed addressing moderegister operand expected, but got scalarregister out of range in listregister pair for operand %u of '%.*s' not a valid even/odd pairregister r%d out of rangeregister r0 cannot be used hereregister r16-r23 requiredregister r24, r26, r28 or r30 requiredregister range not in ascending orderregister rh%d out of rangeregister rl%d out of rangeregister rq%d does not existregister rq%d out of rangeregister rr%d does not existregister rr%d out of rangeregister same as write-back baseregister save offset not a multiple of %uregister scaling is being ignored hereregister section has contents
register stride must be 1 or 2register syntax is .register %%g[2367],{#scratch|symbolname|#ignore}register type mismatchregister unit must be one of %sregister value used as expressionregisters may not be the samerel too far BFD_RELOC_16rel too far BFD_RELOC_8rel31 relocation overflowrelative address out of rangerelative call out of rangerelative jump out of rangerelax hint unrecognized instruction: line %d.relaxation not supported
relaxed out-of-range branch into a jumpreloc %d not supported by object file formatreloc not within (fixed part of) sectionrelocated field and relocation type differ in signednessrelocation %s isn't supported by the current ABIrelocation cannot be done when using -mrelocatablerelocation is not supportedrelocation not allowedrelocation not applicablerelocation out of rangerelocation overflowrelocation valid in thumb1 code onlyrepeat < 0; .fill ignoredrepeat count cannot be used with %srepeat instruction used with non-register mode instructionreplacing `rep'/`repe' prefix by `bnd'required displacement wasn't given in indirect referenceresidual low bits in pmem diff relocationresource conflict (A%d)resource conflict (C flag)resource conflict (F flag)resource conflict (PSW)resource conflict (R%d)rest of line ignored; first ignored character is `%c'restore without savereturned from mips_ip(%s) insn_opcode = 0x%x
right operand is a bignum; integer 0 assumedright operand is a float; integer 0 assumedror #imm not supportedrotation can only be 0, 8, 16, or 24rounding down first operand float to signed introunding down first operand float to unsigned intrva without symbols suffix on comparison instruction is deprecateds3_PIC code offset overflow (max 16 signed bits)same type of prefix used twicescalar index must be constantscalar index out of rangescalar must have an indexscalar out of rangescalar out of range for multiply instructionscale factor invalid on this architecture; needs cpu32 or 68020 or higherscale factor of %d without an index registerscore3d instruction.sdaoff() relocation used on an instruction which does not support itsecondsecond .ent directive found before .end directivesecond operand missingsecond operand must be 1second operand must be 4second operand of .insn not a constant
second register should be greater than first registersecond register should follow dash in register listsection %s renamed multiple timessection '%s' finished with an open IT block.section `%s' aliased to `%s' is not usedsection alignment must be >= 4 bytes to check MULS/MULU safenesssection change from within a BSPEC/ESPEC pair is not supportedsection symbols are already globalseek to end of .incbin file failed `%s'segment override on `%s' is ineffectualselected FPU does not support instructionselected architecture does not support wide conditional branch instructionselected processor does not have all features of selected architectureselected processor does not support 'A' form of this instructionselected processor does not support 32bit wide variant of instruction `%s'selected processor does not support ARM opcodesselected processor does not support DSP extensionselected processor does not support PSTATE field name '%s'selected processor does not support SETPAN instructionselected processor does not support THUMB opcodesselected processor does not support `%s'selected processor does not support `%s' in ARM modeselected processor does not support `%s' in Thumb modeselected processor does not support `%s' in Thumb-2 modeselected processor does not support fp16 instructionselected processor does not support requested special purpose registerselected processor does not support system register name '%s'selected target format '%s' unknownsequence number in use for !tlsgd!%ldsequence number in use for !tlsldm!%ldsequentialset can only use RD port as sourceset: number not in -2147483648..4294967295 rangeset: number not in 0..4294967295 rangesetend use is deprecated for ARMv8setsw: number not in -2147483648..4294967295 rangesetting incorrect section attributes for %ssetting incorrect section type for %ssetx: illegal temporary register g0setx: temporary register same as destination registershift amount out of range 0 to 63shift by register not allowed in thumb modeshift countshift expression expectedshift expression is too largeshift must be constantshift not allowed for bitmask immediateshift operator expectedshift out of rangeshift value over 3 not allowed in thumb modeshifts in CMP/MOV instructions are only supported in unified syntaxshort branch with zero offset: use :wshortcut designator invalidsigned .word overflow; switch may be too large; %ld at 0x%lxsigned value out of rangesimd instructions operate on pair values (L prefix)single instruction is %u bytes long, but .bundle_align_mode limit is %u bytessize (%ld) out of range, ignoredsize is not 4 or 6size negative; .fill ignoredsize of "%s" is already %ld; not changing to %ldsize value for space directive too large: %lxskip (%ld) or count (%ld) invalid for file size (%ld)skipping prefixes on this instructionskipping two-word instructionsmi pseudo instruction should not use a label in imm fieldsome symbol undefined; zero assumedsourcesource and address units must not be shared for this addressing modesource and destination increment mode must agreesource and destination must be differentsource and destination register must be in different unitssource operand must be 16bit absolute addresssource operand must be 8 bit registersource register `%s%s' implicitly denotes `%s%.3s%u' to `%s%.3s%u' source group in `%s'source register must be in the trigger unitsource register must be r1source register same as write-back basesource register should be even numberedsource registers should be even numberedsource1 and dest must be same registerspace allocation too complex in absolute sectionspace allocation too complex in common sectionsparc convert_frag
special left instruction `%s' kills instruction `%s' in right containerspecified location wasn't TETRA-alignedspill_mask record unimplemented.spu convert_frag
spurious operands; (%d operands/instruction max)st/ld offset 23 instruction was disabled .stack frame layout does not match personality routinestack frame layout too complex for unwinderstack increment must be multiple of 4stack pointer offset too large for personality routinestand-alone `%s' prefixstart address not supportedstrange paper height, set to no formstray `\'stride must be a multiple of 64; lower 6 bits ignoredstride of 2 unavailable when element size is 8string too big (%lu bytes)strings must be placed into a sectionsupport ARM/Thumb interworkingswp{b} use is deprecated for ARMv6 and ARMv7swp{b} use is obsoleted for ARMv8 and latersymbol "%s" undefined; zero assumedsymbol %s is in a different sectionsymbol %s is weak and may be overridden latersymbol '%s' is already definedsymbol `%s' aliased to `%s' is not usedsymbol `%s' already definedsymbol `%s' can not be both weak and commonsymbol `%s' is already definedsymbol `%s' is already defined as "%s"/%s%ldsymbol definition loop encountered at `%s'symbol in .toc does not match any .tcsymbol name not recognised in the current localesymbol size computation overflowsymbol too far awaysymbol type "%s" is supported only by GNU and FreeBSD targetssymbol type "%s" is supported only by GNU targetssymbol%dsymbol+offset not supported for got tlssymbolic operand not allowedsymbols assigned with .asg must begin with a lettersymbols assigned with .eval must begin with a lettersyntax errorsyntax error in .startof. or .sizeof.syntax error in @(disp,[Rn, gbr, pc])syntax error in @(r0,...)syntax error in @(r0...)syntax error in structured control directivesyntax error: condition code not expectedsyntax error: expected `]', found  `%c'syntax error: invalid toc specifier `%s'syntax error: register not expectedsyntax error: system register not expectedsyntax error: value is missing before the register namesyntax error: vector register not expectedsyntax error; ')' not allowed heresyntax error; end of line, expected `%c'syntax error; expected ','syntax error; found `%c', expected `%c'syntax error; missing '(' after displacementsyntax error; missing ')' after base registersystem register name '%s' is deprecated and may be removed in a future releasesystem registers cannot be included in listtag not found for .tag %starget out of rangetdaoff() relocation used on an instruction which does not support ittemporary switch for dumpingtext label `%s' aligned to odd boundarythe %d-bit %s architecture does not support the `%s' extensionthe %s name '%s' is too long (maximum 16 characters)the XCOFF file format does not support arbitrary sectionsthe `%s' extension requires %s%d revision %d or greaterthe `%s' extension requires 64-bit FPRsthe `%s' extension was removed in %s%d revision %dthe first operand must be a symbolthe number of .indirect_symbols defined in section %s does not match the number expected (%d defined, %d expected)the offset 0x%08lX is not representablethe only valid suffixes here are '(plt)' and '(tlscall)'the optional immediate offset can only be 0the source register must not be $0the source register must not be $31the specified option is not accepted for PSBthe specified option is not accepted in ISBthe specified relocation type is not allowed for 32-bit registerthe specified relocation type is not allowed for MOVKthe top half of a 128-bit FP/SIMD register is expectedthe type of %s is too complex; it will be simplifiedthe use of -mvle requires -a32.the use of -mvle requires big endian.the yielding instruction %s may not be in a delay slot.there are no pc-relative size relocationsthere are no unsigned pc-relative relocationsthirdthis addressing mode is not applicable for destination operandthis addressing mode requires base-register writebackthis group relocation is not allowed on this instructionthis instruction does not accept an accumulatorthis instruction does not accept an immediatethis instruction does not support indexingthis instruction implies use of ARMv8.1 AdvSIMD.this instruction requires a post-indexed addressthis instruction will not write back the base registerthis instruction will write back the base registerthis relocation modifier is not allowed on this instructionthis string may not contain '\0'this type of register can't be indexedthumb conditional instruction should be in IT blocktoo few operandstoo many !literal!%ld for %stoo many .dim entriestoo many .size entriestoo many GREG registers allocated (max %d)too many IVC2 insns to pack togethertoo many IVC2 insns to pack with a 16-bit core insntoo many IVC2 insns to pack with a 32-bit core insntoo many argumentstoo many fixupstoo many instructions in execute packettoo many lda insns for !gpdisp!%ldtoo many ldah insns for !gpdisp!%ldtoo many lituse insns for !lituse_tlsgd!%ldtoo many lituse insns for !lituse_tlsldm!%ldtoo many memory references for `%s'too many operandstoo many operands (%d) for '%s'; expected %dtoo many operands in instructiontoo many operands to '%.*s'too many positional argumentstoo many registers in vector register listtoo many st_End'stoo many unwind opcodestoo many unwind opcodes for personality routine 0too many unwinding instructionstrailing garbage after expression: %stranslating bgeni to movitranslating bmaski to movitranslating mgeni to movitranslating to `%s %s%s'translating to `%s %s%s,%s%s'translating to `%sp'trap exception not supported at ISA 1trap value %ld is not validtried to set unrecognized symbol: %s
truncated file `%s', %ld of %ld bytes readtwo .function pseudo-ops with no intervening .eftype %d reloc done?
type mismatch in vector register listtype specifier has the wrong number of partstypes specified in both the mnemonic and operandsunable to compute ADRL instructions for PC offset of 0x%lxunable to continue with assembly.unable to create reloc for build noteunable to generate unwinding opcode for frame pointer offsetunable to generate unwinding opcode for frame pointer reg %dunable to generate unwinding opcode for reg %dunable to locate include file: %sunable to pack %s by itself?unable to rebuffer file: %s
unable to repeat %s insnunable to restore return address from previously restored regunable to widen instructionunaligned branch target: %d bytes at 0x%lxunaligned data at an absolute location is not supportedunaligned entry instructionunaligned loop: %d bytes at 0x%lxunassigned file number %ldunbalanced brackets in operand %d.unbalanced parenthesis in operand %d.unclosed '('undecodable fixundecodable instruction in instruction fragundefined combination of operandsundefined local label `%s'undefined symbol %s in PCR relocationundefined symbol %s used as an immediate valueundefined symbol for opcode "%s"unexpected %s fixupunexpected .cantunwind directiveunexpected .cfi_inline_lsdaunexpected .handlerdata directiveunexpected .unwind_movsp directiveunexpected 12-bit reloc typeunexpected 18-bit reloc typeunexpected PC relative expressionunexpected TLS relocationunexpected `"' in expressionunexpected addressing mode for %sunexpected bit specified after APSRunexpected character `%c' in element sizeunexpected character `%c' in predication typeunexpected character `%c' in type specifierunexpected characters following instructionunexpected comma after the mnemonic name `%s' -- `%s'unexpected comma before the omitted optional operandunexpected end of file in irp or irpcunexpected end of file in macro `%s' definitionunexpected end of lineunexpected fixunexpected negative constantunexpected register in the immediate operandunexpected section size informationunexpected shift operatorunexpected storage class %dunhandled %d
unhandled CFA insn for unwinding (%d)unhandled local relocation fix %sunhandled operand code %dunhandled reloc %s in md_pcrel_from_sectionunhandled relocation type %sunhandled: .proc %s,%dunimplemented .nops directiveunimplemented opcode "%s"unimplemented relocation suffixunimplemented segment %s in operandunimplemented toc32 expression modifierunimplemented toc64 expression modifierunindexed addressing used in preload instructionunknownunknown -mpid= argument '%s'unknown .gnu_attribute valueunknown .loc sub-directive `%s'unknown ABI version`%s'
unknown CSR `%s'unknown DSP `%s'unknown DSP prefix character %c %sunknown EABI `%s'
unknown FPU configuration `%s'
unknown ISA level %sunknown ISA or architecture %sunknown MCU: %s
unknown abi `%s'
unknown addressing mode %sunknown arch name `%s'
unknown architectural extension `%s'unknown architectureunknown architecture %sunknown architecture '%s'unknown architecture `%s'unknown architecture `%s'
unknown architecture extension `%s'
unknown architecture: %s
unknown argument for .usepvunknown baseline `%s'
unknown condition code: %sunknown constraint `%c'unknown cpu `%s'unknown default cpu = %s, os = %sunknown directiveunknown escape '\%c' in string; ignoredunknown execution type passed to write_2_short()unknown expression in operand %sunknown expression in operand %s.  Use #llo(), #lhi(), #hlo() or #hhi()unknown fixup sizeunknown floating point abi `%s'
unknown floating point format `%s'
unknown floating point mnemonic: "%s"unknown floating point prefix characterunknown floating type type '%c'unknown fpu `%s'unknown group relocationunknown implicit IT mode `%s', should be arm, thumb, always, or never.unknown instruction '%s'unknown interrupt %sunknown mnemonic `%s' -- `%s'unknown mnemonic: "%s"unknown opcodeunknown opcode "%s"unknown opcode %sunknown opcode '%s'unknown opcode `%s'unknown opcode or format name '%s'unknown opcode: %sunknown opcode: `%s'unknown operand %sunknown operand countunknown operand shift: %x
unknown operand to .archunknown operator %s. Did you mean X(Rn) or #[hl][hl][oi](CONST) ?unknown option to BTIunknown or invalid section attribute '%s'unknown or invalid section type '%s'unknown or missing PSTATE field nameunknown or missing operation nameunknown or missing option to PSBunknown or missing system register nameunknown parameter following .SECTION directive: %sunknown procedure kindunknown profiling flag - ignored.unknown pseudo-op: `%s'unknown record type %d (in %s)unknown register %sunknown register '%s' -- .req ignoredunknown register `%s'unknown register alias '%s'unknown relocation (%u)unknown relocation modifierunknown section attribute %sunknown section attribute '%c'unknown user-defined function %sunknown vector operation: `%s'unknown width specifier '.%c'unknown/incorrect operandunmatched '['unmatched .end directiveunpredictable DCTI coupleunpredictable load of register -- `%s'unpredictable load of register pair -- `%s'unpredictable transfer with writeback -- `%s'unpredictable: identical transfer and status registers --`%s'unrecognised RX CPU type %sunrecognised alignment value in .SECTION directive: %sunrecognised argument to -mcpu option '%s'unrecognised cpu type '%s'unrecognised instruction %sunrecognised instruction size modifier .%cunrecognized %d-bit version of microMIPS opcodeunrecognized .linkonce type `%s'unrecognized .section attribute: want a,e,w,x,M,S,G,T or numberunrecognized CPS flagunrecognized characters at end of parallel processing insnunrecognized default cpu `%s'unrecognized emulation name `%s'unrecognized extended version of MIPS16 opcodeunrecognized flagunrecognized fopt optionunrecognized opcodeunrecognized opcode: `%s'unrecognized option "%s"unrecognized option -%c%sunrecognized pseudo-instruction %sunrecognized register name `%s'unrecognized reloc typeunrecognized relocation suffixunrecognized section attributeunrecognized section typeunrecognized stab type '%c'unrecognized symbol suffixunrecognized symbol type "%s"unrecognized syntax mode "%s"unrecognized unextended version of MIPS16 opcodeunresolvable or nonpositive repeat count; using 1unresolved expression that must be resolvedunresolved loop target symbol: %sunshifted register requiredunsigned value out of rangeunsupported BFD relocation size %dunsupported BFD relocation size %uunsupported alignment for instructionunsupported broadcastunsupported byte value; use a different suffixunsupported constant in relocationunsupported constant size %d
unsupported fixup size %dunsupported flag %i in line directiveunsupported fptr fixupunsupported fptr fixup size %dunsupported instruction `%s'unsupported large constantunsupported maskingunsupported mbind section info: %sunsupported relocationunsupported relocation against %sunsupported relocation for DS offset fieldunsupported relocation typeunsupported section attribute '%c'unsupported section attribute -- 'a'unsupported static rounding/saeunsupported symbol subtractionunsupported syntaxunsupported use of %sunsupported use of .ehwordunsupported use of .gpdwordunsupported use of .gpwordunsupported variable nop control in .nops directiveunsupported variable size or fill valueunsupported vector index registerunsupported with Intel mnemonicunterminated stringunterminated string; newline inserteduntil without repeatunwind opcode too longunwound frame has negative sizeunwound stack pointer not doubleword aligneduse -march=armv2use -march=armv2ause -march=armv3use -march=armv3muse -march=armv4use -march=armv4tuse -march=armv5use -march=armv5tuse -march=armv5teuse -mcpu=alluse -mcpu=arm1use -mcpu=arm2use -mcpu=arm250use -mcpu=arm3use -mcpu=arm6use -mcpu=arm600use -mcpu=arm610use -mcpu=arm620use -mcpu=arm7use -mcpu=arm70use -mcpu=arm700use -mcpu=arm700iuse -mcpu=arm710use -mcpu=arm7100use -mcpu=arm710cuse -mcpu=arm710tuse -mcpu=arm720use -mcpu=arm720tuse -mcpu=arm740tuse -mcpu=arm7500use -mcpu=arm7500feuse -mcpu=arm7duse -mcpu=arm7diuse -mcpu=arm7dmuse -mcpu=arm7dmiuse -mcpu=arm7muse -mcpu=arm7tdmiuse -mcpu=arm8use -mcpu=arm810use -mcpu=arm9use -mcpu=arm920use -mcpu=arm940use -mcpu=arm9tdmiuse -mcpu=iwmmxtuse -mcpu=strongarmuse -mcpu=strongarm110use -mcpu=strongarm1100use -mcpu=strongarm1110use -mcpu=xscaleuse -mfpu=fpa10use -mfpu=fpa11use -mfpu=fpeuse .code16 to ensure correct addressing modeuse either -mfpu=softfpa or -mfpu=softvfpuse frame pointeruse of .indirect_symbols requires `-dynamic'use of PC in this instruction is deprecateduse of old and new-style options to set CPU typeuse of old and new-style options to set FPU typeuse of r13 is deprecateduse of r15 in blx in ARM mode is not really usefuluse of r15 in bx in ARM mode is not really usefuluse of r15 in bxj is not really usefuluse stack size checkingused $%u with ".set at=$%u"used $at without ".set noat"using using `%s%s' instead of `%s%s' due to `%c' suffixusing a bit field width of zerovalid endian specifiers are be or levalue %d out of range. Use #lo() or #hi()value %ld out of rangevalue %lu is too large for a byte operandvalue 0x%I64x truncated to 0x%I64xvalue 0x%llx truncated to 0x%llxvalue 0x%lx truncated to 0x%lxvalue 0x%x out of extended range.value not in range [-0xffffffff, 0xffffffff]value not in range [0, 0x7fffffff]value not in range [0, 0xffffffff]value of %ld out of byte displacement range.value of %ld out of double word displacement range.value of %ld out of word displacement range.value of %ld too large for 16-bit branchvalue of %ld too large for 8-bit branchvalue of %s too large for field of %d byte at %svalue of %s too large for field of %d bytes at %svalue out of rangevalue out of range: 0x%xvalue stored for r%d is UNKNOWNvalue too large for 1-byte fieldvalue too large for 2-byte fieldvalue too large to fit in %d bitsvector element must be constantvector register expectedvector type expectedvfmal/vfmsl with FP16 type cannot be conditional, the behaviour is UNPREDICTABLEview number mismatchvirtual memory exhaustedvliw group must consist of 1 core and 1 copro insn.warn about symbols that match instruction names [default]warning: symbol %s has no csectwasm32 assembler options:
width suffixes are invalid in ARM modewidth suffixes are invalid in ARM mode -- `%s'word of NOPs added between word multiply and 16-bit multiplyword of NOPs added between word multiply and loadwriteback (!) must be used for VLDMDB and VSTMDBwriteback of base register is UNPREDICTABLEwriteback of base register when in register list is UNPREDICTABLEwriteback used in preload instructionwriteback value must be an immediate constantwriting or modifying # is unpredictablewriting to APSR without specifying a bitmask is deprecatedwrong argument to .cfi_personality_idwrong number of operandswrong number of operands for '%s'wrong register in floating-point reglistwrong second argument to .cfi_lsdawrong second argument to .cfi_personalitywrong size instruction in a %u-bit branch delay slotwrong third argument to .cfi_val_encoded_addrxtensa-isa failure: %syou can't `pop %scs'you must specify a single type onlyyou must use a hi/lo directive or 16-bit macro to load a 16-bit value.zdaoff() relocation used on an instruction which does not support itzero assumed for missing expressionzero flag is not valid for this instructionzero used as immediate valuezeroing-masking only allowed with write mask{standard input}Project-Id-Version: gas 2.31.90
Report-Msgid-Bugs-To: bug-binutils@gnu.org
POT-Creation-Date: 2019-01-19 16:32+0000
PO-Revision-Date: 2019-12-25 13:46+0800
Last-Translator: Sebastian Rasmussen <sebras@gmail.com>
Language-Team: Swedish <tp-sv@listor.tp-sv.se>
Language: sv
MIME-Version: 1.0
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Content-Transfer-Encoding: 8bit
X-Bugs: Report translation errors to the Language-Team address.
Plural-Forms: nplurals=2; plural=(n != 1);
X-Generator: Poedit 2.2.4
			  kompatibilitetslÃ¤ge fÃ¶r TI CodeComposer Studio-syntax			[standard Ã¤r %d]
			[standard Ã¤r %s]


			ange variant av SPARC-arkitekturen
-bump			varna nÃ¤r assembler byte arkitektur
-sparc			hoppas Ã¶ver
--enforce-aligned-data	tvinga .long, etc att justeras korrekt
-relax			anvÃ¤nd hopp- och grenlÃ¤ttnad (standard)
-no-relax		undvik att Ã¤ndra hopp och grenar

	%s 
 NDS32-specifika assemblerflaggor:

 inmatningsfil 	: %s
 flaggor angivna	: 
 utmatningsfil 	: %s
 mÃ¥l           	: %s
 tidsstÃ¤mpel   	: %s


-no-relax		lÃ¤tta inte upp omlokaliseringar
			

D30V-flaggor:
-O                      GÃ¶r intilliggande korta instruktioner parallella om mÃ¶jligt.
-n                      Varna om alla NOP:ar som infogas av assemblern.
-N                      Varna om NOP:ar som infogats efter multipler av ord.
-c                      Varna om symboler vilkas namn matchar registernamn.
-C                      Motsatsen till -C. -c Ã¤r standard.

TIC4X-flaggor:
  -mcpu=CPU  -mCPU        vÃ¤lj arkitekturvariant. CPU kan vara:
                            30 - TMS320C30
                            31 - TMS320C31, TMS320LC31
                            32 - TMS320C32
                            33 - TMS320VC33
                            40 - TMS320C40
                            44 - TMS320C44
  -mrev=REV               vÃ¤lj cpu hÃ¥rdvaruversion (heltalsnummer).
                          Kombinationer av -mcpu och -mrev kommer att aktivera/
                          inaktivera lÃ¤mpliga flaggor (-midle2, -mlowpower och
                          -menhanced) enligt vald typ
  -mbig                   vÃ¤lj stor minnesmodell
  -msmall                 vÃ¤lj liten minnesmodell (standard)
  -mregparm               vÃ¤lj registerparametrar (standard)
  -mmemparm               vÃ¤lj minnesparametrar
  -midle2                 aktivera IDLE2-stÃ¶d
  -mlowpower              aktivera LOPOWER- och MAXSPEED-stÃ¶d
  -menhanced              aktivera fÃ¶rbÃ¤ttrat opkodsstÃ¶d
                                         begrÃ¤nsningskrÃ¤nkningar
                                         fÃ¶r begrÃ¤nsningskrÃ¤nkningar
                                         instruktioner kan krÃ¤nka begrÃ¤nsningar
                                         kan krÃ¤nka begrÃ¤nsningar
                          UTÃKNING Ã¤r en kombination av:
                          Register kommer inte att behÃ¶va nÃ¥got prefix.
                          Register kommer att krÃ¤va ett â$â-prefix.
                          emulera utdata (standard %s)
                          generera gemensamma ELF-symboler med STT_COMMON-typ
                          generera GNU byggnoteringar om inga finns i indatan
                          generera lÃ¤ttnadsomlokaliseringar
                          generera anvÃ¤nda x86-ISA- och funktionsegenskaper
                          anvÃ¤nd AT&T/Intel-mnemonic
                BestÃ¤m cpu-typen
        -EB		assemblera kod fÃ¶r cpu med rak byteordning
        -EL		assemblera koda fÃ¶r cpu med omvÃ¤nd byteordning
        -FIXDD		fixa databeroenden
        -G gpnum	assemblera kod fÃ¶r instÃ¤llning av gpsize, standardvÃ¤rdet Ã¤r 8 byte
        -KPIC		generera PIC
        -NWARN		skriv inte ut varningsmeddelanden nÃ¤r databeroenden fixas
        -O0		utfÃ¶r inte nÃ¥gra optimeringar
        -SCORE3		assemblera kod fÃ¶r mÃ¥let SCORE3
        -SCORE5		assemblera kod fÃ¶r mÃ¥let SCORE5
        -SCORE5U	assemblera kod fÃ¶r mÃ¥let SCORE5U
        -SCORE7		assemblera kod fÃ¶r mÃ¥let SCORE7 [standard]
        -USE_R1		assemblera kod utan varningsmeddelande nÃ¤r temporÃ¤rregister r1 anvÃ¤nds
        -V 		Sunplus-version
        -V                skriv ut versionsnummer fÃ¶r assembler
        -Qy, -Qn          hoppas Ã¶ver
        -march=score3	assemblera kod fÃ¶r mÃ¥let SCORE3
        -march=score7	assemblera kod fÃ¶r mÃ¥let SCORE7 [standard]
        S390-flaggor:
        -mregnames        TillÃ¥t symboliska namn fÃ¶r register
        -mwarn-areg-zero  Varna vid noll bas/index-register
        -mno-regnames     TillÃ¥t inte symboliska namn fÃ¶r register
        -m31              StÃ¤ll in filformat till 31-bitarsformat
        -m64              StÃ¤ll in filformat till 64-bitarsformat
    oper var:    %s   menade du detta?   andra giltiga varianter:  --32/--64/--x32         generera 32-bitars/64-bitars/x32-kod
  --MD FIL                skriv beroendeinformation till FIL (standard ingen)
  --alternate             slÃ¥ inledningsvis pÃ¥ alternativ makrosyntax
  --compress-debug-sections[={none|zlib|zlib-gnu|zlib-gabi}]
                          komprimera DWARF-felsÃ¶kningssektioner med zlib
  --compress-debug-sections[={none|zlib|zlib-gnu|zlib-gabi}]
                          komprimera DWARF-felsÃ¶kningssektioner med zlib [standard]
  --debug-prefix-map GAMMAL=NEY
                          mappa om GAMMAL till NY i felsÃ¶kningsinformationen
  --defsym SYM=VÃR        definiera symbol SYM till givet vÃ¤rde
  --disp-size-default-22    hoppfÃ¶rskjutning med okÃ¤nd storlek Ã¤r 22 bitar (standard)
  --disp-size-default-32    hoppfÃ¶rskjutning med okÃ¤nd storlek Ã¤r 32 bitar
  --divide                behandla inte â/â som ett kommentarstecken
  --divide                hoppas Ã¶ver
  --elf-stt-common=[no|yes]   --execstack             krÃ¤v exekverbar stack fÃ¶r detta objekt
  --fatal-warnings        behandla varningar som fel
  --fdpic                 generera en FDPIC-objektfil
  --fix-v4bx              TillÃ¥t BX i ARMv4-kod
  --gdwarf-2              generera DWARF2-felsÃ¶kningsinformation
  --gdwarf-sections       generera sektionsnamn per funktion fÃ¶r DWARF-radinformation
  --generate-missing-build-notes=[no|yes]   --gstabs                generera STABS-felsÃ¶kningsinformation
  --gstabs+               generera STABS-felsÃ¶kningsinfo. med GNU-utÃ¶kningar
  --hash-size=<vÃ¤rde>     stÃ¤ll in storlek fÃ¶r hashtabell i nÃ¤rheten av <vÃ¤rde>
  --help                  visa detta meddelande och avsluta
  --itbl INSTTBL          utÃ¶ka instruktionsmÃ¤ngd sÃ¥ den inkluderar instruktioner
                          som matchar specifikationerna definierade i filen INSTTBL
  --listing-cont-lines    stÃ¤ll i maximalt antal fortsÃ¤ttningsrader som anvÃ¤nds
                          fÃ¶r utdatakolumnen i listningen
  --listing-lhs-width     stÃ¤ll in bredden i ord fÃ¶r utdatakolumnen i
                          listningen
  --listing-lhs-width2    stÃ¤ll in bredden i ord fÃ¶r fortsÃ¤ttningsraderna
                          i utdatakolumnen; hoppas Ã¶ver om mindre Ã¤n
                          bredden fÃ¶r den fÃ¶rsta raden
  --listing-rhs-width     stÃ¤ll in max bredd i tecken fÃ¶r raderna frÃ¥n
                          kÃ¤llfilen
  --m32bit-doubles  [standard]
  --m32bit-doubles [standard]
  --m64bit-doubles
  --m64bit-doubles  KÃ¤llkod anvÃ¤nder 64-bitar double-flyttal
  --march=<ark>		Generera kod fÃ¶r <ark>. Giltiga val fÃ¶r <ark>
				Ã¤r v0_v10, v10, v32 och common_v10_v32.
  --mbig-endian-data
  --mcpu=<rx100|rx200|rx600|rx610|rxv2|rxv3|rxv3-dfpu>
  --mg10            Aktivera stÃ¶d fÃ¶r G10-variant
  --mg13            VÃ¤ljer G13-kÃ¤rnan.
  --mg14            VÄºjer G14-kÃ¤rnan [standard]
  --mint-register=<value>
  --mlittle-endian-data [standard]
  --mno-allow-string-insns  --mpid
  --mrelax
  --mrelax          Aktivera lÃ¤nktidslÃ¤ttnad
  --mrl78           Alias fÃ¶r --mg14
  --msmall-data-limit
  --muse-conventional-section-names
  --muse-renesas-section-names [standard]
  --no-underscore         AnvÃ¤ndarsymboler har inte nÃ¥got prefix.
  --nocompress-debug-sections
                          komprimera inte DWARF-felsÃ¶kningssektioner
  --nocompress-debug-sections
                          komprimera inte DWARF-felsÃ¶kningssektioner [standard]
  --noexecstack           krÃ¤v inte exekverbar stack fÃ¶r detta objekt
  --pic			Aktivera generering av positionsoberoende kod.
  --reduce-memory-overheads 
                          fÃ¶redra mindre minnesanvÃ¤ndning till priset av
                          lÃ¤ngre assembleringstider
  --sectname-subst        aktivera ersÃ¤ttningssekvenser fÃ¶r sektionsnamn
  --size-check=[error|warning]
			  kontroll av ELF .size-direktiv (standard --size-check=error)
  --statistics            skriv ut diverse uppmÃ¤tt statistik fÃ¶r exekvering
  --strip-local-absolute  rensa bort lokala, absoluta symboler
  --target-help           visa mÃ¥lspecifika flaggor
  --traditional-format    AnvÃ¤nd samma format som inbyggd assembler nÃ¤r mÃ¶jligt
  --underscore            AnvÃ¤ndarsymboler inleds normalt med understreck.
  --version               skriv ut versionsnummer fÃ¶r assembler och avsluta
  --warn                  undertryck inte varningar
  -D                      producera assemblerfelsÃ¶kningsmeddelanden
  -EB                     assemblera kod fÃ¶r rak byteordnings-cpu
  -EB                     assemblera fÃ¶r ett system med rak byteordning (standard)
  -EL                     assemblera fÃ¶r ett system med omvÃ¤nd byteordning
  -EB  -mbig-endian		generera utdata enligt rak byteordning
  -EB,-big                producera kod och data med rak byteordning
  -EL                     assemblera kod fÃ¶r omvÃ¤nd byteordnings-cpu

  -EL  -mlittle-endian		generera utdata enlight omvÃ¤nd byteordning
  -EL, -mel eller -little Producera utmatning i omvÃ¤nd byteordning
  -EB, -meb eller -big    Producera utmatning i rak byteordning
  -mpic			  Generera PIC
  -mno-fp-as-gp-relax	  Undertryck fp-as-gp-lÃ¤ttnad fÃ¶r denna filen
  -mb2bb-relax		  Konsekutiv grenoptimering
  -mno-all-relax	  Undertryck alla lÃ¤ttnad fÃ¶r denna filen
  -EL,-little             producera kod och data med omvÃ¤nd byteordning
  -I KAT                  lÃ¤gg till KAT i sÃ¶klistan fÃ¶r .include-direktiv
  -Ip                     synonym fÃ¶r -ignore-parallel-conflicts
  -J                      varna inte om Ã¶verspill med tecken
  -K                      varna nÃ¤r skillnader Ã¤ndras fÃ¶r lÃ¥nga fÃ¶rskjutningar
  -KPIC                   generera PIC
  -L,--keep-locals        behÃ¥ll lokala symboler (t.ex. de som bÃ¶rjar med âLâ)
  -M,--mri                assemblera i MRI-kompatibilitetslÃ¤ge
  -N                      Varna nÃ¤r grenar expanderas till hopp.
  -O                      fÃ¶rsÃ¶k att optimera kod.  MedfÃ¶r -parallel
  -O1,			  Optimera fÃ¶r prestanda
  -Os			  Optimera fÃ¶r utrymme
  -Q                      hoppas Ã¶ver
  -Q                      hoppas Ã¶ver
  -V                      skriver ut versionsnummer fÃ¶r assembler
  -Q                      hoppas Ã¶ver
  -V                      skriv ut versionsnummer fÃ¶r assembler
  -EB/-EL                 generera fÃ¶r rak/omvÃ¤nd byteordning
  --32/--64               generera 32-/64-bitarskod
  -Q                      hoppas Ã¶ver
  -V                      skriv ut versionsnummer fÃ¶r assembler
  -k                      hoppas Ã¶ver
  -R                      fÃ¤ll in datasektion i textsektion
  -W  --no-warn           undertryck varningar
  -Wnp                    synonym fÃ¶r -no-warn-explicit-parallel-conflicts
  -Wnuh                   synonym fÃ¶r -no-warn-unmatched-high
  -Wp                     synonym fÃ¶r -warn-explicit-parallel-conflicts
  -Wuh                    synonym fÃ¶r -warn-unmatched-high
  -X                      hoppas Ã¶ver
  -Z                      generera objektfil Ã¤ven efter fel
  -c                      skriv ut en varning om en kommentar hittas
  -f                      hoppa Ã¶ver blankteckens- och kommentarshantering
  -fixed-special-register-names
                          TillÃ¥t endast originalnamn fÃ¶r specialregister.
  -force2bsr  -mforce2bsr	transformera jbsr till bsr
  -fpic  -pic			generera positionsoberoende kod
  -g --gen-debug          generera felsÃ¶kningsinformation
  -globalize-symbols      GÃ¶r alla symboler globala.
  -gnu-syntax             StÃ¤ng av kompatibilitet med mmixal-syntax.
  -h, -H                  Exekvera inte, skriv ut denna hjÃ¤lptext.  FÃ¶rÃ¥ldrad.
  -h-tick-hex              Ha stÃ¶d fÃ¶r hexkonstanter i H'00-stil
  -ignore-parallel-conflicts            kontrollera inte parallella instruktioner efter
  -jsri2bsr  -mjsri2bsr		transformera jsri till bsr
  -linker-allocated-gregs Om det inte finns nÃ¥gon lÃ¤mplig GREG-definition
                          fÃ¶r en instruktions operander, lÃ¥t lÃ¤nkaren lÃ¶sa upp det.
  -m%s%s
  -m32r                   inaktivera stÃ¶d fÃ¶r m32rx instruktionsuppsÃ¤ttning
  -m32r2                  ha stÃ¶d fÃ¶r utÃ¶kad m32r2 instruktionsuppsÃ¤ttning
  -m32rx                  ha stÃ¶d fÃ¶r utÃ¶kad m32rx instruktionsuppsÃ¤ttning
  -m4byte-align             Markera binÃ¤ren som att den anvÃ¤nder 32-bitars justering (standard)
  -m8byte-align             Markera binÃ¤ren som att den anvÃ¤nder 64-bitars justering
  -mEA
  -mbarrel-shifter
  -mbarrel_shifter
  -mcrc
  -mdsp-packa
  -mdsp_packa
  -mdvbf
  -mld-extension-reg-mask
  -mlock
  -mmac-24
  -mmac-d16
  -mmac_24
  -mmac_d16
  -mmin-max
  -mmin_max
  -mmul64
  -mno-mpy
  -mnorm
  -mrtsc
  -msimd
  -mswap
  -mswape
  -mtelephony
  -muser-mode-only
  -mxy
  -mN - infoga inte NOP:ar efter att ha Ã¤ndrat avbrott (standard)

  -mQ - aktivera lÃ¤ttnad i assembleringstid. FARLIGT!
  -mP - aktivera polymorfiska instruktioner
  -mY - varna inte dÃ¥ NOP:ar saknar efter att ha Ã¤ndrat avbrott

  -m[no-]%-17sAktivera/inaktivera %s
  -mach=<namn>             StÃ¤ll in H8300-maskintyp till endera av:
                           h8300h, h8300hn, h8300s, h8300sn, h8300sx, h8300sxn
  -madd-bnd-prefix        lÃ¤gg till BND-prefix fÃ¶r alla giltiga grenar
  -mall-ext		  SlÃ¥ pÃ¥ stÃ¶d fÃ¶r alla utÃ¶kningar och instruktioner
  -mall-opcodes    acceptera alla AVR-opkoder, Ã¤ven om de inte stÃ¶ds av MCU:n
  -mno-skip-bug    inaktivera varningar fÃ¶r Ã¶verhoppning av tvÃ¥ordsinstruktioner
                   (standard fÃ¶r avr4, avr5)
  -mno-wrap        avvisa rjmp/rcall-instruktioner med 8K omslag
                   (standard fÃ¶r avr3, avr5)
  -mrmw            acceptera Read-Modify-Write-instruktioner
  -mlink-relax     generera omlokaliseringar fÃ¶r lÃ¤nkarlÃ¤ttnad (standard)
  -mno-link-relax  generera inte omlokaliseringar fÃ¶r lÃ¤nkarlÃ¤ttnad.
  -mgcc-isr        acceptera pseudoinstruktionen __gcc_isr.

  -mamd64                 acceptera endast AMD64 ISA [standard]
  -march=ARK			vÃ¤lj arkitektur ARK:  -march=ARK              aktivera instruktioner frÃ¥n arkitektur ARK
  -march=CPU[,+UTÃKNINGâ¦]
                          generera kod fÃ¶r CPU och UTÃKNING, CPU Ã¤r endera av:
  -march=ms1-16-002         tillÃ¥t ms1-16-002-instruktioner (standard)
  -march=ms1-16-003         tillÃ¥t ms1-16-003-instruktioner
  -march=ms1-64-001         tillÃ¥t ms1-64-001-instruktioner
  -march=ms2                tillÃ¥t ms2-instruktioner 
  -mavxscalar=[128|256] (standard: 128)
                          koda skalÃ¤ra AVX-instruktioner med specifik
                           vektorlÃ¤ngd
  -mbig-endian            generera kod enligt rak byteordning
  -mbig-obj               generera stora objektfiler
  -mbranch-stub			aktivera hoppstubbar fÃ¶r PC-relativa anrop
  -mcache			aktivera cache-fÃ¶rhandshÃ¤mtningsinstruktion
  -mcp				aktivera coprocessorinstruktioner
  -mcpu=<cpu[-sirevision]> ange namnet pÃ¥ mÃ¥l CPU:n
  -mcpu=CPU			vÃ¤lj processor CPU:  -md - Tvinga kopiering av data frÃ¥n ROM till RAM vid uppstart
  -mdata-region={none|lower|upper|either} - vÃ¤lj region som data kommer
    att placeras i.
  -mdsbt                  kod anvÃ¤nder DSBT-adressering
  -mdsp				aktivera DSP-instruktioner
  -medsp			aktivera fÃ¶rbÃ¤ttrade DSP-instruktioner
  -melrw			aktivera utÃ¶kad lrw (endast CK800)
  -mevexlig=[128|256|512] (standard: 128)
                          koda skalÃ¤ra EVEX-instruktioner med specifik
                           vektorlÃ¤ngd
  -mevexrcig=[rne|rd|ru|rz] (standard: rne)
                          koda EVEX-instruktioner med ett specifikt EVEX.RC-vÃ¤rde
                           fÃ¶r endast-SAE Ã¶verhoppade instruktioner
  -mevexwig=[0|1] (standard: 0)
                          koda EVEX-instruktioner med specifikt EVEX.W-vÃ¤rde
                           fÃ¶r EVEX.W-bitÃ¶verhoppade instruktioner
  -mextension               aktivera stÃ¶d fÃ¶r opkodsutÃ¶kning
  -mfdpic                  assemblera fÃ¶r FDPIC ABI:t
  -mfence-as-lock-add=[no|yes] (standard: no)
                          koda lfence, mfence och sfence som
                           lock addl $0x0, (%%{re}sp)
  -mgcc-abi                 Markera binÃ¤ren som att den anvÃ¤nder det gamla GCC-ABI:t
  -mhard-float			aktivera hÃ¥rda flyttalsinstruktioner
  -mhard-float              Markera binÃ¤ren som att den anvÃ¤nder FP-instr (standard fÃ¶r e2v3 och uppÃ¥t)
  -mindex-reg             ha stÃ¶d fÃ¶r pseudoindexregister
  -mintel64               acceptera endast Intel64 ISA
  -mip2022               begrÃ¤nsa till IP2022 instr 
  -mip2022ext            tillÃ¥t utÃ¶kade IP2022 instr
  -mistack			aktivera avbrottsstacksinstruktioner
  -ml - aktivera stor kodmodell
  -mlabr  -mliterals-after-br	mata ut literaler efter greninstruktioner
  -mlaf  -mliterals-after-func	mata ut literaler efter varje function
  -mlittle-endian         generera kod enligt omvÃ¤nd byteordning
  -mljump			transformera jbf, jbt, jbr till jmpi (endast CK800)
  -mmnemonic=[att|intel]   -mmp				aktivera multiprocessorinstruktioner
  -mn - infoga NOP efter att ha Ã¤ndrat avbrott
  -mnaked-reg             krÃ¤v inte â%%â-prefix fÃ¶r register
  -mno-bcond17		  inskativa b<vlkr> disp17-instruktion
  -mno-branch-stub
  -mno-dsbt               kod anvÃ¤nder inte DSBT-adressering
  -mno-elrw
  -mno-fdpic/-mnopic       inaktivera -mfdpic

  -mno-istack
  -mno-labr  -mnoliterals-after-br
  -mno-laf  -mno-literals-after-func
  -mno-ljump
  -mno-pic                kodadressering Ã¤r positionsberoenden
  -mno-stld23		  inaktivera st/ld offset23-instruktion
  -mnolrw  -mno-lrw		implementera lrw som movih + ori
  -momit-lock-prefix=[no|yes] (standard: no)
                          rensa bort alla lÃ¥sprefix
  -moperand-check=[none|error|warning] (standard: warning)
                          kontrollera giltighet av operandkombinationer
  -mpic                   kodadressering Ã¤r positionsoberoende
  -mpid=far               kod anvÃ¤nder positionsoberoende dataadressering,
                            GOT-Ã¥tkomst anvÃ¤nder fjÃ¤rr-DP-adressering
  -mpid=near              kod anvÃ¤nder positionsoberoende dataadressering,
                            GOT-Ã¥tkomst anvÃ¤nder nÃ¤rliggande-DP-adressering
  -mpid=no                kod anvÃ¤nder positionsberoenden dataadressering
  -mrelax                   Aktivera lÃ¤ttnad
  -mrelax                 aktivera lÃ¤ttnad
  -mrelax-relocations=[no|yes]   -mrh850-abi               Markera binÃ¤ren som att den anvÃ¤nder RH850-ABI:t (standard)
  -msecurity			aktivera sÃ¤kerhetsinstruktioner
  -mshared                inaktivera grenoptimering fÃ¶r delad kod
  -msilicon-errata=<namn>[,<namn>â¦] - aktivera rÃ¤ttningar fÃ¶r kiselfel
  -msilicon-errata-warn=<namn>[,<namn>â¦] - varna nÃ¤r rÃ¤ttning kan behÃ¶vas
   felnamn som stÃ¶ds: cpu4, cpu8, cpu11, cpu12, cpu13, cpu19
  -msoft-float              Markera binÃ¤ren som att den inte anvÃ¤nder FP-instr (standard fÃ¶r allt fÃ¶re e2v3)
  -msse-check=[none|error|warning] (standard: warning)
                          kontrollera SSE-instruktioner
  -msse2avx               koda SSE-instruktioner med VEX-prefix
  -msyntax=[att|intel] (standard: att)
                          anvÃ¤nd AT&T/Intel-syntax
  -mtrust			aktivera fÃ¶rtroendeinstruktioner
  -mtune=CPU              optimera fÃ¶r CPU, CPU Ã¤r endera av:
  -mv850                    Kodens mÃ¥l Ã¤r v850
  -mv850e                   Kodens mÃ¥l Ã¤r v850e
  -mv850e1                  Kodens mÃ¥l Ã¤r v850e1
  -mv850e2                  Kodens mÃ¥l Ã¤r v850e2
  -mv850e2v3                Kodens mÃ¥l Ã¤r v850e2v3
  -mv850e2v4                Alias fÃ¶r -mv850e3v5
  -mv850e3v5                Kodens mÃ¥l Ã¤r v850e3v5
  -mvdsp			aktivera vektor-DSP-instruktioner
  -mvexwig=[0|1] (standard: 0)
                          koda VEX-instruktioner med specifikt VEX.W-vÃ¤rde
                           fÃ¶r VEX.W-bitÃ¶verhoppade instruktioner
  -mwarn-signed-overflow    Varna vid Ã¶verspill fÃ¶r omedelbara vÃ¤rden med tecken
  -mwarn-unsigned-overflow  Varna vid Ã¶verspill fÃ¶r omedelbara vÃ¤rden utan tecken
  -mx86-used-note=[no|yes]   -my - varna dÃ¥ NOP:ar saknas efter att ha Ã¤ndrat avbrott (standard)

  -n                      Optimera inte kodjustering
  -q                      tysta vissa varningar
  -nIp                    synonym fÃ¶r -no-ignore-parallel-conflicts
  -no-bitinst             tillÃ¥t inte M32R2:s utÃ¶kade bitfÃ¤ltsinstruktioner
  -no-expand              Expandera inte GETA, grenar, PUSHJ eller JUMP
                          till flera instruktioner.
  -no-force2bsr  -mno-force2bsr
  -no-ignore-parallel-conflicts         kontrollera parallella instruktioner efter
  -no-jsri2bsr  -mno-jsri2bsr
  -no-merge-gregs         LÃ¤gg inte samma GREG-definitioner med nÃ¤rliggande vÃ¤rden.
  -no-pad-sections        fyll inte slutet av sectioner upp till justeringsgrÃ¤nser
  -no-parallel            inaktivera -parallel
  -no-predefined-syms     TillhandahÃ¥ll inte inbyggda mmixal-konstanter.
                          MedfÃ¶r -fixed-special-register-names.
  -no-warn-explicit-parallel-conflicts  varna inte nÃ¤r parallella
  -no-warn-unmatched-high varna inta om missade lÃ¥ga omlokaliseringar
  -nocpp                  hoppas Ã¶ver
  -nosched                  inaktivera schemalÃ¤ggningsrestriktioner
  -o OBJFIL               namnge utdataobjektfilen OBJFIL (standard a.out)
  -parallel               fÃ¶rsÃ¶k att kombinera instruktioner parallellt
  -relax                  Skapa kod lÃ¤mplig fÃ¶r lÃ¤nkarlÃ¤ttnad.
  -s                      hoppas Ã¶ver
  -w                      hoppas Ã¶ver
  -warn-explicit-parallel-conflicts     varna nÃ¤r parallella instruktioner
  -warn-unmatched-high    varna nÃ¤r en (s)hÃ¶g omlokaliseringen inte har nÃ¥gon matchande lÃ¥g omlokalisering
  -x                      Varna inte nÃ¤r en operand till GETA, en gren,
                          PUSHJ eller JUMP inte sÃ¤kert Ã¤r inom intervall.
                          LÃ¤nkaren kommer att fÃ¥nga sÃ¥dana fel. MedfÃ¶r
                          -linker-allocated-gregs.  -xauto		  ta automatiskt bort beroendekrÃ¤nkningar (standard)
  -xnone		  slÃ¥ av kontroll av beroendekrÃ¤nkningar
  -xdebug		  felsÃ¶k kontroll av beroendekrÃ¤nkningar
  -xdebugn		  felsÃ¶k kontroll av beroendekrÃ¤nkningar men slÃ¥ av
			  kontroll av beroendekrÃ¤nkningar
  -xdebugx		  felsÃ¶k kontroll av beroendekrÃ¤nkningar och slÃ¥ pÃ¥
			  kontroll av beroendekrÃ¤nkningar
  @FIL                    lÃ¤s flaggor frÃ¥n FIL
 %s; (standard) *input_line_pointer == â%câ 0x%02x
 AArch64-specifika assemblerflaggor:
 ARM-specifika assemblerflaggor:
 Blackfin-specifika assemblerflaggor:
 FR30-specifika kommandoradsflaggor:
 GNU assembler version %s (%s)
	 anvÃ¤nder BFD version %s. H8300-specifika assemblerflaggor:
 M32C-specifika kommandoradsflaggor:
 M32R-specifika kommandoradsflaggor:
 MMIX-specifika kommandoradsflaggor:
 Meta-specifika kommandoradsflaggor:
 RL78-specifika kommandoradsflaggor:
 RX-specifika kommandoradsflaggor:
 Score-specifika assemblerflaggor:
 V850-flaggor:
 XC16X-specifika kommandoradsflaggor:
 XSTORMY16-specifika kommandoradsflaggor:
 Z8K-flaggor
  -z8001                  generera segmenterad kod
  -z8002                  generera osegmenterad kod
  -linkrelax              skapa lÃ¤nkaravslappningsbar kod
 grenomlokalisering trunkerad (0x%x)  [-2^9 ~ 2^9-1] grenomlokalisering trunkerad (0x%x) [-2^19 ~ 2^19-1] grenomlokalisering trunkerad (0x%x) [-2^9 ~ 2^9-1]!%s anvÃ¤nder inte ett sekvensnummer!samegp omlokalisering mot symbol utan .prologue: %sâ%dâ (instans nummer %d av en %s-etikett)â.elseâ utan matchande â.ifââ.elseifâ efter â.elseââ.elseifâ utan matchande â.ifââ.endifâ utan â.ifâ# Exempel pÃ¥ â%sâ-instruktioner
	.sect .text
_start:
# fÃ¶rbjuder register# stÃ¥r i konflikt med lÃ¤ngd#4 inte giltig fÃ¶r H8/300.#<imm16>#<imm8>#<mask>$DPR_BYTE stÃ¶ds inte i detta sammanhang$DPR_GOT stÃ¶ds inte i detta sammanhang$DPR_HWORD stÃ¶ds inte i detta sammanhang$DPR_WORD stÃ¶ds inte i detta sammanhang$DSBT_INDEX mÃ¥ste anvÃ¤ndas med __c6xabi_DSBT_BASE$DSBT_INDEX stÃ¶ds inte i detta sammanhang$GOT stÃ¶ds inte i detta sammanhang$PCR_OFFSET stÃ¶ds inte i detta sammanhang$dbg och $depc Ã¤r inaktiverade nÃ¤r DEBUG Ã¤r av$hi och $lo Ã¤r inaktiverad nÃ¤r MUL och DIV Ã¤r av$mb0, $me0, $mb1 och $me1 Ã¤r inaktiverade nÃ¤r COP Ã¤r av%-operator behÃ¶ver absolut uttryck%%%s() mÃ¥ste vara den yttersta termen i uttrycket%%hi16/%%lo16 tillÃ¤mpas endast fÃ¶r .short eller .hword%%hi8 tillÃ¤mpas endast fÃ¶r .byte%d fel%d fel%d varning%d varningar%s %s -- â%sâ%s -- sats â%sâ Ã¶verhoppad%s NOP infogad%s â%sâ har redan ett alias â%sâ%s-argument mÃ¥ste vara en strÃ¤ng%s vid operand %d -- â%sâ%s-direktiv har inget namn%s fÃ¶r â%sâ%s fÃ¶r instruktion â%sâ%s hur man gÃ¶r matchar inte storlek/pcrel i gas%s-instruktion accepterar inte ett .b-suffix%s-instruktion, operand %d matchar inte%s Ã¤r aktiverat pÃ¥ grund av vle-flaggan%s anvÃ¤nds inte fÃ¶r det valda mÃ¥let%s fÃ¥r inte uppta hoppluckan fÃ¶r en annan hopp-instr.%s mÃ¥ste vara %d vid operand %d -- â%sâ%s mÃ¥ste ha ett konstant vÃ¤rde%s Ã¤r inte inaktiverat av vle-flaggan%s stÃ¶ds inte i MIPS16-lÃ¤ge%s avstÃ¥nd %d utanfÃ¶r intervall%s-avstÃ¥nd %d utanfÃ¶r intervall %d till %d%s utanfÃ¶r intervall (%d Ã¤r inte en multipel av %d)%s utan fÃ¶r intervallet %d till %d vid operand %d -- â%sâ%s utanfÃ¶r intervall (%d Ã¤r inte mellan %d och %d)%s utanfÃ¶r intervall (0x%s Ã¤r inte mellan 0x%s och 0x%s)%s-register samma som Ã¥terskrivninsbas%s omlokaliseringar fÃ¥r inte plats i %d byte%s omlokaliseringar fÃ¥r inte plats i %d byte%s-omlokaliseringar fÃ¥r inte plats i %u byte%s-omlokaliseringar fÃ¥r inte plats i %u byte%s krÃ¤ver vÃ¤rde 0-2 som operand 1%s andra argumentet kan inte vara ett negativt tal %d%s fÃ¶rkortat till %sRekursion fÃ¶r symbol %s stoppad vid andra fÃ¶rekomsten av â%sâ%s stÃ¶ds inte%s stÃ¶ds inte som instruktionuppfixning%s stÃ¶ds inte fÃ¶r denna instruktion%s utan %s%s, %s, genererar felaktig objektfil
%s, hanterar varningar som fel%s: fÃ¶rsÃ¶k att rotera PC-registret%s: globala symboler stÃ¶ds inte i generella sektioner%s: ingen sÃ¥dan sektion%s utdata frÃ¥n fÃ¶rsta instruktionen Ã¤r den samma som indata till andra instruktionen - Ã¤r detta avsiktligt?%s: utdata frÃ¥n andra instruktionen Ã¤r den samma som indata till fÃ¶rsta instruktionen - Ã¤r detta avsiktligt?%s: total tid fÃ¶r assemblering: %ld.%06ld
%s: ovÃ¤ntad funktionstyp: %d%s: okÃ¤nt processornamn%s: skulle ha avslutat svagref-loop: %s%s:%u felaktigt returvÃ¤rde frÃ¥n bfd_install_relocation: %x%u-byte omlokalisering kan inte tillÃ¤mpas fÃ¶r ett %u-byte fÃ¤ltâ%.*sâ-instruktion inte vid bÃ¶rjan av exekveringspaketâ%.*sâ-instruktion inte i en mjukvarurÃ¶rledad loopâ%.*sâ-instruktion stÃ¶ds inte fÃ¶r denna arkitekturâ%.*sâ-instruktion stÃ¶ds inte fÃ¶r denna funktionella enhetâ%.*sâ-instruktion stÃ¶ds inte fÃ¶r denna funktionella enhet fÃ¶r denna arkitekturâ%sâ kan inte vara en weak_definition (stÃ¶ds fÃ¶r nÃ¤rvarande endast i sektioner av sammanlagd typ)â%sâ kan inte vara en weak_definition (dÃ¥ den Ã¤r odefinierad)â%sâ Ã¤r inte repeterbar. Resulterande beteende Ã¤r odefinierad.â%sâ Ã¤r endast tillgÃ¤nglig i DD2.0 eller hÃ¶gre.â%sâ kan inte buntas ihop med andra instruktioner.â%sâ tidigare deklarerad som â%sâ.â%sâ: endast NOP-instruktionen fÃ¥r utfÃ¤rdas parallellt pÃ¥ m32râ)â krÃ¤vsâ,â fÃ¶rvÃ¤ntatâAPSRâ, âCPSRâ eller âSPSRâ fÃ¶rvÃ¤ntadesâASRâ krÃ¤vsâHâ-modifierar endast giltig fÃ¶r ackumulatorregisterâLâ-modifierare inte giltig fÃ¶r denna instruktionâLSLâ eller âASRâ krÃ¤vsâLSLâ krÃ¤vs'MFC_RdTagMask' (kanal 12) Ã¤r endast tillgÃ¤nglig i DD2.0 eller hÃ¶gre.âPâ-, âNâ- eller âZâ-flaggor fÃ¥r endast anges vid ackumuleringâRORâ-skift tillÃ¥ts ing'SPU_RdEventMask' (kanal 11) Ã¤r endast tillgÃ¤nglig i DD2.0 eller hÃ¶gre.â[â fÃ¶rvÃ¤ntadâ[â fÃ¶rvÃ¤ntades efter PLD-mnemonicâ[â fÃ¶rvÃ¤ntades efter PLI-mnemonicâ]â fÃ¶rvÃ¤ntadesâ||â efter predikatâ||â stÃ¶ds inte av instruktionâ||^â utan fÃ¶regÃ¥ende SPMASKâ}â fÃ¶rvÃ¤ntat vid slutat av ett âoptionâ-fÃ¤lt(PC)+ opÃ¥litligt(KrÃ¤ver %s; begÃ¤rd arkitektur Ã¤r %s.)(standard: att)
(standard: intel)
(standard: nej)
(standard: ja)
(plt) Ã¤r endast giltigt fÃ¶r grenmÃ¥l(okÃ¤nd orsak)*<abs8>-%s stÃ¥r i konflikt med de andra arkitekturflaggorna, vilka medfÃ¶r -%s-(PC) opÃ¥litligt-- oterminerad strÃ¤ng--absolut-literals-flagga stÃ¶ds inte i Xtens-konfiguration--compress-debug-sections=%s stÃ¶ds inte--density-flaggan Ã¶verhoppad--fdpic			generera en FDPIC-objektfil
--generics Ã¤r fÃ¶rÃ¥ldrat; anvÃ¤nd --transform istÃ¤llet--gstabs stÃ¶ds inte fÃ¶r ia64--hash-size behÃ¶ver ett numeriskt argument--no-density-flaggan Ã¶verhoppad--no-generic Ã¤r fÃ¶rÃ¥ldrat; anvÃ¤nd --no-transform istÃ¤llet--no-relax Ã¤r fÃ¶rÃ¥ldrat; anvÃ¤nd --no-transform istÃ¤llet--no-underscor Ã¤r ogiltigt med a.out-format--nops behÃ¶ver ett numeriskt argument--pic Ã¤r ogiltigt fÃ¶r detta objektformat--relax Ã¤r fÃ¶rÃ¥ldrat; anvÃ¤nd --transform istÃ¤llet-32			skapa 32-bitars objektfiler
-64			skapa 64-bitars objektfiler
-32			skapa o32 ABI-objektfil%s
-64			skapa 64 ABI-objektfil%s
-EL			generera kod fÃ¶r en maskin med omvÃ¤nd byteordning
-EB			generera kod fÃ¶r en maskin med rak byteordning
--little-endian-data	generera kod fÃ¶r en maskin som har kod enligt
                        rak byteordning och data enligt omvÃ¤nd byteordning.
-G fÃ¥r inte anvÃ¤ndas i positionsoberoende kod-G kan inte anvÃ¤ndas med SVR4 PIC-kod-G kan inte anvÃ¤ndas med abicalls-G n            Placera data <= n byte i det lilla dataomrÃ¥det

-G stÃ¶ds inte i denna konfiguration-KPIC			generera PIC
-V			skriv ut versionsnummer fÃ¶r assembler
-undeclared-regs	hoppa Ã¶ver global registeranvÃ¤ndning fÃ¶r program utan
			lÃ¤mpliga .register-direktiv (standard)
-no-undeclared-regs	tvinga fel vid anvÃ¤ndning av global registeranvÃ¤ndning
			utan lÃ¤mpligt .register-direktiv
--dcti-couple-detect	varna nÃ¤r ett ofÃ¶rutsÃ¤gbar DCTI-par hittas
-q			hoppas Ã¶ver
-Qy, -Qn		hoppas Ã¶ver
-s			hoppas Ã¶ver
-KPIC, -call_shared	generera positionsoberoende SVR4-kod
-call_nonpic		generera icke-positionsoberoende kod som kan fungera med DSO:er
-mvxworks-pic		generera positionsoberoende VxWorks-kod
-non_shared		generera inte kod som kan fungera med DSO:er
-xgot			antag en 32-bitars GOT
-mpdr, -mno-pdr		aktivera/inaktivera skapande av .pdf-sektioner
-mshared, -mno-shared   inaktivera/aktivera .cpload-optimering fÃ¶r
                        positionsberoende (ej delad) kod
-mabi=ABI		skapa objektfil som stÃ¤mmer med ABI fÃ¶r:
-R-flaggan stÃ¶ds inte fÃ¶r detta mÃ¥l.-TSO			anvÃ¤nd Total Store Ordering
-PSO			anvÃ¤nd Partial Store Ordering
-RMO			anvÃ¤nd Relaxed Memory Ordering
-l			anvÃ¤nd 1 ord fÃ¶r referenser till odefinierade symboler [standard 2]
-pic, -k		generera positionsoberoende kod
-S			fÃ¶rvandla jbsr till jsr
--pcrel                 fÃ¶rvandla aldrig PC-relativa grenar till absoluta hopp
--register-prefix-optional
			kÃ¶n igen registernamn utan prefixtecken
--bitwise-or		behandla inte â|â som ett kommentarstecken
--base-size-default-16	basreg utan storlek Ã¤r 16 bitar
--base-size-default-32	basreg utan storlek Ã¤r 32 bitar (standard)
--disp-size-default-16	fÃ¶rskjutning med okÃ¤nd storlek Ã¤r 16 bitar
--disp-size-default-32	fÃ¶rskjutning med okÃ¤nd storlek Ã¤r 32 bitar (standard)
-mCPU			ekvivalent med -march=CPU -mtune=CPU. FÃ¶rÃ¥ldrad.
-no-mCPU		generera inte kod specifik fÃ¶r CPU:n.
			FÃ¶r -mCPU och -no-mCPU, mÃ¥ste CPU vara endera av:
-mPIC           Markera generera fil som att den anvÃ¤nder stor positionsoberoende kod
-m[no-]%-16s aktivera/inaktivera %s-arkitektur utÃ¶kning
-maltivec               generera kod fÃ¶r AltiVec
-mvsx                   generera kod fÃ¶r Vector-Scalar (VSX)-instruktioner
-me300                  generera kod fÃ¶r PowerPC e300-familjen
-me500, -me500x2        generera kod fÃ¶r Motorola e500-kÃ¤rnkomplex
-me500mc,               generera kod fÃ¶r Freescale e500mc-kÃ¤rnkomplex
-me500mc64,             generera kod fÃ¶r Freescale e500mc64-kÃ¤rnkomplex
-me5500,                generera kod fÃ¶r Freescale e5500-kÃ¤rnkomplex
-me6500,                generera kod fÃ¶r Freescale e6500-kÃ¤rnkomplex
-mspe                   generera kod fÃ¶r Motorola SPE-instruktioner
-mspe2                  generera kod fÃ¶r Motorola SPE2-instruktioner
-mvle                   generera kod fÃ¶r Freescale VLE-instruktioner
-mtitan                 generera kod fÃ¶r AppliedMicro Titan-kÃ¤rnkomplex
-mregnames              TillÃ¥t symboliska namn fÃ¶r register
-mno-regnames           TillÃ¥t inte symboliska namn fÃ¶r register
-march=%s Ã¤r inte kompatibel med det valda ABI:t-march=<ark>		stÃ¤ll in arkitektur
-mcpu=<cpu>		stll in cpu [standard %s]
-mcpu stÃ¥r i konflikt med -march-flagga, anvÃ¤nder -mcpu-mcpu stÃ¥r i konflikt med andra modellparametrar, anvÃ¤nder -mcpu-mcpu=<CPU-version>       Ange CPU-versionen
-mcpu={fr500|fr550|fr400|fr405|fr450|fr300|frv|simple|tomcat}
-mcrc			generera CRC-instruktioner
-mno-crc		generera inte CRC-instruktioner
-mdouble        Markera generera fil som att den anvÃ¤nder dubbelprecisions FP instr
-mdsp			generera DSP-instruktioner
-mno-dsp		generera inte DSP-instruktioner
-mdspr2			generera DSP R2-instruktioner
-mno-dspr2	\generera inte DSP R2-instruktioner
-mdspr3			generera DSP R3-instruktioner
-mno-dspr3	\generera inte DSP R3-instruktioner
-mdword         Markera generera fil som att den anvÃ¤nder 8-byte stackjustering
-me <filnamn>             Omdirigera fel till en fil
flaggan -medsp stÃ¶ds endast av ck803s, hoppar Ã¶ver -medsp-merrors-to-file <filnamn>
-mfar-mode | -mf          AnvÃ¤nd utÃ¶kad adressering
-mfdpic         Assemblera fÃ¶r FDPIC ABI:t
-mfix-loongson2f-jump	lÃ¶sning fÃ¶r Loongson2F JUMP-instruktioner
-mfix-loongson2f-nop	lÃ¶sning fÃ¶r Loongson2F NOP-errata
-mfix-vr4120		lÃ¶sning fÃ¶r specifika VR4120-errata
-mfix-vr4130		lÃ¶sning fÃ¶r VR4130 mflo/mfhi-errata
-mfix-24k		infoga en nop efter ERET- och DERET-instruktioner
-mfix-cn63xxp1		lÃ¶sning fÃ¶r CN63XXP1 PREF-errata
-mfix-r5900		arbeta runt errata fÃ¶r kort loop pÃ¥ R5900
-mgp32			anvÃ¤nd 32-bitars GPRs, oberoende av vald ISA
-mfp32			anvÃ¤nd 32-bitars FPRs, oberoende av vald ISA
-msym32			antag att alla symbole har 32-bitars vÃ¤rden
-O0			ta inte bort onÃ¶diga NOP:ar, vÃ¤xla inte grenar
-O, -O1			ta bort onÃ¶diga NOP:ar, vÃ¤xla inte grenar
-O2			ta bort onÃ¶diga NOP:ar och vÃ¤xla grenar
--trap, --no-break	fÃ¥nga undantag vid division med 0 och mult. Ã¶verspill
--break, --no-trap	avbryt exekvering vid division med 0 och mult. Ã¶verspill
-mfpr-32        Markera genererad fil som att den endast anvÃ¤nder 32 FPRs
-mfpr-64        Markera genererad fil som att den anvÃ¤nder alla 64 FPRs
-mginv			generera GINV-instruktioner (Global INValidate)
-mno-ginv		generara inte GINV-instruktioner
-mgpr-32        Markera genererad fil som att den endast anvÃ¤nder 32 GPRs
-mgpr-32        Markera genererad fil som att den anvÃ¤nder alla 64 GPRs
-mhard-float		tillÃ¥t flyttalsinstruktioner
-msoft-float		tillÃ¥t inte flyttalsinstruktioner
-msingle-float		tillÃ¥t endast 32-bitars flyttalsinstruktioner
-mdouble-float		tillÃ¥t 32- och 64-bitars flyttalsinstruktioner
--[no-]construct-floats	tillÃ¥t (inte) konstruktion av flyttal
--[no-]relax-branch	tillÃ¥t (inte) grenar utanfÃ¶r intervall att lÃ¤ttas
-mignore-branch-isa	acceptera ogiltiga grenar som krÃ¤ver skiftning av ISA-lÃ¤ge
-mno-ignore-branch-isa	avvisa ogiltiga grenar som krÃ¤ver skiftning av ISa-lÃ¤ge
-mnan=KODNING		vÃ¤lj en IEEE 754 NaN-kodningskonvention, endera av:
-minsn32		generera endast 32-bitars microMIPS-instruktioner
-mno-insn32		generera alla microMIPS-instruktioner
-mips1			generera MIPS ISA I-instruktioner
-mips2			generera MIPS ISA II-instruktioner
-mips3			generera MIPS ISA III-instruktioner
-mips4			generera MIPS ISA IV-instruktioner
-mips5                  generera MIPS ISA V-instruktioner
-mips32                 generera MIPS32 ISA-instruktioner
-mips32r2               generera MIPS32 version 2 ISA-instruktioner
-mips32r3               generera MIPS32 version 3 ISA-instruktioner
-mips32r5               generera MIPS32 version 5 ISA-instruktioner
-mips32r6               generera MIPS32 version 6 ISA-instruktioner
-mips64                 generera MIPS64 ISA-instruktioner
-mips64r2               generera MIPS64 version 2 ISA-instruktioner
-mips64r3               generera MIPS64 version 3 ISA-instruktioner
-mips64r5               generera MIPS64 version 5 ISA-instruktioner
-mips64r6               generera MIPS64 version 6 ISA-instruktioner
-march=CPU/-mtune=CPU	generea kod/schema fÃ¶r CPU, dÃ¤r CPU Ã¤r endera av:
-mips16			generera mips16-instruktioner
-no-mips16		generera inte mips16-instruktioner
-mips16 kan inte anvÃ¤ndas med -micromips-mlibrary-pic   Markera genererad fil som att den anvÃ¤nder positionsoberoende kod fÃ¶r bibliotek
-mljump hoppas Ã¶ver fÃ¶r ck801/ck802-mloongson-cam		generera Loongson CAM-instruktioner (Content Address Memory)
-mno-loongson-cam	generera inte Loongson CAM-instruktioner
-mloongson-ext		generera Loongson EXT-instruktioner (EXTensions)
-mno-loongson-ext	generera inte Loongson EXT-instruktioner
-mloongson-ext2		generera Loongson EXT2-instruktioner (EXTensions R2)
-mno-loongson-ext2	generera inte Loongson EXT2-instruktioner
-mloongson-mmi		generera Loongson MMI-instruktioner (MultiMedia extensions Instructions)
-mno-loongson-mmi	generera inte Loongson MMI-instruktioner
-mmcu			generera MCU-instruktioner
-mno-mcu		generera inte MCU-instruktioner
-mmedia         Markera generera fil som att den anvÃ¤nder media instr
-mmicromips		generera microMIPS-instruktioner
-mno-micromips		generera inte microMIPS-instruktioner
-mmicromips kan inte anvÃ¤nda smed -mips16-mmips16e2			generera MIPS16e2-instruktioner
-mno-mips16e2		generera inte MIPS16e2-instruktioner
-mmsa			generera MSA-instruktioner
-mno-msa		generera inte MSA-instruktioner
-mmt			generera MT-instruktioner
-mno-mt			generera inte MT-instruktioner
-mmuladd        Markera generera fil som att den anvÃ¤nder flera add/sub instr
-mno-dword      Markera generera fil som att den anvÃ¤nder 4-byte stackjustering
-mno-force2bsr hoppas Ã¶ver fÃ¶r ck801/ck802-mno-force2bsr hoppas Ã¶ver med -mbranch-stub-mno-pack       TillÃ¥t inte instruktioner att packas
-mnopic         Inaktivera -mpic, -mPIC, -mlibrary-pic och -mfdpic
-mpack          TillÃ¥t instruktioner att packas
-mpic           Markera generera fil som att den anvÃ¤nder liten positionsoberoende kod
-mppc64, -m620          generera kod fÃ¶r PowerPC 620/625/630
-mppc64bridge           generera kod fÃ¶r PowerPC 64, inklusive brygginstr
-mbooke                 generera kod fÃ¶r 32-bit PowerPC BookE
-ma2                    generera kod fÃ¶r A2-arkitektur
-mpower4, -mpwr4        generera kod fÃ¶r Power4-arkitektur
-mpower5, -mpwr5, -mpwr5x
                        generera kod fÃ¶r Power5-arkitektur
-mpower6, -mpwr6        generera kod fÃ¶r Power6-arkitektur
-mpower7, -mpwr7        generera kod fÃ¶r Power7-arkitektur
-mpower8, -mpwr8        generera kod fÃ¶r Power8-arkitektur
-mpower9, -mpwr9        generera kod fÃ¶r Power9-arkitektur
-mcell                  generera kod fÃ¶r Cell Broadband Engine-arkitektur
-mcom                   generera kod fÃ¶r allmÃ¤nna Power/PowerPC-instruktioner
-many                   generera kod fÃ¶r vilken arkitektur som helst (PWR/PWRX/PPC)
-mrelocatable           ha stÃ¶d fÃ¶r GCC:s -mrelocatble-flagga
-mrelocatable-lib       ha stÃ¶d fÃ¶r GCC:s -mrelocatble-lib-flagga
-memb                   stÃ¤ll in PPC_EMB-biten bland ELF-flaggorna
-mlittle, -mlittle-endian, -le
                        generera kod fÃ¶r en maskin med omvÃ¤nd byteordning
-mbig, -mbig-endian, -be
                        generera kod fÃ¶r en maskin med rak byteordning
-msolaris               generera kod fÃ¶r Solaris
-mno-solaris            generera inte kod fÃ¶r Solaris
-K PIC                  stÃ¤ll in EF_PPC_RELOCATABLE_LIB bland ELF-flaggorna
-V                      skriv ut versionsnummer fÃ¶r assembler
-Qy, -Qn                hoppas Ã¶ver
-msmartmips		generera smartmips-instruktioner
-mno-smartmips		generera inte smartmips-instruktioner
-msoft-float    Markera generera fil som att den anvÃ¤nder mjukvaru-FP
-mtomcat-debug  FelsÃ¶k tomcat-lÃ¶sningar
-mtomcat-stats  Skriv ut statistik fÃ¶r tomcat-lÃ¶sningar
-mvirt			generera Virtualization-instruktioner
-mno-virt		generera inte Virtualization-instruktioner
-mxpa			generera eXtended Physical Address (XPA)-instruktioner
-mno-xpa		generera inte eXtended Physical Address (XPA)-instruktioner
-n32			skapa n32 ABI-objektfil%s
-nops=antal             vid justering anvÃ¤nder mer Ã¤n ANTAL NOP:ar en gren
-ppc476-workaround      varna om data matas ut till kodsektioner
.%s utanfÃ¶r %sâ¦.COMMon-lÃ¤ngd (%d.) < 0! Ãverhoppad..COMMon-lÃ¤ngd (%ld.) < 0! Ãverhoppad..COMMon-lÃ¤ngd (%lu) utanfÃ¶r intervall, Ã¶verhoppad.EQU mÃ¥ste anvÃ¤nda en etikett.EXIT mÃ¥ste finnas inom en procedur.REG-uttryck mÃ¥ste vara ett register.REG mÃ¥ste anvÃ¤nda en etikett.SCOMMon-lÃ¤ngd (%ld.) <0! Ãverhoppad..abiversion-uttryck berÃ¤knas inte till en konstant.abort detekterad.  Ãverger skeppet..arch <ark> krÃ¤ver en matchande --march=â¦-flagga.asmfunc pseudo-opkod endast tillgÃ¤nglig med -mccs-flagga..asmfunc repeterat..asmfunc utan funktion..attribute arch mÃ¥ste sÃ¤ttas fÃ¶re alla instruktioner.being [no-]density Ã¶verhoppad.begin-direktiv utan matchande .end-direktiv.begin-direktiv utan ett fÃ¶regÃ¥ende .ent-direktiv.begin-direktiv utan ett fÃ¶regÃ¥ende .file-direktiv.begin-literal Ã¤r fÃ¶rÃ¥ldrat; anvÃ¤nd .literal istÃ¤llet.begin/.bend i olika segment.bend-direktiv namnger okÃ¤nd symbol.bend-direktiv utan ett fÃ¶regÃ¥ende .ent-direktiv.bend-direktiv utan ett fÃ¶regÃ¥ende .file-direktiv.bss storlek %d < 0!.bss-storlek %ld < 0!Storleksargument till .bbs saknas
.bundle_align_mode-justering fÃ¶r stor (maximum %u).bundle_lock Ã¤r meningslÃ¶st utan .bundle_align_mode.bundle_lock-sekvens vid %u byte, men .bundle_align_mode-begrÃ¤nsing Ã¤r %u byte.bundle_lock-sekvens Ã¤r %u byte, men buntstorlek Ã¤r bara %u.bundle_lock utan motsvarande .bundle_unlock.bundle_unlock utan fÃ¶regÃ¥ende .bundle_lock.callinfo Ã¤r inte inom en procedurdefinition.cfi_endproc utan fÃ¶regÃ¥ende .cfi_startproc.cfi_fde_data stÃ¶ds inte fÃ¶r detta mÃ¥l.cfi_fde_data utan motsvarande .cfi_startproc.cfi_inline_lsda stÃ¶ds inte fÃ¶r detta mÃ¥l.cfi_inline_lsda inte giltig fÃ¶r denna ram.cfi_inline_lsda hittad i ram utan .cfi_lsda.cfi_lsda krÃ¤ver kodning- och symbolargument.cfi_personality krÃ¤ver kodning- och symbolargument.cfi_personality_id stÃ¶ds inte fÃ¶r detta mÃ¥l.compiler-direktiv saknar sprÃ¥k och version.compiler-direktiv saknar version.cpload Ã¤r inte i noreorder-sektion.def psuedo-opkod endast tillgÃ¤nglig med -mccs-flagga..def pseudoopkod anvÃ¤nd inuti .def/.endef: Ã¶verhoppad..def pseuod-op anvÃ¤nd inuti .def/.endef; Ã¶verhoppad.dim psuedo-opkod anvÃ¤nd utanfÃ¶r .def/.endef: Ã¶verhoppad..dim pseuod-op anvÃ¤nd utanfÃ¶r .def/.endef; Ã¶verhoppad.ef utan fÃ¶regÃ¥ende .function.end [no-]density Ã¶verhoppad.end-direktiv har inget namn.end-direktiv saknas eller okÃ¤nd symbol.end-direktiv namnger en annan symbol Ã¤n .ent.end-direktiv namnger okÃ¤nd symbol.end-direktiv utan fÃ¶regÃ¥ende .ent-direktiv.end-direktiv utan ett fÃ¶regÃ¥ende .ent-direktiv..end-direktiv utan ett fÃ¶regÃ¥ende .file-direktiv.end-direktiv utan matchande .ent.end inte i textsektion.end-symbol matchar inte .ent-symbol.end-symbol matchar inte .ent-symbol..end%c pÃ¥trÃ¤ffat utan fÃ¶regÃ¥ende %s.end%s utan fÃ¶regÃ¥ende .%s.endasmfunc pseudo-opkod endast tillgÃ¤nglig med -mccs-flagga..endasmfunc utan en .asmfunc..endasmfunc utan funktion..endef pseuod-op anvÃ¤nd fÃ¶re .def; Ã¶verhoppad.endef pseudoopkod anvÃ¤nd utanfÃ¶r .def/.endef: Ã¶verhoppad..endfunc saknas fÃ¶r fÃ¶regÃ¥ende .func.endfunc saknas fÃ¶r fÃ¶regÃ¥ende .proc.ent-direktiv har inget namn.ent-direktiv har ingen symbol.ent-direktiv utan matchande .end.ent eller .aent inte i textsektion.ent eller .aent inte i textsektion..err pÃ¥trÃ¤ffat.error-direktiv Ã¥beropat i kÃ¤llfil.es utan fÃ¶regÃ¥ende .bs.fail %ld pÃ¥trÃ¤ffat.fÃ¤lt-antal â%dâ utanfÃ¶r intervall (1 <= X <= 32).fill-storlek begrÃ¤nsad till %d.fmask utanfÃ¶r .ent.fnend-direktiv utan .fnstart.frame utanfÃ¶r .ent.gnu_attribute %d,%d Ã¤r inkompatibelt med â%sâ.gnu_attribute %d,%d stÃ¶ds inte lÃ¤ngre.gnu_attribute %d,%d Ã¤r inte ett igenkÃ¤nt flyttals-ABI.gnu_attribute %d,%d krÃ¤ver â%sâ.handler-direktiv har inget namnsyntaxfel fÃ¶r .ifeqs.incbin antal noll, hoppar Ã¶ver â%sâ.inst.n-operand fÃ¶r stor. AnvÃ¤nd .inst.w istÃ¤llet.largecomm stÃ¶ds endast i 64-bitarslÃ¤ge, producerar .comm.linkonce stÃ¶ds inte fÃ¶r detta objektfilsformat.literal inte tillÃ¥tet inom .begin literalomrÃ¥de.literal_position inuti literal-direktiv; Ã¶verhoppat.ln pseudoopkod inuti .def/.endif: Ã¶verhoppad..loc fÃ¶re .file.loc utanfÃ¶r .text.loc pseudoopkod inuti .def/.endef: Ã¶verhoppad..localentry-uttryck fÃ¶r â%sâ berÃ¤knas inte till en konstant.localentry-uttryck fÃ¶r â%sâ Ã¤r inte en giltig tvÃ¥potens.longcall-pseudo-op pÃ¥trÃ¤ffad nÃ¤r lÃ¤ttnad inte var aktiverad.longjump-pseudo-op pÃ¥trÃ¤ffad nÃ¤r lÃ¤ttnad inte var aktiveradstackÃ¶verspill fÃ¶r .machinestackunderspill fÃ¶r .machinestackÃ¶verspill fÃ¶r .machinemodestackunderspill fÃ¶r .machinemode.mask utanfÃ¶r .ent.mask/.fmask utanfÃ¶r .ent.module Ã¤r inte tillÃ¥tet efter att ha genererat kod.module anvÃ¤nt med okÃ¤nd symbol: %s
.name-direktiv har ingen symbol.name-direktiv inte i lÃ¤nkningssektion (.link).option pic%d stÃ¶ds inte.option pic%d stÃ¶ds inte i VxWorks PIC-lÃ¤ge.option pop utan .option push.pdesc-direktiv har ingen symbolpost.pdesc-direktiv inte i lÃ¤nkningssektion (.link).pdesc matchar inte med senaste .ent.pdesc har en felaktig ingÃ¥ngssymbol.popsection utan motsvarande .pushsection; Ã¶verhoppat.previous utan motsvarande .section; Ã¶verhoppat.profiler pseudo krÃ¤ver Ã¥tminstone tvÃ¥ operander..prologue-direkt utan ett fÃ¶regÃ¥ende .ent-direktiv.prologue inom prolog.ref utanfÃ¶r .csect.ref pseudo-opkod endast tillgÃ¤nglig med -mccs-flagga..sblock kan endast anvÃ¤ndas fÃ¶r initiering av sektioner.scl pseudoopkod anvÃ¤nd utanfÃ¶r .def/.endef: Ã¶verhoppad..scl pseuod-op anvÃ¤nd utanfÃ¶r .def/.endef; Ã¶verhoppad.sect: undersektionsnamn Ã¶verhoppat.set pop utan .set push.set-syntax ogiltig
.size-uttryck fÃ¶r %s utvÃ¤rderas inte till en konstant.size pseudoopkod anvÃ¤nd utanfÃ¶r .def/.endef: Ã¶verhoppad..size pseudo-op anvÃ¤nd utanfÃ¶r .def/.endef; Ã¶verhoppad.space repetitionsantal Ã¤r negativt, Ã¶verhoppat.space repetitionsantal Ã¤r noll, Ã¶verhoppat.space ange ett icke-absolut vÃ¤rde.space, .nops eller .fill med negativt vÃ¤rde, Ã¶verhoppat.space/.bes repetitionsantal Ã¤r negativt, Ã¶verhoppat.space/.bes repetitionsantal Ã¤r noll, Ã¶verhoppat.stab%c stÃ¶ds inte.stab%c: beskrivningsfÃ¤lt â%xâ fÃ¶r stort, prova ett annat felsÃ¶kningsformat.stab%c: hoppar Ã¶ver annat fÃ¤lt som Ã¤r icke-noll.stab%c: saknar komma.stab%c: saknar strÃ¤ng.stabx av lagringsklass stsym mÃ¥ste vara inom .bs/.es.syntax %s krÃ¤ver kommandoradsflagga â--no-underscoreâ.syntax %s krÃ¤ver kommandoradsflagga â--underscoreâ.tag pseudoopkod anvÃ¤nd utanfÃ¶r .def/.endef: Ã¶verhoppad..tag pseuod-op anvÃ¤nd utanfÃ¶r .def/.endef; Ã¶verhoppad.tag krÃ¤ver en strukturtagg.tag-mÃ¥l â%sâ odefinierat.tc inte i .toc-sektion.tc utan etikett.type pseudoopkod anvÃ¤nd utanfÃ¶r .def/.endef: Ã¶verhoppad..type pseudo-op anvÃ¤nd utanfÃ¶r .def/.endef; Ã¶verhoppad.unwind_save har inte stÃ¶d fÃ¶r denna typ av register.usect: justeringsflagga som inte Ã¤r noll Ã¶verhoppad.usepv-direktiv har inget namn.usepv-direktiv har ingen typ.uses refererar inte till en lokal symbol i samma sektion.uses pseudo-opkod pÃ¥trÃ¤ffad nÃ¤r lÃ¤ttnad inte anvÃ¤nds.uses-mÃ¥l refererar inte till en lokal symbol i samma sektion.val-uttryck fÃ¶r komplext.val pseudoopkod anvÃ¤nd utanfÃ¶r .def/.endef: Ã¶verhoppad..val pseuod-op anvÃ¤nd utanfÃ¶r .def/.endef; Ã¶verhoppad.var kan endast anvÃ¤ndas inom en makrodefinition.vframepsp Ã¤r meningslÃ¶s, antar att .vframesp menades.vliw inte tillgÃ¤nglig nÃ¤r VLIW Ã¤r inaktiverat..warning-direktiv Ã¥beropat i kÃ¤llfil.word %s-%s+%s fick inte platsmisslyckades med behandling av .word falltabell: tabell fÃ¶r stor0x%lx utanfÃ¶r 32-bitars fÃ¶rskjutningsintervall med tecken0x%lx: "%s" typ = %ld, klass = %d, segment = %d
128-bitars SIMD skalÃ¤r- eller kvadrupelprecisions flyttalsregister fÃ¶rvÃ¤ntades16-bitars SIMD skalÃ¤r- eller halvprecisions flyttalsregister fÃ¶rvÃ¤ntades16-bitsadress tillÃ¥ts inte i MPX-instruktioner16-bitarsutÃ¶kning16-bitarsinstruktion Ã¤r inaktiverad: %s.16-bitarshopp utanfÃ¶r intervall16-bitarsomlokalisering anvÃ¤nd i 8-bitarsoperand3-bitars omedelbar utanfÃ¶r intervall32-bitars SIMD skalÃ¤r- eller helprecisions flyttalsregister fÃ¶rvÃ¤ntades32-bitars adress tillÃ¥ts inte i 64-bitars MPX-instruktioner.32-bitars villkorad gren genererad32-bitarslÃ¤ge stÃ¶ds inte pÃ¥ â%sâ.32bitars x86_64 stÃ¶ds endast fÃ¶r ELF6-bitarsfÃ¶rskjutning utanfÃ¶r intervall6-bitars omedelbar utanfÃ¶r intervall62-bitars omlokalisering inte implementerad Ã¤n64-bitars SIMD skalÃ¤r- eller dubbelprecisions flyttalsregister fÃ¶rvÃ¤ntades64-bitarsheltal eller SP-register fÃ¶rvÃ¤ntat64-bitarsoperator src/dst-register mÃ¥ste vara mindre Ã¤n 1564-bitarslÃ¤ge stÃ¶ds inte pÃ¥ â%sâ.68040 och 68851 angiven; mmu-instruktioner kan assemblera felaktigt8-bitars SIMD skalÃ¤rregister fÃ¶rvÃ¤ntades8-bitarsfÃ¶rskjutning utanfÃ¶r intervall8-bitars omedelbar utanfÃ¶r intervall8-bitarsomlokalisering anvÃ¤nd i 16-bitarsoperand: Omedelbart vÃ¤rde i cbcond Ã¤r utanfÃ¶r intervall.: Instruktion krÃ¤ver att frs2 och frsd mÃ¥ste vara samma register: PC-relativ operand kan inte vara en konstant: TLS-operand kan inte vara en konstant: Det finns endast 32 f-register; [0-31]: Det finns endast 32 enkelprecisions f-register; [0-31]: Det finns endast 64 f-register; [0-63]: asr-nummer mÃ¥ste vara mellan 0 och 31: krypto-omedelbar mÃ¥ste vara mellan 0 och 31: fÃ¶rvÃ¤ntade registernamn ccr : fÃ¶rvÃ¤ntade registernamn pc : fÃ¶rvÃ¤ntade registernamn r0-r7 : fÃ¶rvÃ¤ntade %asrN: fÃ¶rvÃ¤ntade krypto-omedelbar: imm2 omedelbar operand utanfÃ¶r intervall (0-3): ogiltigt ASI-uttryck: ogiltig ASI-namn: ogiltigt ASI-nummet: ogiltigt cpreg-namn: ogiltigt membar-maskuttryck: ogiltigt membar-masknamn: ogiltigt membar-masknummer: ogiltigt fÃ¶rhÃ¤mtningsfunktionsuttryck: ogiltigt fÃ¶rhÃ¤mtningsfunktionsnamn: ogiltigt fÃ¶rhÃ¤mtningsfunktionsnummer: ogiltig siam-lÃ¤gesuttryck: ogiltigt siam-lÃ¤gesnummer: icke-omedelbar imm2-operand: behandlar makro, riktigt opkodshandtag inte funnet i hash: oigenkÃ¤nnbart underordnat tillstÃ¥ndsregister: oigenkÃ¤nnbart hyperprivilegierat register: oigenkÃ¤nnbart privilegierat register:b tillÃ¥ts inte; faller tillbaka pÃ¥ :w:lower16: inte tillÃ¥ten i denna instruktion:operand har fÃ¶r mÃ¥nga bitar:operandvÃ¤rde (%d) fÃ¶r stort fÃ¶r begrÃ¤nsning:okÃ¤nd begrÃ¤nsningsstorlek fÃ¶r omlokalisering:upper16: inte tillÃ¥ten i denna instruktion<abinamn>	  ange fÃ¶r ABI <abinamn><abi>	          Ange en abi-version
			  <abi> kan vara v1, v2, v2fp, v2fpp<abi>	  assemblera fÃ¶r flyttals-ABI <abi><abs><arknamn>	  Assemblera fÃ¶r arkitektur <arknman>
			  <arknamn> kan vara
			  v3, v3j, v3m, v3f, v3s, v2, v2j, v2f, v2s<arknamn>	  assembler fÃ¶r arkitektur <arknamn><baslinje>	  Assembera fÃ¶r baslinjer <baslinje>
			  <baslinje> kan vara v2, v3, v3m<cpunamn>	  assemblera fÃ¶r CPU <cpunamn><dspnamn>	  assemblera fÃ¶r DSP-arkitektur <dspnamn><fpunamn>	  assemblera fÃ¶r FPU-arkitektur <fpunamn><freg>	  Ange en FPU-konfiguration
			  <freg>
			  0:     8 SP /  4 DP register
			  1:    16 SP /  8 DP register
			  2:    32 SP / 16 DP register
			  3:    32 SP / 32 DP register<gnu bygganteckning><imm8>,X<etikett><lÃ¤ge>	  styr implicit infogning av IT-instruktioner<okÃ¤nd><ver>		  assemblera fÃ¶r eabi version <ver>? sektionsflagga Ã¶verhoppad med G nÃ¤rvarande@%s Ã¤r inte en komplex omlokalisering.@%s omlokalisering stÃ¶ds inte med %d-bitars utmatningsformat@tls kan inte anvÃ¤ndas med â%sâ-operander@tls kan endast anvÃ¤nds fÃ¶r sista operandenStornum/flytnum fÃ¥r inte vara en fÃ¶rskjutning: 0x%lx anvÃ¤ntEn hoppinstruktion med lÃ¥ng omedelbar hittad vid slutet av ZOL-etiketten @%sEn parameter vid namn â%sâ existerar redan fÃ¶r makro â%sâEtt statusregister eller statusbitnamn krÃ¤vsA0.2,A0.3,A1.2,A1.3 krÃ¤vs fÃ¶r QUICKRoT-registerAAARG -> ohanterad konstantomlokalisering: %dADD/SUB sp, sp #immADRADRL anvÃ¤nt fÃ¶r en symbol som inte definierats i samma filAR %d kan endast anvÃ¤ndas av %c-enhetAR-register inte hittat i indirekt referensARM-specifika assemblerflaggor:
ARM-register fÃ¶rvÃ¤ntadesARMv8.2 skalÃ¤r fp16-instruktion kan inte vara villkorad, beteendet Ã¤r OFÃRUTSÃGBARTAUDIO ISA-utÃ¶kningAVR assemblerflaggor:
  -mmcu=[avrnamn] vÃ¤lj mikrokontrollervariant
                   [avrnamn] kan vara:
                   avr1  - klassisk AVR-kÃ¤rna utan data-RAM
                   avr2  - klassisk AVR-kÃ¤rna med upp till 8K programminne
                   avr25 - klassisk AVR-kÃ¤rna med upp till 8K programminne
                           samt MOVW-instruktionen
                   avr3  - klassisk AVR-kÃ¤rna med upp till 64K programminne
                   avr31 - klassisk AVR-kÃ¤rna med upp till 128K programminne
                   avr35 - klassisk AVR-kÃ¤rna med upp till 64K programminne
                           samt MOVW-instruktionen
                   avr4  - fÃ¶rbÃ¤ttrad AVR-kÃ¤rna med upp till 8K programminne
                   avr5  - fÃ¶rbÃ¤ttrad AVR-kÃ¤rna med upp till 64K programminne
                   avr51 - fÃ¶rbÃ¤ttrad AVR-kÃ¤rna med upp till 128K programminne
                   avr6  - fÃ¶rbÃ¤ttrad AVR-kÃ¤rna med upp till 256K programminne
                   avrxmega2 - XMEGA, > 8K, < 64K FLASH, < 64K RAM
                   avrxmega3 - XMEGA, RAM + FLASH < 64K, Flash visible in RAM
                   avrxmega4 - XMEGA, > 64K, <= 128K FLASH, <= 64K RAM
                   avrxmega5 - XMEGA, > 64K, <= 128K FLASH, > 64K RAM
                   avrxmega6 - XMEGA, > 128K, <= 256K FLASH, <= 64K RAM
                   avrxmega7 - XMEGA, > 128K, <= 256K FLASH, > 64K RAM
                   avrtiny   - AVR Tiny-kÃ¤rna med 16 gp-register
Avbryter fÃ¶r dÃ¥ sats har â%sâAbsolut PC-relativt vÃ¤rde i lÃ¤ttnadskod. Assembleringsfelâ¦AbsolutvÃ¤rd i lÃ¤ttnadskod. Assemblerfelâ¦AnvÃ¤nder â%sâ som trÃ¥dlokalt objektAnvÃ¤nder funktion â%sâ som trÃ¥dlokalt objektTillÃ¤gg till oupplÃ¶st symbol Ã¤r inte vid ordgrÃ¤ns.TillÃ¤gg till oupplÃ¶st symbol inte pÃ¥ ordgrÃ¤ns.AdresseringslÃ¤ge *+ARx Ã¤r inte tillÃ¥tet vid minnesmappad registeradressering. Beteende Ã¤r odefinierat.AdresseringslÃ¤ge *+ARx Ã¤r skrivskyddat. Resultat frÃ¥n lÃ¤sning Ã¤r odefinierade.Adress fÃ¶r omedelbar operandAdresseringslÃ¤ge inte implementerat Ã¤n.Justerade .word (%#lx)-Ã¶verspill med tecken: âswitchâ-sats fÃ¶r stor.Justerat .word (%ld) med tecken fick Ã¶verspill: âswitchâ-sats fÃ¶r stor.Justering (%lu) fÃ¶r stor: 15 antaget.Justering mÃ¥ste vara en tvÃ¥potensJustering negativ: 0 antagetJustering negativ: 0 antaget.Justering fÃ¶r stor: %d antagetJustering fÃ¶r stor: %d. antagetJustering fÃ¶r stor: %d. antaget.Alpha-flaggor:
-32addr			behandla adresse som 32-bitarsvÃ¤rden
-F			avstÃ¥ frÃ¥n stÃ¶d fÃ¶r flyttalsinstruktioner
-mev4 | -mev45 | -mev5 | -mev56 | -mpca56 | -mev6 | -mev67 | -mev68 | -mall
			ange variant av Alpha-arkitektur
-m21064 | -m21066 | -m21164 | -m21164a | -m21164pc | -m21264 | -m21264a | -m21264b
			dessa varianter inkludera PALcode-opkoder
En IMM-instruktion bÃ¶r inte finnas i .s-filenEn felaktig anvÃ¤ndning av fÃ¶rdrÃ¶jningslucka hittades vid slutet av ZOL-etiketten @%sArkitektur stÃ¤mmer inte pÃ¥ â%s%sâ.Arkitekturvarianter: Argument till .vec_size fÃ¶rvÃ¤ntas vara 4 eller 16, men Ã¤r: %d.Argument till .vec_size Ã¤r inte en konstant.Argument till .BLOCK/.BLOCKZ mÃ¥ste vara mellan 0 och 0x3fffffffArgument till .even Ã¶verhoppatAssemblermeddelanden:
Ãtminstone ett PR-argument fÃ¶rvÃ¤ntadesÃtminstone tvÃ¥ PR-argument fÃ¶rvÃ¤ntadesFÃ¶rsÃ¶k att rensa icke-existerande makro â%sâFÃ¶rsÃ¶k att placera en normal symbol i mÃ¤ngden %sFÃ¶rsÃ¶k att placera en odefinierad symbol i mÃ¤ngden %sFÃ¶rsÃ¶k att omdefiniera registeruppsÃ¤ttning â%sâOkÃ¤nt attributnamn: %sAutoinkrementerings/dekrementeringsavstÃ¥nd â%ldâ Ã¤r utanfÃ¶r intervall.Tillsatsregister AR0--AR7 nÃ¶dvÃ¤ndigt fÃ¶r indirektFELAKTIG MULBALIGN-omedelbar inte 0, 1, 2 eller 3 (%lu)BFD Ã¤r inte synkroniserat med GAS, ohanterad vÃ¤lkÃ¤nd sektionstyp â%sâBSPEC redan aktiv. NÃ¤stling stÃ¶ds inte.BSPEC utan ESPC.BSS-lÃ¤ngd (%d) < 0 Ã¶verhoppadBSS-lÃ¤ngd (%d.) <0! Ãverhoppad.BYTE-uttryck inte ett rent nummerBYTE-uttryck inte i intervallet 0..255Felaktigt .fmask-direktivFelaktigt .frame-direktiv 1./2. paramFelaktig .frame-direktiv 3./4. paramFelaktig .mask-direktivFelaktigt .sektion-direktiv: vill ha a,s,w,x,M,S,G,T i strÃ¤ngFelaktig COFF-version â%sâFelaktig CPU-version â%sâFelaktigt RA-register (%d) fÃ¶r .frameFelaktig basregister, anvÃ¤nder $%d.Felaktigt anrop till MD_ATOF()Felaktigt anrop till MD_NTOF()Felaktigt anrop till md_atof()Felaktigt anrop till md_atof() - flyttalsformat stÃ¶ds inteFelaktigt anrop till md_atof()Felaktig direktadresseringskonstruktion %sFelaktig fÃ¶rskjutning %d (krÃ¤ver 0--25)
Felaktigt uttryck: @%s + %s.Felaktig opkodstabell, trasig assembler.Felaktig opkodstabell-flagga, kontroller i fil ns32k-opcode.hFelaktig operandFelaktig operand fÃ¶r en lÃ¤sinstruktion: <%s>Felaktig operand fÃ¶r en lagringsinstruktion: <%s>Felaktig operand fÃ¶r konstantavstÃ¥ndFelaktig operandvÃ¤rde: %sFelaktig parameterlista fÃ¶r makro â%sâFelaktigt registernamnFelaktigt registernamn %sFelaktigt registerintervallFelaktig omlokaliseringsuppfixningstyp (%d)Felaktig omlokaliseringstyp: 0x%02xFelaktigt segment (borde vara absolut).Felaktigt segment i uttryck.Felaktigt sekvensnummer: !%s!%sFelaktig skift *riktningFelaktigt skiftlÃ¤geFelaktig storlekFelaktig suffix efter â:â anvÃ¤nd {b|w|d} StandardvÃ¤rde blir dFelaktigt suffix, standard blir dFelaktigt utformat adressuttryckBankregister Ã¤r inte tillÃ¥tna med denna arkitektur.Stort nummer fÃ¶r stortRak byteordning R2 stÃ¶ds inte.Stornum inte tillÃ¥tna i kort literal. Omedelbart lÃ¤ge antaget.Stornum fÃ¶r stort fÃ¶r %c-format; trunkeratStornum fÃ¶r stort fÃ¶r lÃ¥ngBitfÃ¤lt utanfÃ¶r intervallBÃ¥da argumenten mÃ¥ste vara ersÃ¤ttningssymbolerBÃ¥de the_insn.HI och the_insn.LO Ã¤r instÃ¤llda : %sKlamrar i operandfÃ¤lt Ã¤r felaktigtGren till ojusterad adressTrasig assembler. Har inte fÃ¶rsÃ¶kt gÃ¶ra assemblering.Buggig opkod: â%sâ â%sâ
C-SKY ABI v1 (ck510/ck610) saknar stÃ¶d fÃ¶r -mbranch-stubC-SKY-assemblerflaggor:
C0 - C15 fÃ¶rvÃ¤ntadesC54x-specifika kommandoradsflaggor:
CFI-instruktion anvÃ¤nd utan fÃ¶regÃ¥ende .cfi_startprocCFI stÃ¶ds inte fÃ¶r detta mÃ¥lCFI-tillstÃ¥nd Ã¥terstÃ¤llt utan fÃ¶regÃ¥ende ihÃ¥gkomstCPU-version har redan stÃ¤llts inCPU11: PC Ã¤r destination fÃ¶r SR-alternerande instruktionCPU12: CMP/BIT med PC-destination hoppar Ã¶ver nÃ¤sta instruktionCPU13: SR Ã¤r destination fÃ¶r SR-alternerande instruktionCPU19: Instruktion som stÃ¤ller in CPUOFF mÃ¥ste fÃ¶ljas av en NOPCPU8: Stackpekare lÃ¤st med udda offsetCRIS-specifika flaggor:
C_EFCN-symbol fÃ¶r %s utanfÃ¶r rÃ¤ckviddAnropar gen_cond_branch_32 fÃ¶r .arch common_v10_v32
Kan inte gÃ¶ra %d-byte %s-omlokaliseringKan inte utfÃ¶ra %d-byte pc-relativ pic-omlokaliseringKan inte utfÃ¶ra %d-byte pc-relativ omlokaliseringKan inte utfÃ¶ra %d-byte pc-relativ omlokalisering fÃ¶r lagringstyp %dKan inte utfÃ¶ra %d-byte pic-omlokaliseringKan inte utfÃ¶ra %d-byte omlokaliseringKan inte utfÃ¶ra %d-byte omlokalisering fÃ¶r lagringstyp %dKan inte hitta matchande lÃ¤ttnadstips. Rad : %dKan inte representera %s-omlokalisering i detta objektfilsformatKan inte stÃ¤lla in dlx_skip_hi16_flagKan inte lÃ¤gga till stoppbit fÃ¶r att markera slutet pÃ¥ instruktionsgruppKan inte Ã¤ndra utrymmen inom en procedurdefinition. ÃverhoppatKan inte Ã¤ndra underrymder inom en procedurdefinition. ÃverhoppadKan inte hantera uttryck: standard vÃ¤rdet Ã¤r %ldKan inte skapa kort flytnumsliteral: omedelbart lÃ¤ge anvÃ¤nt.Kan inte hitta opkod som matchar operanderKan inte hantera O_big i s390_exp_compareKan inte hasha %s: %sKan inte hasha â%sâ: %s
Kan inte hasha instruktion â%sâ:%sKan inte omdirigera stderr till filen â%sâKan inte utfÃ¶ra lÃ¤ttnad fÃ¶r skillnadKan inte omlokalisera uttryckKan inte sÃ¤tta GP-vÃ¤rdeKan inte sÃ¤tta registermaskerKan inte anvÃ¤nda lÃ¥nga grenar fÃ¶r denna arkitekturKan inte reda ut storlek fÃ¶r operand.
Kan inte allokera upprullningsbeskrivning
Kan inte assemblera instruktionKan inte definiera exportsymbol: %s
Kan inte definiera statisk symbol: %s
Kan inte uttrycka %s%d%s-omlokaliseringKan inte hitta omlokaliseringstyp fÃ¶r symbol %s, kod %dKan inte generera omlokaliseringstyp fÃ¶r symbol %s, kod %sKan inte hantera uppfixningKan inte gÃ¶ra %s-omlokalisering PC-relativKan inte representera %s-omlokalisering i objektfilKan inte representera exponent med %d bitarKan inte representera omlokaliseringstyp %sKan inte anvÃ¤nda POPM fÃ¶r att Ã¥terstÃ¤lla SR-registretKan inte anvÃ¤nda specialregister med denna funktionFallvÃ¤rde %ld ovÃ¤ntat vid rad %d i fil â%sâ
Att Ã¤ndra CPU-version i farten stÃ¶ds inteAtt Ã¤ndra processor i farten stÃ¶ds inteâ¦Valde GP-vÃ¤rdet %lx
Avslutande klammer saknasKomma och symbol fÃ¶rvÃ¤ntades fÃ¶r â.asg STRING, SYMBOLâKomma och symbol fÃ¶rvÃ¤ntades fÃ¶r â.eval EXPR, SYMBOLâKomma fÃ¶rvÃ¤ntadesKomma fÃ¶rvÃ¤ntat
Komma fÃ¶rvÃ¤ntade efter sektionsnamnKommandoradsvÃ¤rde Ã¥sidosÃ¤tter â.cpuâ-direktivAllmÃ¤n justering negativ; 0 antagetGenerell justering inte en tvÃ¥potensKomplextuttryck stÃ¶ds inteKomplicerad LAPC-mÃ¥loperand Ã¤r inte en multipel av tvÃ¥. AnvÃ¤nd LAPC.DVillkor â%sâ matchar inte fÃ¶regÃ¥ende gruppVillkor â%sâ anvÃ¤nder en annan ackumulator frÃ¥n en fÃ¶regÃ¥ende villkorVillkod <%c%c> i strukturerat kontrolldirektiv kan inte kodas korrektKonstantuttryck %d utanfÃ¶r intervall, [%d, %d].Konvertering av PC-relativ BSR till absolut JSRKonvertering av PC-relativ gren till absoluthoppKonvertering av PC-relativ villkorad gren till absoluthoppKonvertering av PC-relativ fÃ¶rskjutning till absolutCopyright Â© 2019 Free Software Foundation, Inc.
Kunde inte stÃ¤lla in arkitektur och maskinKunde inte stÃ¤lla in arkitektur och maskin.Kunde inte generera utÃ¶skningsinstruktionsopkoderAtt skapa sektion med .xdataN/.xrealN/.xstringZ Ã¤r fÃ¶rÃ¥ldrat.Aktuell sektion Ã¤r oinitierad, sektionsnamn krÃ¤vs fÃ¶r .clinkD-register utanfÃ¶r intervall fÃ¶r vald VFP-versionD10V-flaggor:
-O                      Optimera. Kommer att genomfÃ¶ra vissa operationer parallellt.
--gstabs-packing        Packa ihop intilliggande korta instruktioner Ã¤ven
                        nÃ¤r --gstabs anges. PÃ¥ som standard.
--no-gstabs-packing     Om --gstabs Ã¤r angivet, packa inte ihop
                        intilliggande instruktioner.
DSP RAM-pekare i felaktig enhetDSP-utÃ¶kningFarlig samtidig anvÃ¤ndning av âf%dâ och âf%dâStandardmÃ¥l â%sâ stÃ¶ds inte.FÃ¶rsenade grenar inte tillgÃ¤ngliga pÃ¥ SH1FÃ¶rÃ¥ldrad syntax.Destinationsackumulator fÃ¶r varje del av denna parallella instruktion mÃ¥ste vara olikaDestinationsregister mÃ¥ste vara ARnDestinationsregister mÃ¥ste vara R0 eller R1Destinationsregister mÃ¥ste vara R2 eller R3Skillnad mellan symboler i olika sektioner stÃ¶ds inteOlika argument fÃ¶r .vec_size hittade, fÃ¶regÃ¥ende %d, nuvarande %dDirektvÃ¤rde %ld Ã¤r inte lÃ¤mpligtDirektiv ogiltigt inom en buntFÃ¶rskjutningslÃ¤ngd %s Ã¶verhoppad!FÃ¶rskjutning fÃ¶r stor fÃ¶r :dFÃ¶rskjutningsvÃ¤rde %ld Ã¤r fÃ¶r stortStÃ¶d fÃ¶r divisionsinstruktionerVet inte hur bredd fÃ¶r %c ska rÃ¤knas ut i md_assemble()Vet inte hur detta fÃ¤lt ska hanteras. %sVet inte hur vanliga operander av typ %s ska omlokaliserasKorsprodukt-instruktioner kan inte vara villkorade, beteende Ã¤r OFÃRUTSÃGBARTDubblerad %s-villkorDubblerat likhetstecken (=) i instruktionDubblerat predikatregister Ã¶verhoppatDubblerad pseudo-opkod %s.EBCDIC-konstanter stÃ¶ds inteECOFF-felsÃ¶kning Ã¤r inaktiverad.ENDLOOP utan motsvarande LOOPEPIPHANY-specifika kommandoradsflaggor:
ESPEC utan fÃ¶regÃ¥ende BSPECTomt argument fÃ¶r .endpTomt argument fÃ¶r .procEpilogantalet %lu Ã¶verstiger antalet nÃ¤stlade prologer (%u)Samma parallella destinationsregister, ett resultat kommer att kasserasFel %s i %s
Fel i argument %d.  FÃ¶rvÃ¤ntade:  â%sâFel i uttryckFel vid hantering av omlokaliseringFel i satssyntaxFel vid instÃ¤llning av flaggor fÃ¶r â%sâ: %sFel: JÃ¤mnt tal krÃ¤vs. Avrundat till %dAtt exekvera %s i IU i omvÃ¤nd serie kanske inte fungerarAtt exekverar %s i IU kanske inte fungerarAtt exekvera %s i IU kanske inte fungerar vid parallell exekveringAtt exekvera %s i omvÃ¤nd serie med %s kanske inte fungerarFÃ¶rvÃ¤ntade â(âFÃ¶rvÃ¤ntade â)âFÃ¶rvÃ¤ntade â:âFÃ¶rvÃ¤ntade â[âFÃ¶rvÃ¤ntade â]âFÃ¶rvÃ¤ntade komma efter allmÃ¤n lÃ¤ngdFÃ¶rvÃ¤ntade komma efter namnFÃ¶rvÃ¤ntade komma efter namn â%sâFÃ¶rvÃ¤ntade komma efter symbolnamnFÃ¶rvÃ¤ntade komma efter symbolnamn: resten av raden Ã¶verhoppad.FÃ¶rvÃ¤ntade omedelbart uttryckFÃ¶rvÃ¤ntade en citerad strÃ¤ngFÃ¶rvÃ¤ntade register, fick â%sâ.FÃ¶rvÃ¤ntade separator â=âFÃ¶rvÃ¤ntade enkelt nummer.FÃ¶rvÃ¤ntade â%câFÃ¶rvÃ¤ntade ett konstantvÃ¤rdeFÃ¶rvÃ¤ntade ett registernamnFÃ¶rvÃ¤ntade ett register.FÃ¶rvÃ¤ntade argument som Ã¤r teckenkonstantFÃ¶rvÃ¤ntade komma efter namn pÃ¥ CPU-errata, inte: â%sâFÃ¶rvÃ¤ntade operand efter â,âFÃ¶rvÃ¤ntade operand efter â,â; fick ingenFÃ¶rvÃ¤ntade operand fÃ¶re â,â; fick ingenFÃ¶rvÃ¤ntade register D fÃ¶r indexerat indirekt lÃ¤ge.FÃ¶rvÃ¤ntade ett andra argumentUttryckliga stop hoppas Ã¶ver i automatiskt lÃ¤geUttrycksfel fÃ¶r operandmodifierare %%hi/%%lo
Uttryck inuti %%%s kunde inte tolkasUttryck utanfÃ¶r intervall, anvÃ¤nder 0Uttryck fÃ¶r komplext.UtÃ¶kad adressering stÃ¶ds inte fÃ¶r den angivna CPU:nExtra )Extra skrÃ¤p i funktionsanrop, fÃ¶rvÃ¤ntade â)âExtra skrÃ¤p pÃ¥ radÃDESDIGERT: FÃ¤ster kompilatorhuvud %sFIRST stÃ¶ds inte som ett .SUBSPACE-argumentFP-gren i hoppluckaFP-gren fÃ¶regÃ¥s av FP-jÃ¤mfÃ¶relse; NOP infogadFPA .unwind_save accepterar inte en registerlistaFPA-register fÃ¶rvÃ¤ntadesFPU DP-utÃ¶kningFPU SP-utÃ¶kningFPU sammansmÃ¤lta multiplikations-additions-instruktionerFRAME-parameter mÃ¥ste vara en multipel av 8: %d
FRV-specifika kommandoradsflaggor:
FT32-flaggor:
Misslyckades med att skapa egenskapssektion â%sâ
Misslyckades med att hitta ett giltigt lÃ¤ge fÃ¶r â%sâ.Misslyckades med att hitta riktig bÃ¶rjan pÃ¥ funktionen: %s
Ãdesdigert fel: FÃ¤lt inte korrekt justerat [%d] (%d).FÃ¤lt utanfÃ¶r intervall [%d..%d] (%d).Fil â%sâ inte i makroarkivsformatFÃ¶rsta ogiltiga symbol: â%sâFÃ¶rsta opkoden Ã¤r lÃ¥ng. Kan inte mixa instruktioner som angivet.FÃ¶rsta operanden till .%s mÃ¥ste vara ett predikatFÃ¶rsta operanden till .%s inte ett registerFÃ¶rsta operanden till .%s Ã¤r inte ett giltigt registerFÃ¶rsta operanden till .altrp inte ett giltigt grenregisterFÃ¶rsta operanden till .fframe mÃ¥ste vara en konstantFÃ¶rsta operanden till .prologue mÃ¥ste vara en positiv 4-bitarskonstantFÃ¶rsta operanden till .restore mÃ¥ste var stackpekare (sp)FÃ¶rsta operand till .save inte ett registerFÃ¶rsta operanden till .save inte ett giltigt registerFÃ¶rsta operanden till .save.b mÃ¥ste vara en positiv 5-bitarskonstantFÃ¶rsta operanden till .save.g mÃ¥ste vara en positiv 4-bitarskonstantFÃ¶rsta operanden till .save.gf mÃ¥ste vara en icke negativ 4-bitarskonstantFÃ¶rsta operanden till .unwabi mÃ¥ste vara en konstantFÃ¶rsta operanden till .vframe mÃ¥ste vara ett generellt registerFixar databeroende: %s %s -- %s %s (infogade %d nop!/%d)Fixar databeroende: %s %s -- %s %s (infogade 1 pflush/%d)Flyttals AC inte giltigt som heltalsoperandFlyttalsnummer inte giltigt i uttryckFlyttalsregister i registerlistaTvingade kort literal till omedelbart lÃ¤ge. now_seg%s to_seg=%sTvingar bytefÃ¶rskjutningHittade â{â efter uttryckligt omslag till automatiskt lÃ¤geHittade â{â nÃ¤r buntning redan pÃ¥gÃ¥r.Hittade â{â nÃ¤r manuell buntning redan var pÃ¥slagetHittade â}â nÃ¤r manuell buntning Ã¤r avHittade â}â nÃ¤r buntning inte anvÃ¤ndes.Hittade anvÃ¤ndning av icke-kanoniskt registernamn %s; anvÃ¤nd %s istÃ¤llet.Freescale XGATE-koprocessorflaggor:
  -mshort                 anvÃ¤nd 16-bitars heltals-ABI (standard)
  -mlong                  anvÃ¤nd 32-bitars heltals-ABI
  -mshort-double          anvÃ¤nd 32-bitars dubbel-ABI
  -mlong-double           anvÃ¤nd 64-bitars dubbel-ABI (standard)
  --mxgate                ange processorvariant [standard %s]
  --print-insn-syntax     skriv ut instruktionssyntax vid fel
  --print-opcodes         skriv ut lista Ã¶ver instruktioner med syntax
  --generate-example      generera ett exempel fÃ¶r varje instruktionFunktion fÃ¶rvÃ¤ntar tvÃ¥ argumentGnu assembler %s
GNU assembler version %s (%s) som anvÃ¤nder BFD version %s
GOT redan i symboltabellGOT finns redan i symboltabellenGOT felaktigt uttryck med %s.GP-prologstorlek Ã¶verstiger fÃ¤ltstorlek, anvÃ¤nder 0 istÃ¤lletGREG-uttryck fÃ¶r kompliceratSkrÃ¤p pÃ¥ slutet av instruktionSkrÃ¤p pÃ¥ slutet av instruktionen: â%sâ.Gas-fel, omlokaliseringstyp #%i
Gas-fel, omlokaliseringstyp %s
Gas-fel, omlokaliseringsvÃ¤rde %d
AllmÃ¤nt register inte giltigt som flyttalsoperandGruppsektion â%sâ har ingen gruppsignaturHI-/LO-register bÃ¶r anges tillsammansHI-/LO-register bÃ¶r anges utan ytterligare registerHÃ¥rdvarukapacitet â%sâ inte aktiverad fÃ¶r â%sâ.Hi-register ADD, MOV, CMP anvÃ¤nder pcHi-register ADD, MOV, CMP, BX, BLX anvÃ¤nder PCJag behÃ¶ver inte anvÃ¤nda temporÃ¤rfil â%sâ.Jag anvÃ¤nder inte en interpass-fil! -V Ã¶verhoppatIA-64-flaggor:
  --mconstant-gp	  markera utmatningsfil som att den anvÃ¤nder konstant-GP-modell
			  (stÃ¤ller in ELF-huvudflaggan EF_IA_64_CONS_GP)
  --mauto-pic		  markera utmatningsfil som att den anvÃ¤nder konstant-GP-modell
			  utan funktionsbeskrivningar (stÃ¤ller in ELF-huvudflaggan
			  EF_IA_64_NOFUNCDESC_CONS_GP)
  -milp32|-milp64|-mlp64|-mp64	vÃ¤lj datamodell (standard -mlp64)
  -mle | -mbe		  vÃ¤lj omvÃ¤nd eller rak byteordning (standard -mle)
  -mtune=[itanium1|itanium2]
			  justera fÃ¶r en specifik CPU (standard -mtune=itanium2)
  -munwind-check=[warning|error]
			  kontroll av unwind-direktiv (standard -munwind-check=warning)
  -mhint.b=[ok|warning|error]
			  kontroll av hint.b (default -mhint.b=error)
  -x | -xexplicit	  slÃ¥ pÃ¥ kontroll av beroendekrÃ¤nkningar
IP2K-specifika kommandoradsflaggor:
IT-block som innehÃ¥ller 16-bitars Thumb-instruktioner frÃ¥n fÃ¶ljande klass Ã¤r prestandafÃ¶rÃ¥ldrade fÃ¶r ARMv8-A och ARMv8-R: %sIT-block som innehÃ¥ller 32-bitars Thumb-instruktioner Ã¤r prestandafÃ¶rÃ¥ldrade fÃ¶r ARMv8-A och ARMv8-RIT-block som innehÃ¥ller mer Ã¤n en villkorad instruktion Ã¤r prestandafÃ¶rÃ¥ldrade fÃ¶r ARMv8-A och ARMv8-RIT faller inom intervallet fÃ¶r ett tidigare IT-blockIU-instruktion kan inte befinna sig i den vÃ¤nstra behÃ¥llarenHoppar Ã¶ver fÃ¶rsÃ¶k att omdefiniera symbolHoppar Ã¶ver fÃ¶rsÃ¶k att omdefiniera symbol %sHoppar Ã¶ver fÃ¶rsÃ¶k att omdefiniera symbol â%sâ.Hoppar Ã¶ver fÃ¶rsÃ¶k att spilla efter omrÃ¥desslutHoppar Ã¶ver Ã¤ndrade sektionsattribut fÃ¶r %sHoppar Ã¶ver sats pÃ¥ grund av â%sâOtillÃ¥tet 32-bitars processorregister (â%sâ) i instruktion: â%sâOtillÃ¥tet AR-register i indirekt referensOtillÃ¥ten skala - â%dâOtillÃ¥ten âcinvâ-parameter: â%câOtillÃ¥ten âmask16â-operand, operationen Ã¤r odefinierad - â%sâOtillÃ¥tet koprocessorregister i instruktion â%sâOtillÃ¥tet specialregister fÃ¶r koprocessor i instruktion â%sâOtillÃ¥ten kombination av omlokaliseringsfunktionerOtillÃ¥ten emulerad instruktionOtillÃ¥tet indexregisterpar (â%sâ) i instruktion: â%sâOtillÃ¥ten instruktion eller icke implementerad opkod.OtillÃ¥ten operand (arg %d)OtillÃ¥ten operandseparator â%câOtillÃ¥ten operand.OtillÃ¥tna operanderOtillÃ¥tna operander (blanksteg): â%sâOtillÃ¥tna operander%sOtillÃ¥tna operander: %%%s kan endast anvÃ¤ndas med call __tls_get_addrOtillÃ¥tna operander: %%%s kan inte anvÃ¤ndas tillsammans med andra omlokaliseringar i instr ()OtillÃ¥tna operander: %%%s krÃ¤ver argument i ()OtillÃ¥tna operander: %%r_%s%d krÃ¤ver argument i ()OtillÃ¥tna operander: %%r_plt i %d-byte datafÃ¤ltOtillÃ¥tna operander: %%r_tls_dtpoff i %d-byte datafÃ¤ltOtillÃ¥tna operander: %%tls_ldo i %d-byte datafÃ¤ltOtillÃ¥tna operander: %%tls_ldo krÃ¤ver argument i ()OtillÃ¥tna operander: Kan inte addera icke-konstant uttryck till %%%s()OtillÃ¥tna operander: Kan inte utfÃ¶ra aritmetik som inbegriper %%%s() frÃ¥n en omlokaliserbar symbolOtillÃ¥tna operander: Kan inte utfÃ¶ra aritmetik annan Ã¤n + och - som inbegriper %%%s()OtillÃ¥tna operander: Endast %%r_%s%d tillÃ¥tet i %d-byte datafÃ¤ltOtillÃ¥tna operander: skrÃ¤p efter %%r_%s%d()OtillÃ¥tna operander: skrÃ¤p efter %%tld_ldo()OtillÃ¥tet processorregister (â%sâ) i instruktion: â%sâOtillÃ¥tet register (â%sâ) i instruktion: â%sâOtillÃ¥tet register (â%sâ) i instruktion: â%sâOtillÃ¥tet register â%sâ i instruktion â%sâOtillÃ¥tet register â%sâ i kop-registerlistaOtillÃ¥tet register â%sâ i kop-specialregisterlistaOtillÃ¥tet register â%sâ i instruktion â%sâOtillÃ¥tet register â%sâ i registerlistaOtillÃ¥tet register â%sâ i anvÃ¤ndarregisterlistaOtillÃ¥tet registerpar (â%sâ) i instruktion: â%sâOtillÃ¥tet registerpar â%sâ i instruktion â%sâOtillÃ¥tet sektionsnamn â%sâ (orsakar namnkollision med upprullningssektion)OtillÃ¥ten typ av operand (arg %d)Omedelbar operand %ld Ã¤r olÃ¤mplig fÃ¶r operationsstorlekOmedelbar operand Ã¤r inte tillÃ¥ten fÃ¶r operand %d.Omedelbart vÃ¤rde %ld Ã¤r utanfÃ¶r intervall fÃ¶r instruktion %s instruktionOmedelbart vÃ¤rde %ld fÃ¶r stortOmedelbart vÃ¤rde fÃ¶r mbar  > 32. anvÃ¤nder <vÃ¤rde %% 32>Omedelbart vÃ¤rde inte i 16-bitarsintervall: %ldOmedelbart vÃ¤rde inte i 16-bitarsintervall med tecken: %ldOmedelbart vÃ¤rde inte i teckenlÃ¶st 16-bitarsintervall: %ldOmedelbart vÃ¤rde inte i teckenlÃ¶st 4-bitarsintervall: %ldOmedelbart vÃ¤rde inte i teckenlÃ¶st 5-bitarsintervall: %ldOmedelbart vÃ¤rde inte i 6-bitarsintervall: %ldOmedelbart vÃ¤rde inte i teckenlÃ¶st 6-bitarsintervall: %ldOmedelbart vÃ¤rde inte i 8-bitarsintervall: %ldOmedelbart vÃ¤rde inte i 8-bitarsintervall med tecken: %ldOmedelbart vÃ¤rde inte i teckenlÃ¶st8-bitarsintervall: %ldOmedelbart vÃ¤rde %ld Ã¤r fÃ¶r stortOmedelbart vÃ¤rde %ld Ã¤r fÃ¶r stort fÃ¶r ldfOmedelbara %d och %d kommer att ge odefinierat beteende.Felaktig CSR-adress (%lu)Felaktig CSRxI-omedelbar (%lu)Felaktig skiftmÃ¤ngd (%lu)Felaktig anvÃ¤nding av OP1_IMM_IMPLIEDFelaktig anvÃ¤ndning av OP1_MUST_BE_IMMInkompatibla fÃ¶rsta och andra operander i instruktionFelaktigt fr_opcode-vÃ¤rde i frag. Internt felâ¦Felaktig tantal operanderFelaktigt antal operander angivnaFelaktig syntax, %s.Inkrement-/dekrementvÃ¤rde Ã¤r utanfÃ¶r intervall: â%ldâ.Index kan endast tillÃ¤mpas fÃ¶r roterande eller indirekta registerIndex mÃ¥ste vara ett generellt registerIndex utanfÃ¶r intervall 0..%uIndexregister IR0,IR1 krÃ¤vs fÃ¶r fÃ¶rskjutningIndexerat indirekt lÃ¤ge inte tillÃ¥tet fÃ¶r movb/movw.Indirekt indexerad adressering Ã¤r inte giltigt fÃ¶r 68HC11.Indirekt registerindex mÃ¥ste vara ett generellt registerOÃ¤ndlig loop pÃ¥trÃ¤ffad vid fÃ¶rsÃ¶k att berÃ¤kna adresserna fÃ¶r symbolerna i sektion %sOÃ¤ndligheter stÃ¶ds inte av detta mÃ¥l
Info: Inledande .body bÃ¶r inte fÃ¶regÃ¥ nÃ¥gra instruktionerInledande .prologue bÃ¶r fÃ¶regÃ¥ instruktionerMisslyckades med att infoga â%sâ i adresstypstabell: %sMisslyckades med att infoga â%sâ i konstanthashtabell: %sMisslyckades med att infoga â%sâ i posttipstabell: %sMisslyckades med att infoga â%sâ i registertabell: %sMisslyckades med att infoga â%sâ i strukturtabell: %sInstr. %s har en hopp-/greninstruktion %s i dess hopplucka.Instr. %s har en instruktion %s med limm i dess hopplucka.Instr-lucka inte instÃ¤lld i upprullningspost.Instruktion %s inte tillÃ¥ten i en hopplucka.Instruktion %s stÃ¶ds inte i baslinjen.Instruktion %s krÃ¤ver absolututtryckInstruktion â%sâ krÃ¤ver en LP-cpu-versionInstruktion â%sâ krÃ¤ver fjÃ¤rrlÃ¤gesadresseringOkÃ¤nd instruktion â%sâ.Instruktion fÃ¥r inte plats i tillgÃ¤ngliga hoppluckor (%d-ordsinstr, %d lucka kvar)Instruktion fÃ¥r inte plats i tillgÃ¤ngliga hoppluckor (%d-ordsinstr, %d luckor kvar)Instruktion fÃ¥r inte plats i tillgÃ¤nglig hoppluckor (%d-ordinstr, %d lucka kvar). Resulterande beteende Ã¤r odefinierat.Instruktion fÃ¥r inte plats i tillgÃ¤nglig hoppluckor (%d-ordinstr, %d luckor kvar). Resulterande beteende Ã¤r odefinierat.Instruktionen har inte stÃ¶d fÃ¶r =N-adresserInstruktionsform inte tillgÃ¤nglig fÃ¶r denna arkitektur.Instruktionsformat fÃ¶r â%sâ:Instruktion i R-behÃ¥llare klÃ¤md av flÃ¶deskontroll i L-behÃ¥llare.Instruktion mÃ¥ste exekveras parallelltInstruktion mÃ¥ste exekveras parallellt med annan instruktion.Instruktion stÃ¶ds inte av denna arkitekturInstruktion anvÃ¤nder lÃ¥ng version, sÃ¥ den kan inte mixas som angivetInstruktion anvÃ¤nder inte parallella exekverings rÃ¶rledningar.Instruktioner fÃ¥r inte exekveras parallelltInstruktioner dela samma exekveringsrÃ¶rledningInstruktioner som anvÃ¤nder lÃ¥nga avstÃ¥ndsmodifierare eller absoluta adresser Ã¤r inte repeterbara. Resulterande beteende Ã¤r odefinierat.Instruktioner som orsakar PC-diskontinuitet tillÃ¥ts inte i en hopplucka. Resulterande beteende Ã¤r odefinierat.Intel K1OM kan endast 64-bitars ELFIntel K1OM kan endast 64-bitarsIntel L1OM kan endast 64-bitars ELFIntel L1OM kan endast 64-bitIntel MCU har inte stÃ¶d fÃ¶r â%sâ-arkitekturIntel MCU kan endast 32-bitars ELFIntel MCU kan endast 32-bitarInternt fel: Kan inte hasha %s: %sInternt fel: Kan inte hitta %s i hashtabellInternt fel: Kan inte hasha %s: %sInternt assemblerfel fÃ¶r instruktion %sInternt assemblerfel fÃ¶r instruktionsformat %sInternt fel. FÃ¶rsÃ¶k att anvÃ¤nda 0(r%d) istÃ¤llet fÃ¶r @r%dInternt konsekvensfel.  kontrollera ns32k-opcode.hInternt fel (%s).
Internt fel vid %s:%d.
Internt fel hittat i md_convert_frag: avstÃ¥nd %ld. Rapportera detta.Internt fel i %s vid %s:%d.
Internt fel: .relax_hint-NYCKEL Ã¤r inte ett tal!Internt fel: Kan inte hasha %s: %sInternt fel: Intervallfel. %sInternt fel: Fel vid lÃ¤ttnadstips (%s). %s: %s (%x)Internt fel: Kan inte hitta omslutande rymd fÃ¶r %s.Internt fel: OkÃ¤nd fixningstyp %d (â%sâ)Internt fel: kan inte hitta opkod â%sâ fÃ¶r â%sâ
Internt fel: kan inte hasha â%sâ: %s
Internt fel: vet inte hur %s ska tvingas till slutet av instruktionsgruppInternt fel: tappar bort opkod: â%sâ â%sâ
Internt logikfel i iff.iffP[].typInternt logikfel i iif.iffP[n].typInternt logikfel.  Rad %d, fil: â%sâInternt logikfel. rad %d, fil â%sâOgiltig --compress-debug-sections-flagga: â%sâOgiltig --elf-stt-common=-flagga: â%sâOgiltig --generate-missing-build-notes-flagga: â%sâOgiltig --size-check=-flagga: â%sâOgiltigt .CALL-argument: %sOgiltigt .CALLINFO-argument: %sOgiltigt .SPACE-argumentOgiltigt .SUBSPACE-argumentOgiltigt .instr-format
Ogiltigt additionsvillkor: %sOgiltigt additions- och grenvillkorOgiltigt gren vid bit-villkor: %cOgiltig COPR-identifierareOgiltig CST4-operandvÃ¤rde (arg %d)Ogiltigt jÃ¤mfÃ¶relse- och grenvillkorOgiltigt jÃ¤mfÃ¶relse-/subtraktionsvillkorOgiltigt jÃ¤mfÃ¶relse-/subtraktionsvillkor: %sOgiltigt DISPU4-operandvÃ¤rde (arg %d)Ogiltigt villkot fÃ¶r FP-jÃ¤mfÃ¶relse: %sOgiltigt format fÃ¶r FP-operand: %3sOgiltigt FTEST-slutfÃ¶rare: %sOgiltigt flyttalsformat fÃ¶r operand.Ogiltig syntax fÃ¶r indexerad laddningsslutfÃ¶rare.Ogiltig indexerad laddningsslutfÃ¶rare.Ogiltigt logikinstruktionsvillkor.Ogiltig nullifiering: (%c)Ogiltigt PIC-uttryck.Ogiltig SFU-identifierareOgiltigt skift-/extraherings-/insÃ¤ttningsvilkor.Ogiltig kort laddnings/lagringsslutfÃ¶rare.Ogiltig bytelagringsslutfÃ¶rareOgiltig enhetsintstruktionsvillkor.Ogiltig ackumulatorregister.Ogiltigt argument %d till .prologue.Ogiltig argumentbeskrivning: %dOgiltig argumentposition: %s
Ogiltigt argument till --isa-flagga: %sOgiltigt argument till --mach-flagga: %sOgiltigt tillsatsregister (anvÃ¤nd AR0-AR7)Ogiltigt tecken %s fÃ¶re %s-operandOgiltigt tecken %s i %s-operandOgiltig tecken %s i opkodOgiltig kombination av instruktioner fÃ¶r bunt.Ogiltiga konstantoperand %sOgiltigt standard arkitektur, trasig assembler.Ogiltigt destinationsregister fÃ¶r denna instruktion, anvÃ¤nd âtfrâ.Ogiltigt destinationsregister.Ogiltigt direktivOgiltig fÃ¶rskjutning i indirekt referensOgiltig dmad-syntax â%sâOgiltig dubbel anvÃ¤ndning av â%c%dâOgiltigt uttryck efter # nummer
Ogiltigt uttryck efter %%%%
Ogiltigt uttryck.Ogiltig fÃ¤ltvÃ¤ljare. Antar F%%.Ogiltig fÃ¤ltstorlek, mÃ¥ste vara frÃ¥n 1 till 32Ogiltigt flyttalsnummerOgiltig omedelbar skrivoperand.Ogiltigt indexerat indirekt lÃ¤ge.Ogiltigt indexerat register, fÃ¶rvÃ¤ntade register X.Ogiltigt indexerat register, fÃ¶rvÃ¤ntade register Y.Ogiltigt indexerat register.Ogiltigt indirekt adresseringslÃ¤geOgiltig fÃ¶rskjutning fÃ¶r indirekt adresseringslÃ¤ge %dOgiltig instruktion %sOgiltig instruktion: â%sâOgiltig etikett â%sâOgiltig kombination av vÃ¤nster-/hÃ¶gerslutfÃ¶rareOgiltig lÃ¤ngd (anvÃ¤nd 0 till %d)Ogiltig mnemonic â%sâOgiltigt lÃ¤ge: %s
Ogiltigt nummerOgiltigt avstÃ¥ndsvÃ¤rde fÃ¶r %sOgiltig opkod/operanderOgiltiga operander fÃ¶r parallell instruktion â%sâOgiltig opernad (anvÃ¤nd 1, 2 eller 3)Ogiltig operand fÃ¶r â%sâOgiltig operand fÃ¶r registeravstÃ¥ndOgiltig operand: omedelbartvÃ¤rde anvÃ¤nt som adress.Ogiltig operand: omedelbart vÃ¤rde anvÃ¤nt som basadress.Ogiltiga operanderOgiltiga operander %sOgiltiga operander fÃ¶r %sOgiltig Ã¥tgÃ¤rd fÃ¶r symbolOgiltig operator fÃ¶r operand.Ogiltigt eller otillÃ¥tet adresseringslÃ¤ge kombinerat med skalat indexOgiltig pc-relativ omlokaliseringOgiltig permutationsslutfÃ¶rareOgiltig posttyp fÃ¶r P3-format.Ogiltig posttyp fÃ¶r format B1Ogiltig posttyp fÃ¶r format P6Ogiltig posttyp fÃ¶r format X1Ogiltig posttyp fÃ¶r format X3Ogiltigt register fÃ¶r dbcc/tbcc-instruktion.Ogiltigt register fÃ¶r post-/preinkrement.Ogiltigt register fÃ¶r postdekrementoperationOgiltigt register fÃ¶r predekrementoperationOgiltigt register fÃ¶r preinkrementoperationOgiltigt register fÃ¶r enkelprecisions-fmpyadd eller fmpysubOgiltigt register i registerlistaOgiltig registerlista fÃ¶r ldm/stm
Ogiltigt registernummer vid â%.6sâOgiltig registerspecifikation.Ogiltigt regsiter.Ogiltigt register: 'r%d'Ogiltigt register r0 och r15 Ã¤r otillÃ¥tnaOgiltig omlokaliseringOgiltigt skalat indexeringslÃ¤ge, anvÃ¤dn (b,w,d,q)Ogiltig samtidig anvÃ¤ndning av âf%dâ och âf%dâOgiltigt kÃ¤llregister fÃ¶r denna instruktion, anvÃ¤nd âtfrâ.Ogiltigt kÃ¤llregister.Ogiltigt statusregister â%sâOgiltigt index (anvÃ¤nd 1 till %d)Ogiltigt suffix fÃ¶r literalpoolspostOgiltig syntax i Externt adresseringslÃ¤geOgiltig syntax i Minnesrelativt adresseringslÃ¤geOgiltig syntax i PC-relativt adresseringslÃ¤geOgiltig anvÃ¤ndning av â%c%dâ som utdataoperandOgiltig anvÃ¤ndning av âr%dâ som basuppdateringsadressoperandOgiltig anvÃ¤ndning av parallelliseringsoperator.Ogiltigt breddvÃ¤rde fÃ¶r %sJALX till en symbol i samma ISA-lÃ¤geHopp-/greninstruktion hittad vid slutet av ZOL-etiketten @%sSkrÃ¤p efter â}â: â%sâSkrÃ¤p vid filslut, %s.KÃ¤rninstruktion hittad vid slutet av ZOL-etiketten @%sKÃ¤nda MCU-namn:LDP-instruktion behÃ¶ver en 24-bitarsoperandLOC-uttryck som stegar bakÃ¥t stÃ¶ds inteLOC till okÃ¤nd eller obestÃ¤mbar sektion vid fÃ¶rsta passetLR och PC bÃ¶r inte bÃ¥da finnas i registerlistaEtiketten â$%dâ omdefinieradEtikett â%sâ matchar ett CPU-registernamnEtikett mÃ¥ste vara fÃ¶rst i en buntEtikett krÃ¤vs fÃ¶r .tagInledande plustecken inte tillÃ¥tet i kÃ¤rnlÃ¤geLÃ¤ngden fÃ¶r .comm â%sâ Ã¤r redan %ld. Inte Ã¤ndrad till %d.LÃ¤ngd fÃ¶r .comm â%sâ Ã¤r redan %ld. Ãndrades inte till %ld.LÃ¤ngden fÃ¶r .lcomm â%sâ Ã¤r redan %ld. Ãndrades inte till %ld..scomm-lÃ¤ngden â%sâ Ã¤r redan %ld. Inte Ã¤ndrad till %ld.LÃ¤ngdspecifikation Ã¶verhoppad. AdresslÃ¤ge 9F anvÃ¤ntRad %d: okÃ¤nd omlokaliseringstyp: 0x%x.Radnummer mÃ¥ste vara positiva heltal.
LiterallÃ¤sningarLÃ¥nga instruktioner kan inte kombineras.LÃ¤gsta bitar trunkerade i omedelbar flyttalsoperandM340-specifik opkod anvÃ¤nd vid assemblering fÃ¶r M210MCORE-specifika flaggor:
  -{no-}jsri2bsr	  {in}aktivera jsri-till-bsr-transformation (std: inakt)
  -{no-}sifilter	  {in}aktivera silicon-filterbeteende (def: inakt)
  -cpu=[210|340]          vÃ¤lj CPU-typ
  -EB                     assemblera fÃ¶r ett system med rak byteordning (standard)
  -EL                     assemblera fÃ¶r ett system med omvÃ¤nd byteordning
MCU-flagga krÃ¤ver ett namn
MDRD-vÃ¤rde mÃ¥ste vara mellan 1 och 8MIPS PIC-anrop till register annat Ã¤n $25MIPS-flaggor:
-EB			generera utmatning med rak byteordning
-EL			generera utmatning med omvÃ¤nd byteordning
-g, -g2			ta inte bort onÃ¶diga NOP:ar eller vÃ¤xla grenar
-G NUM			tillÃ¥t refereande objekt upp till NUM byte
			implicit med gp-registret [standard 8]
MN10200-flaggor:
inga Ã¤n
MN10300 assemblerflaggor:
inga Ã¤n
ORG-pseudo-op i MRI-stil stÃ¶ds inteMSP430-flaggor:
  -mmcu=<msp430-namn>     - vÃ¤lj mikrokontrollertyp
  -mcpu={430|430x|430xv2} - vÃ¤lj mikrokontrollerarkitektur
MT-specifika kommandoradsflaggor:
MU-instruktion kan inte befinnas sig i den hÃ¶gra behÃ¥llarenMakro %s inte implementeratMakro â%sâ har redan definieratsMaverick DSPSC-register fÃ¶rvÃ¤ntadesMaverick MVAX-register fÃ¶rvÃ¤ntadesMaverick MVD-register fÃ¶rvÃ¤ntadesMaverick MVDX-register fÃ¶rvÃ¤ntadesMaverick MVF-register fÃ¶rvÃ¤ntadesMaverick MVFS-register fÃ¶rvÃ¤ntadesMaximalt %d bitar kan sÃ¤ttas i âmask16â-operandMeP-specifika kommandoradsflaggor:
  -EB                     assemblera fÃ¶r system med rak byteordning
  -EL                     assemblera fÃ¶r system med omvÃ¤nd byteordning (standard)
  -mconfig=<namn>         ange en chipkonfiguration som ska anvÃ¤ndas
  -maverage -mno-average -mmult -mno-mult -mdiv -mno-div
  -mbitops -mno-bitops -mleadz -mno-leadz -mabsdiff -mno-absdiff
  -mminmax -mno-minmax -mclip -mno-clip -msatur -mno-satur -mcop32
                          aktivera/inaktivera de angivna opkoderna

  Om -mconfig Ã¤r angivet, modifierar Ã¶vriga -m-flaggorna den. Annars,
  om inga -m-flaggor Ã¤r angivna, kommer alla kÃ¤rn-opkoder att aktiveras;
  om nÃ¥gon aktiverande -m-flagga Ã¤r angiven, kommer endast de att aktiveras;
  om endas inaktiverande -m-flaggor Ã¤r angivna, kommer endast de att inaktiveras.
Minnesmappat register â%sâ utanfÃ¶r intervallDiverse 16-bitarsinstruktionerFelplacerat .entry. Ãverhoppat.Saknar â(â efter funktion fÃ¶r ersÃ¤ttningssymbolSaknar â}âSaknar â)â i indexerat ersÃ¤ttningssymboluttryckSaknar â,âSaknar â}â vid filslutSaknar â}â: â%sâSaknar )Saknar ) i ra(rb)Saknar .EXIT fÃ¶r ett .ENTRYSaknar .callinfoSaknar .callinfo fÃ¶r denna procedurSaknar .callinfo.Saknar .endp efter fÃ¶regÃ¥ende .procSaknar .exit
Saknar .label_state %ldSaknar .procend
Saknar gren eller bitvillkorSaknar â]â fÃ¶r att avsluta indexerat indirekt lÃ¤ge.Saknar â]â fÃ¶r att avsluta registerindirekt lÃ¤ge.Saknar argument fÃ¶r opkod <%s>.Saknar tvingande ersÃ¤ttningsterminator â:âSaknar funktionsnamn fÃ¶r .PROCSaknar funktionsnamn fÃ¶r .PROC (korrupt etikettkedja)Saknar etikettnamn fÃ¶r .LABELSaknar makronamnSaknar matchande klammrar: â%sâSaknar operandSaknar operand.Saknar parameterkvalificerare fÃ¶r â%sâ i makro â%sâSaknar relationstyp fÃ¶r predikatSaknar andra register fÃ¶r indexerat indirekt lÃ¤ge.Saknar andra register eller avstÃ¥nd fÃ¶r indexerat indirekt lÃ¤ge.Saknar sektionsnamnSaknar storleksargumentSaknar symbolnamn i direktivSaknar vÃ¤rde fÃ¶r nÃ¶dvÃ¤ndig parameter â%sâ fÃ¶r makro â%sâBlandning av normal och utÃ¶kad adressering stÃ¶ds inteBlandar registersyntax, med och utan â$â.Mer Ã¤n ett AR-register funnet i indirekt referenseMer Ã¤n en fÃ¶rskjutning hittad i indirekt referensMer Ã¤n en omlokaliseringsop per instrMotorola 68HC11/68HC12/68HCS12-flaggor:
  -m68hc11 | -m68hc12 |
  -m68hcs12 | -mm9s12x |
  -mm9s12xg               ange processorn [standard %s]
  -mshort                 anvÃ¤nd 16-bitars heltals ABI (standard)
  -mlong                  anvÃ¤nd 32-bitars heltals ABI
  -mshort-double          anvÃ¤nd 32-bitars dubbel ABI
  -mlong-double           anvÃ¤nd 64-bitars dubbel ABI (standard)
  --force-long-branches   fÃ¶rvandla alltid relativa grenar till absoluta
  -S,--short-branches     fÃ¶rvandla inte relativa grenar till absoluta
                          nÃ¤r avstÃ¥ndet Ã¤r utanfÃ¶r intervallet
  --strict-direct-mode    fÃ¶rvandla inte direktlÃ¤ge till utÃ¶kat lÃ¤ge
                          nÃ¤r instruktionen inte har stÃ¶d fÃ¶r direktlÃ¤ge
  --print-insn-syntax     skriv ut instruktionssyntax vid fel
  --print-opcodes         skriv ut listan Ã¶ver instruktioner med syntax
  --xgate-ramoffset       fÃ¶rskjut ram-adresse med 0xc000
  --generate-example      generera ett exempel fÃ¶r varje instruktion
                          (anvÃ¤nds fÃ¶r testning)
Multipla .cpu-direktiv hittadeFlera BFD_RELOC_NDS32_PTR_RESOLVED-mÃ¶nster stÃ¶ds inte Ã¤n!StÃ¶d fÃ¶r multiplikationsinstruktionerMÃ¥ste vara inom en rymd innan byte eller deklaration av underrymder.
NS32K-flaggor:
-m32032 | -m32532	vÃ¤lj variant av NS32K-arkitektur
--disp-size-default=<1|2|4>
NaN stÃ¶ds inte av detta mÃ¥l
Namn   # LÃ¤gen  Min opr  Max opr  LÃ¤gesmask   # AnvÃ¤nt

Nan, anvÃ¤nder noll.BehÃ¶ver #1 eller #2 hÃ¤rNeon-dubbel- eller kvadrupelprecisionsregister fÃ¶rvÃ¤ntadesNeon-kvadrupelprecisionsregister fÃ¶rvÃ¤ntadesNeon-enkel- eller dubbelprecisionsregister fÃ¶rvÃ¤ntatNÃ¤stlade procedurerIngen !literal!%ld hittadesIngen !tlsgd!%ld hittadesIngen !tlsldm!%ld hittadesInget .ENTRY fÃ¶r detta .EXITInget tillÃ¤gg tillÃ¥tet i @fptr()-omlokaliseringInget komma efter .pdesc <postnamn>Inget stÃ¶d inkompilerat fÃ¶r %d bitars objektfilsformatIngen aktuell ramIngen instruktion hittadIngen instruktion eller sÃ¥ saknas opkod.Ingen lda !gpdisp!%ld hittadesIngen ldah !gpdisp!%ld hittadesIngen operatorIngen omlokaliseringsoperandIngen sÃ¥dan post i lista (cpu-/mmu-register)Ingen sÃ¥dan opkodIngen symbol efter .code_adressIngen symbol efter .linkageIngen giltig etikettomlokaliseringsoperandIcke-absolut symbol: â%sâ.Icke-konstanta symboler inte tillÃ¥tna
Icke-global symbol: â%sâ kan inte vara en weak_definition.Inte en definierad coldfire-arkitekturInte en funktionstypInte ett symboliskt uttryckInte tillrÃ¤ckligt med operanderInte i ett utrymme.
Inte i ett underutrymme.
Instruktion %s stÃ¶ds inte i ordagrann.Antalet element mÃ¥ste vara positivtTal fÃ¶r storOPF omedelbar operand utanfÃ¶r intervall (0-0x1ff)Udda numrerat register anvÃ¤nt som mÃ¥l fÃ¶r flerregisterinstruktionAvstÃ¥nd utanfÃ¶r 15-bitarsintervallAvstÃ¥nd fÃ¶r nÃ¤stlade strukturer hoppas Ã¶verAvstÃ¥nd utanfÃ¶r 16-bitarsintervall fÃ¶r movw/movb-instr: %ldAvstÃ¥nd utanfÃ¶r 16-bitarsintervall: %ld.AvstÃ¥nd utanfÃ¶r 5-bitarsintervall fÃ¶r movw/movb-instr: %ldAvstÃ¥nd utanfÃ¶r 5-bitarsintervall fÃ¶r movw/movb-instr: %ld.AvstÃ¥nd utanfÃ¶r 9-bitarsintervall fÃ¶r movw/movb-instr: %ldEn av dessa instruktioner kan inte exekveras parallellt.Endast konstantavstÃ¥nd stÃ¶dsEndast konstant uttrymmesallokering stÃ¶dsEndast en .compiler-pseudoopkod per fil!Endast en .copyright-pseudoopkod per fil!Endast en .version-pseudoopkod per fil!Endast ett jÃ¤mfÃ¶relsevillkor tillÃ¥tetOndast ett Ã¶verspillsvillkor tillÃ¥tetEndast den fÃ¶rsta sÃ¶kvÃ¤gen som pÃ¥trÃ¤ffar konflikten rapporterasOpkod %s inte tillgÃ¤nglig i detta lÃ¤geOkÃ¤nd opkod â%sâ.Opkod â%sâ med dessa operandtyper inte tillgÃ¤nglig i %s-lÃ¤geOpkod â%sâ med dessa operandtyper inte tillgÃ¤nglig i H8/300-lÃ¤geOpkod â%sâ med dessa operandtyper inte tillÃ¤gnlig i H8/300H-lÃ¤geOpkod â%sâ med dessa operandtyper inte tillÃ¤gnlig i H8/300S-lÃ¤geOpkod(%d.%s): Operand â%sâ utanfÃ¶r intervall (anvÃ¤nd 1 eller 2)Operand %d till .%s mÃ¥ste vara en konstantOperan %d till .%s mÃ¥ste vara ett bevarat registerOperand %d till .%s mÃ¥ste vara ett skrivbart registerOperand %u till â%sâ borde vara %sOperand â%sâ utanfÃ¶r intervall (%d <= x <= %d)Operand â%xâ inte kÃ¤nd i fixup16.Operand â%xâ inte kÃ¤nd i fixup8.Operand har udda fÃ¶rskjutning (arg %d)Operand Ã¤r inte en konstant. â%sâOperander stÃ¤mmer inteOperand till .vframe motsÃ¤ger .prologueOperand utanfÃ¶r 16-bitarsintervall: â%ldâ.Operand utanfÃ¶r 8-bitarsintervall: â%ldâ.Operand utanfÃ¶r intervall (arg %d)Operand utanfÃ¶r intervall fÃ¶r en relativ gren: â%ldâ.Operand utanfÃ¶r intervall, %s.Operand till .copy_state mÃ¥ste vara en konstantOperan till .label_state mÃ¥ste vara en konstantOperand till .save.f mÃ¥ste vara en positivt 20-bitarskonstantOperand till .spill mÃ¥ste var en konstantOperand till .vframesp mÃ¥ste vara en konstant (sp-relativt avstÃ¥nd)OperandvÃ¤rde Ã¤r inte inom Ã¶vre 64 KB (arg %d)Operander till .save.gf fÃ¥r inte bÃ¥da vara nollOperator kan endast tillÃ¤mpas fÃ¶r symboler.Flaggan -b Ã¤r fÃ¶rÃ¥ldrad, anvÃ¤nd -mbigFlaggan -p Ã¤r fÃ¶rÃ¥ldrad, anvÃ¤nd -mmemparmFlaggan -r Ã¤r fÃ¶rÃ¥ldrad, anvÃ¤nd -mregparmFlaggan -s Ã¤r fÃ¶rÃ¥ldrad, anvÃ¤nd -msmallOkÃ¤nd flagga â%sâ.AnvÃ¤ndning:
  -a[underflaggaâ¦]	  slÃ¥ pÃ¥ listningar
                      	  Underflaggor [standard hls]:
                      	  c      uteslut falska villkor
                      	  d      uteslut felsÃ¶kningsdirektiv
                      	  g      inkludera allmÃ¤n information
                      	  h      inkludera hÃ¶gnivÃ¥kÃ¤llkod
                      	  l      inkludera asselmber
                      	  m      inkludera makroexpansioner
                      	  n      uteslut formulÃ¤rhantering
                      	  s      inkludera symboler
                      	  =FIL   lista till FIL (mÃ¥ste vara den sista underflaggan)
.word-avstÃ¥ndshantering utanfÃ¶r intervall Ã¤r inte implementerat fÃ¶r .arch common_v10_v32Ãverspill i uttryck, trunkerat till 16 bitarÃverspill i uttryck, trunkerat till 8 bitarSkriv Ã¶ver uttryckligen satt Tag_ARC_ABI_rf16 till fullstÃ¤ndig registermappSkriv Ã¶ver uttryckligen satt Tag_ARC_CPU_basePC inte tillÃ¥ten i registerlistaPC-del av operand opÃ¥litligPC-relativ gren till etikett %s vilken inte finns i instruktionsrymdenPC-relativ omlokalisering tillÃ¥ts inte fÃ¶r (intern) typ %dPC anvÃ¤nt som argument till RPTPC, CT, TR och TT behandlas som om de Ã¤r en enhet men operander mÃ¥ste vara i olika enheterPC-relativ Ã¥tkomst utanfÃ¶r intervallPC-relativ Ã¥tkomst till feljusterad adress (%lx)PC-relativ Ã¥tkomst anvÃ¤nder feljusterad adress (%lx)PC-relativ Ã¥tkomst anvÃ¤nder feljusterad adress (%lx)PC-relativt avstÃ¥nd inte 4-bytesjusteratPC-relativt avstÃ¥nd utanfÃ¶r intervallPC-relativ referens till en annan sektionPC-relativ omlokalisering mÃ¥ste lÃ¶sas upp trivialtÃverspill fÃ¶r PIC-kodavstÃ¥nd (max 16 bitar med tecken)Ãverspill fÃ¶r PIC-kodsavstÃ¥nd (max 32 bitar med tecken)PIC omlokaliseringsstorlek matchar inte operandstorlekPJ-flaggor:
-little			generera kod med omvÃ¤nd byteordning
-big			generera kod med rak byteordning
PRU-flaggor:
  -mlink-relax     generera omlokaliseringar fÃ¶r lÃ¤nkaravslappning (standard).
  -mno-link-relax  generera inte omlokaliseringar fÃ¶r lÃ¤nkaravslappning.
Parallellopkod kan inte innehÃ¥lla mer Ã¤n tvÃ¥ instruktionerParameter vid namn â%sâ existerar inte fÃ¶r makro â%sâParametrar fÃ¶r en existerande underrymd kan inte modifierasTolkning misslyckades.PrestandautÃ¶kningPrestandautÃ¶kning 2Kanske du saknar %%tpoff()?Rapportera denna bugg.
AnvÃ¤nd --help fÃ¶r att se anvÃ¤ndning och flaggor fÃ¶r denna assembler.
PoÃ¤nglÃ¶st standardvÃ¤rde fÃ¶r nÃ¶dvÃ¤ndig parameter â%sâ i makro â%sâOnÃ¶dig anvÃ¤ndning av p0 som fÃ¶rsta operand till .%sOnÃ¶dig anvÃ¤ndning av noll som fÃ¶rsta operand till .prologueEfterdekrementslÃ¤ge Ã¤r inte giltigt fÃ¶r 68HC11.EfterinkrementslÃ¤ge inte giltigt fÃ¶r 68HC11.PowerPC-flaggor:
-a32                    generera ELF32/XCOFF32
-a64                    generera ELF64/XCOFF64
-u                      hoppas Ã¶ver
-mpwrx, -mpwr2          generera kod fÃ¶r POWER/2 (RIOS2)
-mpwr                   generera kod fÃ¶r POWER (RIOS1)
-m601                   generera kod fÃ¶r PowerPC 601
-mppc, -mppc32, -m603, -m604
                        generera kod fÃ¶r PowerPC 603/604
-m403                   generera kod fÃ¶r PowerPC 403
-m405                   generera kod fÃ¶r PowerPC 405
-m440                   generera kod fÃ¶r PowerPC 440
-m464                   generera kod fÃ¶r PowerPC 464
-m476                   generera kod fÃ¶r PowerPC 476
-m7400, -m7410, -m7450, -m7455
                        generera kod fÃ¶r PowerPC 7400/7410/7450/7455
-m750cl, -mgekko, -mbroadway
                        generera kod fÃ¶r PowerPC 750cl/Gekko/Broadway
-m821, -m850, -m860     generea kod fÃ¶r PowerPC 821/850/860
FÃ¶rinkrementslÃ¤ge Ã¤r inte giltigt fÃ¶r 68HC11Predikatregister fÃ¶rvÃ¤ntadesPredikatkÃ¤lla och mÃ¥l krÃ¤vsFÃ¶r tidigt suffixslut -- StandarvÃ¤rdet blir dFÃ¶regÃ¥ende .save inte komplettProcessorvarianter: FÃ¶rbjudet register anvÃ¤nt som reduktionsregister, %s.Pseudokod redan anvÃ¤nd %sPseudodirektiv .fil Ã¤r endast giltig vid generering av ELFPseudodirektiv .loc Ã¤r endast giltigt vid generering av ELFQUICKRoT 64-bitarsutÃ¶kning inte tillÃ¤mpbar fÃ¶r denna instruktionQUICKRoT-utÃ¶kning krÃ¤ver 4 registerKvalificerande predikat fÃ¶rvÃ¤ntadesRA-register sparas tvÃ¥ gÃ¥nger.RC/SAE-operand mÃ¥ste fÃ¶lja omedelbara operanderRC/SAE-operand mÃ¥ste fÃ¶regÃ¥ omedelbara operanderRDRD, (RI,#offs5)RD,RSRI, #imm4RISC-V-flaggor:
  -fpic          generera positionsoberoende kod
  -fno-pic       generera inte positionsoberoende kod (standard)
  -march=ISA     stÃ¤ll in RISC-V-arkitektur
  -mabi=ABI      stÃ¤ll in RISC-V ABI
  -mrelax        aktivera lÃ¤ttnad (standardvÃ¤rde)
  -mno-relax     inaktivera lÃ¤ttnad
  -march-attr    generera RISC-V-arkitekturattribut
  -mno-arch-attr generera inte RISC-V-arkitekturattribut
Talbas â%sâ stÃ¶ds inte eller Ã¤r ogiltigRd och Rm bÃ¶r vara olika i mlaRd och Rm bÃ¶r vara olika i mulReducerad registerkonfigurationsalterntiv (GPR16)ÃverflÃ¶diga â#â-suffixoperatorerRegister inte giltig fÃ¶r H8/300Register vid (r1) kan ibland bli korrupt av assembleroptmieringar.
AnvÃ¤nd .set noat fÃ¶r att stÃ¤nga av de optimeringarna (och denna varning).Register mÃ¥ste vara R0--R7Register mÃ¥ste vara RnRegister mÃ¥ste vara adressregisterRegister mÃ¥ste vara ivtp eller tvtpRegisternamn %s stÃ¥r i konflikt med en symbol med samma namnRegisternamn fÃ¶rvÃ¤ntadesRegisternummer (R%ld) fÃ¶r dubbelordsÃ¥tkomst mÃ¥ste vara jÃ¤mn.Registernummer mÃ¥ste vara JÃMNTRegisternummer utanfÃ¶r intervall 0..%uRegistersymbol %s Ã¤r redan definierad.RegistervÃ¤rdesnotering Ã¶verhoppadRegister kan inte anvÃ¤ndas som ett prefix fÃ¶r indexerat uttryck [%s]Register kan inte anvÃ¤ndas utan absolututtryck [%s]Register kan inte anvÃ¤ndas inom omedelbart uttryck [%s]LÃ¤ttnad borde aldrig intrÃ¤ffaLÃ¤ttnad fÃ¶r lÃ¥ngagrenar fÃ¶r .arch common_v10_v32 inte implementeratOmlokalisering %d stÃ¶ds inte av objektfilsformatOmlokaliserbara vÃ¤rden krÃ¤ver Ã¥tminstone ORD-lagringOmlokalisering %d stÃ¶ds inte av objektfilsformat.Omlokalisering %s Ã¤r inte sÃ¤ker fÃ¶r %sOmlokalisering fÃ¥r inte plats. (omlokaliseringsvÃ¤rde = 0x%lx)Omlokalisering stÃ¶ds endast i FDPIC-lÃ¤geRapportera buggar till %s
Reserverat ord â%sâ anvÃ¤nt som parameter i makro â%sâRn fÃ¥r inte Ã¶verlappa med andra operanderRoterande registerindex mÃ¥ste vara en icke-negativ konstantS+core koprocessorregister fÃ¶rvÃ¤ntadesS+coer register fÃ¶rvÃ¤ntadesS+core specialregister fÃ¶rvÃ¤ntadesSH-flaggor:
--little		generera kod med omvÃ¤nd byteordning
--big			generera kod med rak byteordning
--relax			Ã¤ndra hoppinstruktioner fÃ¶r lÃ¥nga fÃ¶rskjutningar
--renesas		inaktivera optimering med sektionssymbol fÃ¶r
			kompatibilitet med Renesas-assembler.
--small			justera sektioner till 4 byts-grÃ¤nser, inte 16
--dsp			aktivera sh-dsp instr, och inaktivera flyttals-ISA.
--allow-reg-prefix	tillÃ¥t â$â som ett registernamnsprefix.
--isa=[any		anvÃ¤nd lÃ¤mpligast isa
    | dsp               samma som â-dspâ
    | fpSHF_ALLOC Ã¤r inte satt fÃ¶r GNU_MBIND-sektion: %sSIMD skalÃ¤r- eller flyttalsregister fÃ¶rvÃ¤ntadesSMC Ã¤r inte tillÃ¥tet fÃ¶r denna arkitekturSP och PC Ã¤r inte tillÃ¥tna i .unwind_movsp-direktivSP inte tillÃ¥tet i registerlistaSPARC-flaggor:
SPU-flaggor:
  --apuasm		  emulera apuasm-beteende
SRS-basregister mÃ¥ste vara r13SSE-instruktion â%sâ anvÃ¤ndSVC Ã¤r inte tillÃ¥tet fÃ¶r denna arkitekturSVE-predikatregister fÃ¶rvÃ¤ntadesSVE-vektorregister fÃ¶rvÃ¤ntadesSYMBOLTABELL inte implementeradS^# fÃ¥r endast lÃ¤sÃ¥tkomstS^# behÃ¶ver uttryckSamma kÃ¤ll-/destinationsregister anvÃ¤nt (âr%dâ), resultat Ã¤r odefinieratSamma kÃ¤ll-/destinationsregister anvÃ¤nt (âr%dâ), resultat Ã¤r odefinieratSkalat indexeringsadresseringslÃ¤ge kombinerad med skalatindexAndra operanden till .save motsÃ¤ger .prologueAndra operanden till .%s inte en konstantAndra operanden till .prologue mÃ¥ste vara ett generellt registerAndra operanden till .prologue mÃ¥ste vara det fÃ¶rsta av %d generella registerAndra operanden till .restore mÃ¥ste vara en konstant >= 0Andra operanden till .save inte ett giltigt registerAndra operanden till .save.b mÃ¥ste vara ett generellt registerAndra operanden till .save.b mÃ¥ste vara det fÃ¶rsta av %d generella registerAndra operanden till .save.g mÃ¥ste vara ett generellt registerAndra operanden till .save.g. mÃ¥ste vara det fÃ¶rsta av %d generella registerDen andra operanden till .save.gf mÃ¥ste vara en icke negativ 20-bitarskonstantAndra operanden till .unwabi mÃ¥ste vara en konstantSektionsvÃ¤xling i kod stÃ¶ds inte.Semantiskt fel. Denna typ av operand kan inte omlokaliseras, det mÃ¥ste var en assembleringstidskonstantSkiftvÃ¤rde > 32. anvÃ¤nder <vÃ¤rde %% 32>SkiftvÃ¤rde bÃ¶r vara i intervall [0,31]Korta grenar, Odefinierad, SVC, LDM/STMÃverspill fÃ¶r kort literal (%ld.), omedelbart lÃ¤ge antaget.Omedelbart vÃ¤rde med tecken %ld fÃ¶r stortStorlek fÃ¶r ram Ã¶verstiger max om 96 registerStorlek fÃ¶r roterande register Ã¶verstiger ramstorlekNÃ¥got glÃ¶mde bort att rensa upp
KÃ¤ll- och destinationsregister bÃ¶r inte vara sammaKÃ¤llregister fÃ¶r %s Ã¤r inte stÃ¶rre Ã¤n destinationsregistretKÃ¤llregister mÃ¥ste vara i samma enhetVilsekommet â,â eller felaktig indirekt registeradresseringslÃ¤ge.Vilsekomna operander; (%d operander/instruktion max)FristÃ¥ende â#â Ã¤r otillÃ¥tetStrÃ¤ngutÃ¶kningErsÃ¤ttningssymboler mÃ¥ste bÃ¶rja med en bokstavOkÃ¤nd undertyp %d.Sunplus-v2-0-0-20060510
StÃ¶d fÃ¶r 64-bitars aritmetik inte inkompilerat.ARK-vÃ¤rde som stÃ¶ds Ã¤r:Byter instruktionsordningSymbol %s anvÃ¤nd som omedelbar operand i PIC-lÃ¤ge.Symbol â%sâ kunde inte skapas.Symbol â%sâ kan inte bÃ¥de vara svag och normalSymbol fÃ¶rvÃ¤ntadesSymbol saknas
Symbol saknas fÃ¶r .set/.equSymbolen anvÃ¤nd som omedelbar fÃ¶r mbar-instruktionSymbol anvÃ¤nd som omedelbar fÃ¶r skiftinstruktionSymbol anvÃ¤nd som omedelbart vÃ¤rde fÃ¶r msrset/msrclr-instruktionerSyntax i skalat indexeringslÃ¤ge, anvÃ¤nd [Rn:m] dÃ¤r n=[0..7] m={b,w,d,q}TLS-omlokalisering mot en konstantTLS-omlokalisering inte tillÃ¥tet i FLIX-buntTLS omlokaliseringsstorlek matchar inte operandstorlekTLS_*_S9-omlokaliseringar stÃ¶ds inte Ã¤nTMS320C6000-flaggor:
TOC-sektionsstorlek Ã¶verstiger 64kSYMBOLSPÃRNING inte implementeratTagg mÃ¥ste komma fÃ¶re kvalificerande predikat.Taggnamn fÃ¶rvÃ¤ntadesTaggar fÃ¶r upprullningspseudo-op:ar stÃ¶ds inte Ã¤nMÃ¥lprocessor har inte stÃ¶d fÃ¶r denna instruktion.Pseudo-op:en â.%sâ inte implementerad
%s-operanden matchar intePseudo-op:en .BTEQU Ã¤r inte implementerad.Pseudo-op:en .DEFINE Ã¤r inte implementeradPseudo-op:en .ENTER stÃ¶ds inte.LEAVE pseudo-op:en stÃ¶ds intePseudo-op:en .MACRO Ã¤r inte implementerad64-bitarsfilformatet anvÃ¤nds utan esame-instruktion.FelsÃ¶karen kommer att korrumpera bt (r25).
Om du inte behÃ¶ver felsÃ¶ka denna kod anvÃ¤nd .set nobreak fÃ¶r att slÃ¥ av denna varning.FelsÃ¶karen kommer att korrumpera sstatus/ba (r30).
Om du inte behÃ¶ver felsÃ¶ka denna kod anvÃ¤nd .set nobreak fÃ¶r att slÃ¥ av denna varning.FÃ¶ljande ARC-specifika assemblerflaggor Ã¤r fÃ¶rÃ¥ldrade och accepteras
endast pÃ¥ grund av kompatibilitet:
Indata â%sâ och utdata â%sâ filer Ã¤r de sammaFlaggan â--no-allow-flixâ fÃ¶rhindra flerlucks-flix.FÃ¤ll-ID:t mÃ¥ste vara en konstant.Denna arkitektur har inte stÃ¶d fÃ¶r atomiska instruktionerDenna arkitektur har inte stÃ¶d fÃ¶r mmuDenna assembler har inte stÃ¶d fÃ¶r processorgeneration %ldDenna assembler konfigurerades fÃ¶r ett â%sâ-mÃ¥l och som standard,
cpu-typ â%sâ.

Denna assembler konfigurerades fÃ¶r ett â%sâ-mÃ¥l.
Denna coprocessor-registerÃ¥tkomst fÃ¶r ARMv8 Ã¤r fÃ¶rÃ¥ldratDenna instruktion kan vara ofÃ¶rutsÃ¤gbar om exekverad pÃ¥ M-profilkÃ¤rnor med avbrott aktiverade.Detta Ã¤r positionen dÃ¤r anvÃ¤ndningen stÃ¥r i konfliktDenna operator producerar endast tvÃ¥ bytevÃ¤rden.Detta program Ã¤r fri programvara; du kan sprida det vidare under villkoren
i GNU General Public License version 3 eller (om du sÃ¥ vill) senare version.
Detta program har inga som helst garantier.

Thumb har inte stÃ¶d fÃ¶r NOP med tipsThumb har inte stÃ¶d fÃ¶r villkorad exekveringThumb har inte stÃ¶d fÃ¶r negativ registerindexeringThumb har inte stÃ¶d fÃ¶r registerindexering med Ã¥terskrivningThumb har inte stÃ¶d fÃ¶r registerefterindexeringThumb har inte stÃ¶d fÃ¶r 2-argumentsformen av denna instruktionThumb har inte stÃ¶d fÃ¶r detta adresseringslÃ¤geThumb-kodning har inte stÃ¶d fÃ¶r en omedelbar hÃ¤rThumb-kodning har inte stÃ¶d fÃ¶r rotationThumb load/store multple har inte stÃ¶d fÃ¶r {reglist}^Thumb har endast stÃ¶d fÃ¶r LSL i skiftad registerindexeringThumb2-MUL fÃ¥r inte stÃ¤lla in flaggorThumb-2-instruktion endast giltig i enhetlig syntaxThumb2-gren utanfÃ¶r intervallFÃ¶r fÃ¥ operander till â%sâ.FÃ¶r mÃ¥nga argument. â%sâFÃ¶r mÃ¥nga instruktioner fÃ¶r bunt.FÃ¶r mÃ¥nga operanderFÃ¶r mÃ¥nga operander skickade till instruktionFÃ¶r mÃ¥nga operander skannadeFÃ¶r mÃ¥nga operander: %sFÃ¶r mÃ¥nga register poppadeFÃ¤ll-ID â%ldâ Ã¤r utanfÃ¶r intervall.FÃ¤ll-ID mÃ¥ste vara inom [0x30..0x39] eller [0x40..0xff].Behandlar â%-*sâ som en symbol.FÃ¶rsÃ¶kte att gÃ¶ra .set med okÃ¤nt lÃ¤ge â%sâFÃ¶rsÃ¶kte att konvertera PC-relativ gren till absoluthoppTvÃ¥ IU-instruktioner kan inte exekveras parallelltTvÃ¥ MU-instruktioner kan inte exekveras parallelltTvÃ¥ instruktioner i samma bunt skriver bÃ¥da till register %s, vilket inte Ã¤r tillÃ¥et.Kan inte allokera minne fÃ¶r nya instruktioner
Kan inte avgÃ¶ra standardmÃ¥lprocessor frÃ¥n strÃ¤ng: %sKan inte hitta %s-omlokalisering fÃ¶r instruktion %sKan inte generera â%sâ-Ã¶verrensstÃ¤mmande kod utan mthc1Kan inte mixa instruktioner som angivetKan inte tolka TLS-bas: %sKan inte producera omlokalisering fÃ¶r thumb-opkod: %lxKan inte producera omlokalisering mot symbol â%sâKan inte anvÃ¤nda @pcl-omlokalisering fÃ¶r instr %sKan inte anvÃ¤nda @plt-omlokalisering fÃ¶r instr %sOjusterad operand. MÃ¥ste vara 16-bitarsjusteradOjusterad operand. MÃ¥ste vara 32-bitarsjusteradUnÃ¤r operator %c Ã¶verhoppad efter som en felaktig operand fÃ¶ljerObalanserade parenteser i %s-operand.Obalanserade parenteser i operand %dOdefinerade .EXPORT/.IMPORT-argument (Ã¶verhoppade): %sOdefinierad absolutkonstant: â%sâ.Odefinierat register: â%sâ.Odefinierad rymd: â%sâ Antar rymdnummer = 0.Odefinierad ersÃ¤ttningssymbol â%sâOvÃ¤ntad grenkonvertering med â%xâOvÃ¤ntat tecken â%câ efter operand %d till %s.OvÃ¤ntad referens till en symbol i en icke-kodsektionOvÃ¤ntat returvÃ¤rde [%d] frÃ¥n parse_toc_entry!
Ohanterat beroende %s fÃ¶r %s (%s), not %dOhanterad omlokaliseringstypOimplementerat register â%sâ angivetOkÃ¤nd .syntax-operandOkÃ¤nd CPU-identifierare â%sâOkÃ¤nd TMS320C30-instruktion: %sOkÃ¤nd cpu -mcpu=%sOkÃ¤nt undantag: â%sâOkÃ¤nt utÃ¶kningOkÃ¤nt indirekt adresseringslÃ¤geOkÃ¤nd instruktion â%sâOkÃ¤nd opkod â%.*sâ.OkÃ¤nd opkod â%sâOkÃ¤nd opkod â%sâ.OkÃ¤nd opkod: â%sâOkÃ¤nd operatorOkÃ¤nt processorregister (32-bitar) : â%dâOkÃ¤nt processorregister : â%dâOkÃ¤nd psr-flagga â%sâOkÃ¤nt registerpar - index relativtlÃ¤ge: â%dâOkÃ¤nt registerpar: â%dâOkÃ¤nt register: â%dâOkÃ¤nd omlokalisering i md_apply_fix: %sOkÃ¤nd omlokalisering pÃ¥trÃ¤ffad i md_apply_fix.OkÃ¤nd omlokaliseringsoperand: !%sOkÃ¤nd omlokaliseringsoperand: @%sOkÃ¤nd segmenttypOkÃ¤nd storlek pÃ¥ flyttalsregisterOkÃ¤nd typOkÃ¤nd typ %c
Omatchad hÃ¶g omlokaliseringOmatchad high/shigh omlokaliseringOkÃ¤nt namn pÃ¥ CPU-errata bÃ¶rjar hÃ¤r: %sOkÃ¤nd flagga: -hiddenOkÃ¤nt .LEVEL-argument
OkÃ¤nt .option-direktiv: %s
OkÃ¤nd .type-argumentOkÃ¤nd villkorskod â%sâOkÃ¤nd beroendespecificerare %d
OkÃ¤nd fÃ¤lttyp â%câOkÃ¤nt indirekt adresseringsformat â%sâOkÃ¤nd instruktion â%sâOkÃ¤nt opkodsformat: â%sâOkÃ¤nd opkod, %s.OkÃ¤nd opkod: â%sâOkÃ¤nd operandlista â%sâ fÃ¶r instruktion â%sâOkÃ¤nd operand/register, %s.OkÃ¤nd flagga â-x%sâOkÃ¤nd flagga fÃ¶ljer efter -KOkÃ¤nd flyttalskonstant eller sÃ¥ stÃ¶ds den inteOkÃ¤nd parallell instruktion â%sâOkÃ¤nd parallellinstruktion â%sâOkÃ¤nd kombination av parallellinstruktioner â%s || %sâOkÃ¤nt relationstyp fÃ¶r predikatOkÃ¤nd sektion â%sâOkÃ¤nd statusbit â%sâOkÃ¤nd struktur-/uniontagg â%sâOkÃ¤nd funktion fÃ¶r ersÃ¤ttningssymbolOkÃ¤nd version â%sâTeckenlÃ¶st omedelbart vÃ¤rde %ld fÃ¶r stortRISC-V omlokaliseringsnummer %d stÃ¶ds inteUtsÃ¤ndning stÃ¶ds inte: â%sâUppfixningsstorlek %d stÃ¶ds inteUtÃ¶kning fÃ¶r instruktionsuppsÃ¤ttning stÃ¶ds inte: %sKonstant i omlokalisering stÃ¶ds inteProcessorgeneration %d stÃ¶ds inteOmlokaliseringsstorlek %d stÃ¶ds inteAnvÃ¤ndning av %s stÃ¶d inteAnvÃ¤nding av .gpword stÃ¶ds inteAnvÃ¤ndning av sp saknar stÃ¶dOterminerad strÃ¤ng efter absolututtryckUpprullningsdirektiv fÃ¶ljs inte av en instruktion.AnvÃ¤ndning %s [flaggaâ¦] [assemblerfilâ¦]
AnvÃ¤ndning av .def/.ref Ã¤r fÃ¶rÃ¥ldrat. AnvÃ¤nd .global istÃ¤lletAnvÃ¤ndning av PC hÃ¤r Ã¤r OPÃLITLIGTAnvÃ¤ndning av PC hÃ¤r Ã¤r fÃ¶rÃ¥ldratAnvÃ¤ndning av RX-strÃ¤nginstruktion hittad i en fil som assembleras utan strÃ¤nginstruktionsstÃ¶dAnvÃ¤ndning av p0 Ã¤r inte giltigt i detta sammanhangAnvÃ¤ndning av r%u som ett kÃ¤llregister nÃ¤r r%u Ã¤r destinationsregister Ã¤r fÃ¶rÃ¥ldrat.AnvÃ¤nd .mmregs-direktivet fÃ¶r att anvÃ¤nda minnesmappade registernamn sÃ¥ som â%sâAnvÃ¤nde $at utan â.set noatâAnvÃ¤nda FPU-instruktioner krÃ¤ver aktivering av FPU-utÃ¶kningAnvÃ¤nde mer Ã¤n 48 tillgÃ¤ngliga roterande registerAnvÃ¤nde mer Ã¤n 96 tillgÃ¤ngliga roterande registerAnvÃ¤nde mer Ã¤n %d deklarerat antal roterande registerAnvÃ¤nder ENTRY snarare Ã¤n CODE i exportdirektig fÃ¶r %sAtt anvÃ¤nda en konstant som andra operand till .prologue Ã¤r fÃ¶rÃ¥ldratAnvÃ¤nder gammal stil, %%hi(utr), Ã¤ndra till PPC-stil, utr@h.AnvÃ¤nder gammal stil, %%lo(utr), Ã¤ndra till PCC-stil, utr@l.AnvÃ¤nder temp.-register (r1)AnvÃ¤nder temp.-register (r1)VAX-flaggor:
-d LÃNGD	\hoppas Ã¶ver
-J		\hoppas Ã¶ver
-S		\hoppas Ã¶ver
-t FIL		\hoppas Ã¶ver
-T		\hoppas Ã¶ver
-V		\hoppas Ã¶ver
VFP-register mÃ¥ste vara intilliggandeVFP-enkel- eller dubbelprecisionsregister fÃ¶rvÃ¤ntadesVFP-enkelprecisionsregister fÃ¶rvÃ¤ntadesVFP-enkel-, dubbel- eller Neon-kvadrupelprecisionsregister fÃ¶rvÃ¤ntadesVFP-systemregister fÃ¶rvÃ¤ntadesVFP-/Neon-dubbelprecisionsregister fÃ¶rvÃ¤ntadesVIP_BEGIN-fel:%sKrÃ¤nkning av VLIW-packningsbegrÃ¤nsningVLIW-packning anvÃ¤nd fÃ¶r -mno-packVMS-flaggor:
-+			koda (trunkera ej) namn lÃ¤ngre Ã¤n 64 tecken
-H			visa ny symbol efter hash-trunkering
-replace/-noreplace	aktivera eller inaktivera optimeringen av proceduranrop
VMS-flaggor:
-+			hash-koda namn lÃ¤ngre Ã¤n 31 tecken
-1			âconstâ-hantering kompatibel med gcc 1.x
-H			visa ny symbol efter hash-trunkering
-h NUM			hasha inte namn med blandade gemener/versaler, och justera skiftlÃ¤ge till:
			0 = versaler, 2 = gemener, 3 = bevara skiftlÃ¤ge
-v"VERSION"		kod som assemblerades producerades av kompilator âVERSIONâ
VÃ¤rde %d och %d utanfÃ¶r intervallVÃ¤rde %d fÃ¥r inte plats i %d-bitarsfÃ¤lt med teckenVÃ¤rde %d fÃ¥r inte plats i teckenlÃ¶st %d-bitarsfÃ¤ltVÃ¤rde %ld inte justerat med 2 fÃ¶r 10-bitars PC-relativ gren.VÃ¤rde %ld inte justerad med 2 fÃ¶r 9-bitars PC-relativ gren.VÃ¤rde %ld fÃ¶r stort fÃ¶r 10-bitras PC-relativ gren.VÃ¤rde %ld fÃ¶r stort fÃ¶r 8-bitars PC-relativ gren.VÃ¤rde %ld fÃ¶r stort fÃ¶r 9-bitars PC-relativ gren.VÃ¤rde fÃ¶r ENTRY_FR mÃ¥ste vara i intervallet 12..21
VÃ¤rde fÃ¶r ENTRY_GR mÃ¥ste vara i intervallet 3..18
VÃ¤rde fÃ¶r ENTRY_SR mÃ¥ste vara 3
VÃ¤rde fÃ¶r parameter â%sâ i makro â%sâ har redan angettsVÃ¤rde inte i 16-bitarsintervall: %ldVÃ¤rde inte i 16-bitarsintervall med tecken: %ldVÃ¤rde inte i teckenlÃ¶st 4-bitarsintervall: %ldVÃ¤rde inte i teckenlÃ¶st 5-bitarsintervall: %ldVÃ¤rde inte i 6-bitarsintervall: %ldVÃ¤rde inte i teckenlÃ¶st 6-bitarsintervall: %ldVÃ¤rde inte i 8-bitarsintervall: %ldVÃ¤rde inte i 16-bitarsintervall med tecken: %ldVÃ¤rde utanfÃ¶r 16-bitarsintervall.VÃ¤rde utanfÃ¶r 3-bitarsintervall.VÃ¤rde utanfÃ¶r 4-bitarsintervall.VÃ¤rde utanfÃ¶r 5-bitarsintervall.VÃ¤rde trunkerat till 62 bitarÃtkomst av variabel anvÃ¤nder skrivskyddat ankare liten datalÃ¤sning, men det Ã¤r inte i den skrivskyddade sektionen fÃ¶r liten dataÃtkomst av variabel anvÃ¤nder ankare fÃ¶r lÃ¤sning/skrivning fÃ¶r liten datalÃ¤sning, men det Ã¤r inte i sektionen fÃ¶r lÃ¤sning/skrivning fÃ¶r liten dataVÃ¤ldigt kort instr till flagga, d.v.s. du kan inte gÃ¶ra det pÃ¥ en NULLstrSlut pÃ¥ virtuellt minneVarning: Varning: villkor utanfÃ¶r IT-block fÃ¶r Thumb.Varning: duplicerat register (r%d) i registerlistaVarning: internt fel: glÃ¶mmer att sÃ¤tta endndx fÃ¶r %sVarning: registerintervall inte i stigande ordningSkrivningar till register â%sâ Ã¤r inte tillÃ¥tna.Felaktig fÃ¶rskjutning %dFelaktigt antal indataoperanderFelaktigt antal operanderFelaktigt antal utdataoperanderFel antal operander i standard, kontroller ns32k-opcodes.hFelaktigt register i flyttalsregisterlistaFelaktigt register i registerindirekt lÃ¤ge.Felaktig storlekspekarregister fÃ¶r arkitektur.XScale-ackumulatorregister fÃ¶rvÃ¤ntadesXtensa-alternativet fÃ¶r absoluta literaler stÃ¶ds inte; Ã¶verhoppat[-mwarn-syms]: Tilldelning gÃ¶r att en symbol matchar en ARM-instruktion: %s[0-9]H-etiketter fÃ¥r inte blandas med dot-pseudo:er[0-9]H-etiketter fÃ¥r inte finnas ensamma pÃ¥ en rad[PC]-index fÃ¶rbjudet[]index samma som ()+register: opÃ¥litligt[]index samma som -()register: opÃ¥litligt[no-]generics Ã¤r fÃ¶rÃ¥ldrat; anvÃ¤nd [no-]transform istÃ¤llet[no-]relax Ã¤r fÃ¶rÃ¥ldrat; anvÃ¤nd [no-]transform istÃ¤llet[tocv] symbol Ã¤r inte en toc-symbolâ%s %dâ efter â%s %dâ frÃ¥n %s:%uâ%s %dâ men block inte Ã¶ppet Ã¤nâ%s%sâ kan inte anvÃ¤ndas som skrivmaskâ%s%sâ tillÃ¥ts inte med â%s%cââ%sâ OtillÃ¥ten rÃ¤kningsregisterkombination.â%sâ OtillÃ¥ten anvÃ¤ndning av register.â%sâ OtillÃ¥ten anvÃ¤ndning av register.â%sâ och â%sâ kan inte vara odefinierade i â%s - â%sââ%sâ kan inte likstÃ¤llas med allmÃ¤n symbol â%sââ%sâ kan inte vara odefinierad i â%sâ - â%sâ {sektion %s}â%sâ kan inte vara odefinierad i â%sâ {sektion %s} - â%sââ%sâ kan inte versioneras som allmÃ¤n symbol â%sââ%sâ kan inte placeras i %s i %s-mallâ%sâ kan inte ha predikatâ%sâ kan inte anvÃ¤ndas hÃ¤râ%sâ kan inte anvÃ¤ndas med â%sââ%sâ passar inte i %s-mallâ%sâ passar inte i buntâ%sâ har inte stÃ¶d fÃ¶r fÃ¶rÃ¥ldrat NaNâ%sâ har odefinierat resultatâ%sâ Ã¤r redan alias fÃ¶r %s â%sââ%sâ Ã¤r fÃ¶rÃ¥ldrat, anvÃ¤nd â%sââ%sâ Ã¤r inte ett giltigt %s-uttryckâ%sâ Ã¤r inte en giltig parameterkvalificerare fÃ¶r â%sâ i makro â%sââ%sâ stÃ¶ds inte i 64-bitarslÃ¤geâ%sâ stÃ¶ds inte fÃ¶r â%s%sââ%sâ stÃ¶ds inte fÃ¶r â%sââ%sâ Ã¤r inte giltigt hÃ¤r (fÃ¶rvÃ¤ntade â%c%s%s%câ)â%sâ stÃ¶ds endast i 64-bitarslÃ¤geâ%sâ fÃ¥r inte vara sist i en buntâ%sâ mÃ¥ste vara sist i instruktionsgruppâ%sâ operand %d mÃ¥ste anvÃ¤nda â%sesâ-segmentâ%sâ bÃ¶r var en operand till detta .endpâ%sâ symbol utan fÃ¶regÃ¥ende funktionâ%sâ var redan definieradâ%sâ har redan anvÃ¤nts som parameternamn (eller annat lokalt namn)â%sâ definierades inte inom procedurâ%sâ specificerades inte med fÃ¶regÃ¥ende .procâ&â-serienummersoperator stÃ¶ds inteâ)â krÃ¤vsâ,â krÃ¤vsâafâ mÃ¥ste anges ensamâfp=32â anvÃ¤nt med ett 64-bitars-APIâfp=32â anvÃ¤nt med en MIPS R6-cpuâfp=64â anvÃ¤nt med ett 32-bitars-ABIâfp=64â anvÃ¤nt med en 32-bitars-fpuâfp=xxâ kan inte anvÃ¤nda smed âsinglefloatââfp=xxâ anvÃ¤nt med en cpu som saknar ldc1/sdc1-instruktionerâgp=32â anvÃ¤nt med ett 64-bitars-ABIâgp=64â anvÃ¤nt med ett 32-bitars-ABIâgp=64â anvÃ¤nt med en 32-bitarsprocessorânooddspregâ kan inte anvÃ¤ndas med ett 64-bitars-ABIânoreorderâ mÃ¥ste stÃ¤llas in innan ânomacroâstornum med understreck fÃ¥r inte har mer Ã¤n 8 hexsiffror i nÃ¥got ordstornum med understreck mÃ¥ste ha exakt fyra ordett destinationsregister mÃ¥ste angesen annan %s har redan angetts, Ã¤r nu %sett register har ingen adressen omlokalisering av denna operand medfÃ¶r Ã¶verspillackumulator inte en giltig destinationtillÃ¤gg anvÃ¤nt med $DSBT_INDEXadressutrÃ¤kning behÃ¶ver en vÃ¤ldefinierad nÃ¤rliggande symboladressavstÃ¥nd mÃ¥ste vara halvordsjusteratadressavstÃ¥nd mÃ¥ste vara ordsjusteratadress fÃ¶rbjuder #adress fÃ¶rbjuder ()adress fÃ¶rbjuder ()+adress fÃ¶rbjuder -()adress fÃ¶rbjuder @adress fÃ¶rbjuder []adress fÃ¶rbjuder specificerare fÃ¶r fÃ¶rskjutningslÃ¤ngdadress fÃ¶rbjuder registeradress fÃ¶r hÃ¶g fÃ¶r jmp/jsr i vektortabelladressenheter mÃ¥ste vara endera av %sadresseringslÃ¤ge stÃ¶ds intealias = %s
okÃ¤nt justeringsvÃ¤rde, anvÃ¤nder storlekjustering Ã¤r inte ett positivt nummerjustering Ã¤r inte en tvÃ¥potensjustering mÃ¥ste vara konstantjustering negativ, 0 antagetjustering negativ; 0 antagetjustering inte en tvÃ¥potensjusteringsutfyllnad (%lu byte) inte en multipel av %ldjusteringsutfyllnad (%lu byte) inte en multipel av %ldjustering fÃ¶r stor, %d antagetjustering fÃ¶r stor: %u antagetjustering fÃ¶r stor; %d antagetjusteringar stÃ¶rre Ã¤n %d byte stÃ¶ds inte i .text-sektioner.redan assemblerade instruktionertvetydig flaggkombination - â.profilerâ-direktiv Ã¶verhoppat.tvetydig storlek fÃ¶r minnesoperand fÃ¶r â%sâtvetydig operandstorlek fÃ¶r â%sâen .indirect_symbol mÃ¥ste finnas i en symbolpekare eller stubbsektion.arkitekturutÃ¶kning â%sâ Ã¤r inte tillÃ¥tet fÃ¶r den aktuella basarkitekturenarkitekturutÃ¶kningar mÃ¥ste anges i alfabetisk ordningokÃ¤nd arkitektur â%sâarkitektur uppdaterad frÃ¥n â%sâ till â%sâ pÃ¥ â%sâarkitekturfunktioner bÃ¥de aktiverade och inaktiveradearkitekturvariant ogiltigassemblera Thumb-kodassemblera enligt rak byteordningassemblera enligt omvÃ¤nd byteordningassembler 0x%08x, fÃ¶rvÃ¤ntade %sassembleringstillstÃ¥nd inte instÃ¤llt fÃ¶r fÃ¶rsta fragment i sektion %santar %s fÃ¶r symbolantar att alla medlemmar i gruppen â%sâ Ã¤r COMDATsom mest tillÃ¥ts %d fÃ¶rskjutningsoperandersom mest tillÃ¥ts %d operanderfÃ¤ster copyright-huvud %s: %sfÃ¤ster versionshuvud %s: %sfÃ¶rsÃ¶k att kÃ¶ra .org/.space/nops bakÃ¥t? (%ld)fÃ¶rsÃ¶ka att gÃ¶ra .space/.bes bakÃ¥t? (%ld)fÃ¶rsÃ¶k att lÃ¤gga till en indirect_symbol till en stubbe eller referenssektion med ett element av nollstorlek vid %sfÃ¶rsÃ¶k att allokera data i en absolut sektionfÃ¶rsÃ¶k att allokera data i en generell sektionfÃ¶rsÃ¶k att fylla absolutsektion med vÃ¤rde som inte Ã¤r nollfÃ¶rsÃ¶k att fylla sektion â%sâ med en vÃ¤rde som inte Ã¤r nollfÃ¶rsÃ¶k att hÃ¤mta vÃ¤rde fÃ¶r ouppÃ¶st symbol â%sâfÃ¶rsÃ¶kte att flytta .org bakÃ¥tfÃ¶rsÃ¶k att omdefiniera symbol â%sâfÃ¶rsÃ¶k att Ã¥terskapa en upprullningspostfÃ¶rsÃ¶k att omdefiniera â%sâ med en annan lÃ¤ngdfÃ¶rsÃ¶k att omdefiniera pseudo-op â%sâ Ã¶verhoppadfÃ¶rsÃ¶k att omdefiniera symbolfÃ¶rsÃ¶kte att omdefiniera typsatt aliasfÃ¶rsÃ¶k att lagra flyttal i absolutsektionfÃ¶rsÃ¶k att lagra flyttal i sektion â%sâfÃ¶rsÃ¶k att lagra icke-tom strÃ¤ng i sektion â%sâfÃ¶rsÃ¶k att lagra vÃ¤rde som inte Ã¤r noll i sektion â%sâfÃ¶rsÃ¶k att lagra vÃ¤rde i absolutsektionfÃ¶rsÃ¶k att anvÃ¤nda en ARM-instruktion pÃ¥ en processor med endast Thumb -- â%sâbakÃ¥treferens till okÃ¤nd etikett â%d:âfelaktigt .common-segment %sfelaktigt .fmask-direktivfelaktig .frame-direktivfelaktigt .longcall-formatfelaktigt .mask-direktivfelaktigt .mask/.fmask-direktivfelaktigt .nan-direktivfelaktigt .relax-formatfelaktigt .reserve-segment -- fÃ¶rvÃ¤ntade BSS-segmentfelaktigt .section-direktiv: vill ha a,e,v,w,x,M,S,G,T i strÃ¤ngfelaktigt .section-direktiv: vill ha a,l,w,x,M,S,G,T i strÃ¤ngfelaktigt .section-direktiv: vill ha a,o,s,w,x,M,S,G,T i strÃ¤ngfelaktigt .section-direktiv: vill ha a,s,w,x,M,S,G,T i strÃ¤ngfelaktigt .section-direktiv: vill ha a,v,w,x,M,S i strÃ¤ngfelaktigt .section-direktiv: vill ha a,w,x,M,S,G,T i strÃ¤ngfelaktigt .uses-formatfelaktigt .weakext-direktivfelaktig COFF-felsÃ¶kningsinformationfelaktig FUNCT-fÃ¤ltangivare âF%câ
felaktig opkodsfÃ¤ltangivare âO%câ
felaktig RVC-fÃ¤ltangivare âC%câ
felaktig justeringfelaktig argument till %s_check-direktiv.felaktig argument till syntax-direktiv.felaktiga argument fÃ¶r instruktionfelaktig basregister: mÃ¥ste vara r0felaktig bitmask angiven efter APSRfelaktigt anrop till MD_ATOF()felaktigt anrop till md_atoffelaktigt kombinerad utdataoperand fÃ¶r pmulsfelaktig komprimerad FUNCT-fÃ¤ltangivare âCF%câ
felaktigt koprocessor-IDfelaktig defsym; formatet Ã¤r --defsym namn=vÃ¤rdefelaktig elementtyp fÃ¶r instruktionfelaktigt kontrollsekvenstecken i strÃ¤ngfelaktigt uttrycktfelaktig uttryckssyntaxfelaktig flyttalsliteral: %sfelaktig flyttalskonstant; exponentÃ¶verspillfelaktig flyttalskonstant; okÃ¤nd felkod=%dfelaktigt format fÃ¶r ifc eller ifncfelaktig format fÃ¶r OPT NEST=djupfelaktig frag vid %p : fixa %ld adr %ld %ld 
felaktig funktionell enhet fÃ¶r operand %u till â%.*sâfelaktigt omedelbart vÃ¤rde fÃ¶r 8-bitarsavstÃ¥nd (%ld)felaktigt omedelbart vÃ¤rde fÃ¶r avstÃ¥nd (%ld)felaktig instruktion â%sâfelaktigt instruktionsformatfelaktig instruktionssyntaxfelaktig listlÃ¤ngdfelaktig listlÃ¤ngd fÃ¶r tabelluppslagningfelaktig listtyp fÃ¶r instruktionfelaktig minnesoperand â%sâfelaktigt antal operander till â%.*sâfelaktig avstÃ¥nd 0x%08lX (mÃ¥ste vara ett 8-bitars antal ord)felaktig avstÃ¥nd 0x%08lX (mÃ¥ste vara ordjusterad)felaktig avstÃ¥nd 0x%08lX (endast 12 bitar tillgÃ¤ngliga fÃ¶r magnituden)felaktig avstÃ¥nd 0x%08lX (endast 8 bitar tillgÃ¤ngliga fÃ¶r magnituden)felaktig opkod eller operanderfelaktig operand %u till â%.*sâfelaktig operandkombination fÃ¶r â%.*sâfelaktigt eller oreducerbart absolututtryckfelaktig eller oreducerbart absolututtryck; noll antasfelaktig eller saknar koprocessornummerfelaktig eller ohanterad omlokaliseringstyp: 0x%02xfelaktigt personlighetsrutinsnummerfelaktigt predikat â%sâfelaktigt intervall i registerlistafelaktigt registeruttryckfelaktig register fÃ¶r mrsfelaktigt register fÃ¶r operand %u till â%.*sâfelaktigt register fÃ¶r efterindexeringfelaktig register i []felaktig registerlistafelaktig registerlista: %sfelaktigt registernamn â%sâfelaktigt registernamn: %sfelaktigt registernummer: %sfelaktigt register eller registerpar fÃ¶r operand %u till â%.*sâfelaktigt registerpar fÃ¶r operand %u till â%.*sâogiltigt registerintervallfelaktig lÃ¤ttnadsdatafelaktigt omlokaliseringsuttryckfelaktigt omlokaliseringsuttryck fÃ¶r â%sâfelaktig fixtyp fÃ¶r omlokalisering (%d)felaktigt segmentfelaktig storlek %d i typespecificerarefelaktig storlek %d i vektorbreddsspecificerarefelaktig startregister: r0 och r15 ogiltigafelaktig strÃ¤ngkonstantfelaktig symbolsuffixfelaktig typ fÃ¶r registerfelaktig typ fÃ¶r skalÃ¤rfelaktig typ i Neon-instruktionfelaktigt vÃ¤rde (%s) fÃ¶r %sfelaktigt vÃ¤rde fÃ¶r funct2-fÃ¤lt, vÃ¤rde mÃ¥ste vara 0â¦3felaktigt vÃ¤rde fÃ¶r funct3-fÃ¤lt, vÃ¤rde mÃ¥ste vara 0â¦7felaktigt vÃ¤rde fÃ¶r funct4-fÃ¤lt, vÃ¤rde mÃ¥ste vara 0â¦15felaktigt vÃ¤rde fÃ¶r funct6-fÃ¤lt, vÃ¤rde mÃ¥ste vara 0â¦64felaktigt vÃ¤rde fÃ¶r funct7-fÃ¤lt, vÃ¤rde mÃ¥ste vara 0â¦127felaktigt vÃ¤rde fÃ¶r opkodsfÃ¤lt, vÃ¤rde mÃ¥ste vara 0â¦127 och de lÃ¤gre tvÃ¥ bitarna mÃ¥ste vara 0x3felaktigt vÃ¤rde fÃ¶r opkodsfÃ¤lt, vÃ¤rde mÃ¥ste vara 0â¦2felaktigt typ av vektorarrangemangfelaktig/saknad psr-specificerarefelaktig utformat .dim-direktivfelaktigt utformat .dim-direktiv Ã¶verhoppatfelaktigt utformat .size-direktivfelaktigt utformat .weak-direktiv Ã¶verhoppatfelaktigt utformat uttryck nÃ¤ra %sbas och avstÃ¥nd mÃ¥ste vara frÃ¥n samma enhetbasregister fÃ¶rvÃ¤ntatbasregister angivet men Ã¤r nollbasregister Ã¥terskrivet och Ã¶verlappar med ett av Ã¶verfÃ¶ringsregistrenbasregister Ã¥terskrivet och Ã¶verlappar med andra Ã¶verfÃ¶ringsregistretbasenhet mÃ¥ste vara antingen A0 eller A1basenhet mÃ¥ste vara endera av %sbfd-mÃ¥l = %s
bfd_set_section_flags: %sstornum ogiltigtstornum ogiltigt; noll antagetstornum trunkerat till %d bytestornum trunkerat till %d bytebitfÃ¤lt strÃ¤cker sig utanfÃ¶r registerslutblx till â%sâ en ARM ISA-tillstÃ¥ndsfunktion Ã¤ndrad till blblx till Thumb-funk â%sâ frÃ¥n Thumb ISA-tillstÃ¥nd Ã¤ndrad till blbÃ¥de instr fÃ¶r !gpdisp!%ld mÃ¥ste vara i samma sektionbr_gr-post fÃ¶re omrÃ¥despost!br_mem-post fÃ¶re omrÃ¥despost!bra eller bsr med odefinierad symbol.gren %s Ã¤r alltid sannintervall Ã¶verspill fÃ¶r grenadress (0x%lx)gren mÃ¥ste vara sista instruktion i IT-blockgrenavstÃ¥nd %d utanfÃ¶r intervallgrenavstÃ¥nd %d utanfÃ¶r intervall %d till %dgrenavstÃ¥nd utanfÃ¶r interval
grenoperand har udda avstÃ¥nd (%lx)
gren utanfÃ¶r intervallgrenlÃ¤ttnad misslyckades
grenlÃ¤ttnad stÃ¶ds inte i â%sâgrenmÃ¥lsfrekvens mÃ¥ste vara stÃ¶rre Ã¤n 0grenmÃ¥l inte ordjusterathopp till en symbol i ett annat ISA-lÃ¤gegren till feljusterad adress (0x%lx)grening eller hoppande till en loop kan utlÃ¶sa hÃ¥rdvarufelbreak utanfÃ¶r strukturerad looputsÃ¤ndning behÃ¶vs fÃ¶r operand av en sÃ¥dan typtrasig assembler, fÃ¶rsÃ¶kte inte assemblerabyterÃ¤knarkonstant %ld utanfÃ¶r intervall [1..%d]bytefÃ¶rskjutning utanfÃ¶r intervallbyte eller halvord inte giltigt fÃ¶r basregistermÃ¥ladress fÃ¶r anrop 0x%08x utanfÃ¶r intervall 0x%08x till 0x%08xanrop till md_convert_frag
anrop till md_convert_frag 
anrop till md_estimate_size_before_relax
anrop till md_estimate_size_before_relax 
anrop till tc_aout_fix_to_chars 
kan inte genomfÃ¶ra %d byte pc-relativ omlokaliseringkan inte genomfÃ¶ra %d byte omlokaliseringkan inte lÃ¶sa upp uttryckkan endast lÃ¤sa tvÃ¥ konsekutiva registerkan endast lagra tvÃ¥ konsekutiva registerkan endast Ã¶verfÃ¶ra tvÃ¥ konsekutiva registerkan inte anvÃ¤nda []index med register, dÃ¥ det inte har nÃ¥gon adresskan inte Ã¤ndra index fÃ¶r operandkan inte stÃ¤nga %s: %skan inte stÃ¤nga â%sâkan inte skapa %s: %skan inte skapa grupp: %skan inte skapa omlokaliseringkan inte skapa sektion %skan inte koda register â%s%sâ i en instruktion som krÃ¤ver REX-prefix.kan inte utÃ¶ka fragkan inte utÃ¶ka frag %lu teckenkan inte utÃ¶ka frag %lu teckenkan inte skriva %ld byte till avsnitt %s av %s eftersom : â%sâkan inte skriva %ld byte till avsnitt %s av %s eftersom : â%sâkan inte hitta uppfixning som pekas till av .useskan inte hitta opkodkan inte hitta opkod kan inte hitta tidigare opkod kan inte hantera uttryckkan inte hantera generering av literal/etiketter Ã¤nkan inte hantera icke-absolut segment i â%sâkan inte hantera odefinierad OP-TYPkan inte hasha %s: %skan inte ha omlokalisering fÃ¶r ipushkan inte skapa global register symbol â%sâkan inte blanda positionella och nyckeordsargumentkan inte bland omlokaliseringsmodifierare med uttrycklig skiftkan inte Ã¶ppna %s fÃ¶r lÃ¤sning: %skan inte Ã¶ppna %s: %skan inte Ã¶ppna â%sâ fÃ¶r skrivningkan inte Ã¶ppna bfd vid stdout %skan inte Ã¶ppna makrobiblioteksfil â%sâ fÃ¶r lÃ¤sning: %skan inte fÃ¶rdekrementerakan inte lÃ¤sa frÃ¥n %s: %skan inte omdefiniera indexet fÃ¶r ett skalÃ¤raliaskan inte omdefiniera typen fÃ¶r ett registeraliaskan inte omdefiniera typ fÃ¶r operandkan inte representera omlokaliseringstyp %skan inte lÃ¶sa upp â%sâ {sektion %s} - â%sâ {sektion %s}kan inte lÃ¶sa upp vÃ¤rde fÃ¶r symbol â%sâkan inte stÃ¤lla in sektionsflaggor fÃ¶r sektion %skan inte bÃ¶rja skriva .mdebug-sektion: %skan inte anvÃ¤nda Neon quad-register hÃ¤rR0 kan inte anvÃ¤ndas hÃ¤rkan inte anvÃ¤nda justering med denna instruktionkan inte anvÃ¤nda hÃ¶g del av register i operand %dkan inte anvÃ¤nda register â%s%s som operand %d i â%sâ.kan inte skriva %ld byte till avsnitt %s av %s eftersom : â%sâkan inte skriva %ld byte till avsnitt %s av %s eftersom : â%sâkan inte assemblera DSP-instruktion, DSP-flagga inte instÃ¤lld: %skan inte assemblera FPU-instruktion, FPU-flagga inte instÃ¤lld: %skan inte assemblera till ett literalfragmentkan inte bÃ¥de fÃ¶rdekrementera och efterinkrementerakan inte grena till udda adresskan inte Ã¤ndra .bundle_align_mode inuti .bundle_lockkan inte Ã¤ndra sektion eller undersektion inuti .bundle_lockkan inte kombinera index med flaggakan inte kombinera fÃ¶r- och efterindexeringkan inte konvertera uttryckssymbol %s till komplex omlokaliseringkan inte skapa 64-bitars omlokaliseringkan inte skapa flyttalsnummerkan inte avkoda instruktionsformatkan inte definiera symbol â%sâ i absolutsektionkan inte avgÃ¶ra Thumb-instruktionsstorlek. AnvÃ¤nd .inst.n/.inst.w istÃ¤lletkan inte gÃ¶ra %s %u byte omlokaliseringkan inte gÃ¶ra %u byte pc-relativ omlokaliseringkan inte gÃ¶ra %u-byte omlokaliseringkan inte mata ut PC-relativ %s-omlokalisering%s%skan inte mata ut omlokalisering %s mot subsy-symbol %skan inte koda feljusterat tillÃ¤gg i det omlokaliserbara fÃ¤ltet (0x%lx)kan inte koda opkod â%sâkan inte koda opkod â%sâ i det givna formatet â%sâkan inte hitta lÃ¤mplig trampolinkan inte generera omlokaliseringstyp fÃ¶r symbol %s, kod %skan inte respektera breddsuffix -- â%sâkan inte gÃ¶ra ett relativt hopp till en absolut positionkan inte maska instruktion utan funktionell enhetkan inte Ã¥sidosÃ¤tta zerofill-sektionstypen fÃ¶r â%s,%sâkan inte packa %s och %s tillsammanskan inte packa %s och %s tillsammans med en 16-bitars instrkan inte packa %s i lucka P1kan inte packa %s med en 16-bitars instrkan inte representera %s-omlokalisering i objektfilkan inte representera %s-omlokalisering i detta objektfilsformatkan inte representera %s-omlokalisering i detta objektfilsformat1kan inte representera â%sâ-omlokalisering i objektfilkan inte representera omlokaliseringstyp %skan inte representera omlokaliseringstyp %s i x32-lÃ¤gekan inte lÃ¶sa upp @slotcounter-parameterkan inte stÃ¤lla in literal_prefix inuti literal-fragmentkan inte anvÃ¤nda â%sâ i denna sektionkan inte anvÃ¤nda indirekt adressering med PCkan inte anvÃ¤nda delregister %s fÃ¶r adresseringkan inte anvÃ¤nda efterindexering med PC-relativ adresseringkan inte anvÃ¤nda efterindexering med denna instruktionkan inte anvÃ¤nda registerindexering med PC-relativ adresseringkan inte anvÃ¤nda registerindex med denna instruktionkan inte anvÃ¤nda Ã¥terskrivning med PC-relativ adresseringkan inte anvÃ¤nda Ã¥terskrivning med denna instruktionkanoniskt = %s

teckenkonstant fÃ¶r stortecken efter namn Ã¤r inte â#âcmpu har inte stÃ¶d fÃ¶r villkorskod %skoprocessoravstÃ¥nd utanfÃ¶r intervallkoprocessorregister fÃ¶rvÃ¤ntadeskod Ã¶verrensstÃ¤mmer med ATPCSkod anvÃ¤nde 26-bitars programrÃ¤knarekod anvÃ¤nder 32-bitars programrÃ¤knarekomma fÃ¶rvÃ¤ntades mellan operanderkomma fÃ¶rvÃ¤ntadeskomma saknas i .xstabsallmÃ¤n justering inte en tvÃ¥potensjÃ¤mfÃ¶relse mÃ¥ste gÃ¶ras med register eller #0villkorskod %s-vÃ¤rde (%d) fÃ¶r stortvillkorskod ogiltig fÃ¶r jrvillkorskodsregister bÃ¶r vara 0 eller 4 fÃ¶r %s, var %dvillkorskodsregister bÃ¶r vara jÃ¤mnt fÃ¶r %s, var %dvillkor fÃ¶ljs inte av villkorbar instrvillkor krÃ¤vsvillkor sa kan inte anvÃ¤ndas hÃ¤rvillkorad grens eller jal-instruktioners operand refererar till R%ld fÃ¶r fÃ¶regÃ¥ende aritmetisk eller logisk instr.villkorlig gren utanfÃ¶r intervallmÃ¥l fÃ¶r villkorlig gren inte ordjusteratvillkorade infix i enhetlig syntax Ã¤r fÃ¶rÃ¥ldratvillkorad instruktion kan inte anvÃ¤nda B-flaggavillkorad instruktion kan inte anvÃ¤nda G-flaggavillkorad instruktion kan inte anvÃ¤nda R-flaggaISA-utÃ¶kningsattribut stÃ¥r i konflikt.fÃ¶rvirrande omlokaliseringsuttryckfÃ¶rvirring bland formella parametrarkonstant fÃ¥r inte plats i 4 bitarkonstantuttryck fÃ¶rvÃ¤ntadeskonstantuttryck eller registerlista fÃ¶rvÃ¤ntadeskonstantuttryck krÃ¤vskonstantuttryck krÃ¤vs.destinationsregister fÃ¶r konstantgenerator hittat i %skÃ¤llregister fÃ¶r konstantgenerator hittat i %skonstantposition krÃ¤vskonstant utanfÃ¶r 8-bitarsintervall: %dkonstant skiftmÃ¤ngd krÃ¤vskonstant fÃ¶r stor fÃ¶r att fÃ¥ plats i instruktionkonstantvÃ¤rde krÃ¤vskontrollregister â%sâ stÃ¶ds inte av denna arkitekturkontrollregister fÃ¶rvÃ¤ntat, men sÃ¥g â%.6sâconvert_frag
lÃ¤ngder fÃ¶r core- och copro instr mÃ¥ste bli 32 bitar.lÃ¤ngder fÃ¶r kÃ¤rn- och kopro-instr. mÃ¥ste bli 64-bitar.kÃ¤rnregister %s-vÃ¤rde (%d) fÃ¶r stortkunde inte assemblera: %skunde inte bygga Ã¶vergÃ¥ng fÃ¶r %s => %skunde inte tolka INSN_PATTERN â%sâkunde inte tolka INSN_REPL â%sâkunde inte tolk malldefinitionkan inte stÃ¤lla in arkitektur och maskinkunde inte hoppa till %ld i fil â%sâkunde inte uppdaterar arkitektur och maskinkunde inte skriva .mdebug-sektion: %skunde inte hitta ett giltigt instruktionsformatkunde inte hitta omlokalisering att anvÃ¤ndaokÃ¤nd cpu â%sâcputyp = %s
cpu4: konverterar inte PUSH #4 till kortare formcpu4: konverterar inte PUSH #8 till kortare formcr%ld Ã¤r ett reserverat kontrollregisterctoff() stÃ¶ds inte av rh850-ABI:t. AnvÃ¤nd -mgcc-abi istÃ¤lletctoff()-omlokalisering anvÃ¤nd pÃ¥ en instruktion som inte har stÃ¶d fÃ¶r detanpassad instruktionsopkod %u utanfÃ¶r intervall %u till %ud0/d1-registerfarlig MULS/MULU-position; ge den hÃ¶gre justeringlÃ¶shÃ¤ngande â__gcc_isr %dâlÃ¶shÃ¤ngande â__gc_isrâdataberoende: %s %s -- %s %s (%d/%d-bubbla)data i exekverbar sektiondataobjekt med justering stÃ¶rre Ã¤n positiondatastorleksprefix ogiltigt med â%sâdataÃ¶verfÃ¶ringsregister fÃ¥r inte vara halvordstandardmask tillÃ¥ts intedestination och kÃ¤lla1 mÃ¥ste vara samma registerdestination mÃ¥ste Ã¶verlappa med ett kÃ¤llregisterdestinationdestination fÃ¶r addition/subtraktion kan endast vara R2 eller R3destination fÃ¶r multiplikation kan endast vara R0 eller R1destinationsoperand mÃ¥ste vara 16-bitarsregisterdestinationsoperand mÃ¥ste vara 16-bitars absolutadressdestinationsoperand mÃ¥ste vara 8-bitars registerdestinationsregister Ã¤r det samma fÃ¶r parallell-instrdestinationsregister modifierat av efterfÃ¶rskjutningsmodifieradadressdestinationsregister mÃ¥ste vara helorddestinationsregister mÃ¥ste vara r1destinationsregister Ã¤r det samma som Ã¥terskrivningsbasdestinationsregister borde vara jÃ¤mnt numreradedestinationsenhet mÃ¥ste vara RDdetekterade global registeranvÃ¤ndning som inte tÃ¤ckas av .register-pseudo-opskillnad mellan tvÃ¥ symboler stÃ¶ds endast med .long, .short eller .bytedirektiv %s kan inte negerasdirektiv .big pÃ¥trÃ¤ffat nÃ¤r flaggan -big krÃ¤vsdirektiv .littel pÃ¥trÃ¤ffat nÃ¤r flaggan -little krÃ¤vsLOC-direktiv frÃ¥n inuti ett BSPEC/ESPEC-par stÃ¶ds inteLOCAL-direktiv mÃ¥ste placeras i kod eller datadirektiv Ã¤r inte giltiga inuti buntarinaktivera varningar om symboler som matchar instruktionerdiskriminator mindre Ã¤n nollfÃ¶rskjutning fÃ¶r stortfÃ¶rskjutning mÃ¥ste vara ett teckenlÃ¶st 8-bitarsnummerfÃ¶rskjutning spiller Ã¶ver 12-bitarsfÃ¤ltfÃ¶rskjutning spiller Ã¶ver 8-bitarsfÃ¤ltfÃ¶rskjutning till definierad symbol %s spiller Ã¶ver 12-bitarsfÃ¤ltfÃ¶rskjutning till definierad symbol %s spiller Ã¶ver 8-bitarsfÃ¤ltfÃ¶rskjutning till odefinierad symbol %s spiller Ã¶ver 12-bitarsfÃ¤ltfÃ¶rskjutning till odefinierad symbol %s spiller Ã¶ver 8-bitarsfÃ¤lt fÃ¶rskjutning fÃ¶r stor (%d)fÃ¶rskjutning fÃ¶r stor fÃ¶r denna arkitektur; behÃ¶ver 68020 eller hÃ¶grediv / mul Ã¤r reserverade instruktionerdivision med nolldivision med nolldivision med noll nÃ¤r â%sâ stÃ¤lldes indla anvÃ¤nt fÃ¶r att ladda 32-bitarsregister; rekommenderat att anvÃ¤nda la istÃ¤lletmata inte ut utfÃ¶rliga felmeddelandenvarna inte vid anvÃ¤ndning av funktion som Ã¤r fÃ¶rÃ¥ldratmatchar inte begin %s%s vid %s:%danvÃ¤nd inte Rn-Rm-syntax utan enhetsstegdsp-omedelbart skiftvÃ¤rde inte konstantdubbelt !tlsgd!%lddubbelt !tlsldm!%lddubblerat â.elseâdubblerat .fnstart-direktivdubblerat .handlerdata-direktivdubblerat .personality-direktivdubblerat .personalityindex-direktivdubblerad instruktion %sdubblerat makro %sduplicerat â%sâdubblerad psr-bitspecificerareelement mÃ¥ste vara mindre Ã¤n omvÃ¤ndningsomrÃ¥deelse utan matchande ifemit_one_bundle: ovÃ¤ntad dynamisk-optomt etikettfÃ¤lt fÃ¶r IStomt symbolnamn i .def; Ã¶verhoppattom vektorregisterlistaemuleringar hanteras inte i denna konfigurationfilslut efter ett enteckenscitationstecken; \0 infogatfilslut i kommentarfilslut i kommentar; nyrad infogatfilslut i kontrollsekvensteckenfilslut i flerradskommentarfilslut i strÃ¤ng; â%câ infogatfilslut inuti villkorfilslut inte i slutet pÃ¥ en rad; nyrad infogatmakroslut inuti villkorslut pÃ¥ vektorregister lista hittades interadslutsfelendf utan forendi utan matchande ifslutregister mÃ¥ste vara r15endw utan whilepoststorlek fÃ¶r SHF_MERGE inte angivenpostinstruktion med stackdekrement < 16fel vid kontroll fÃ¶r Ã¶verspill - trasig assemblerfel vid konstruktion av %s-pseudo-op-tabell: %sfel vid tolkning av element-/strukturlistafel vi instÃ¤llning av flaggor fÃ¶r â%sâ: %sfel vid instÃ¤llning av flaggor fÃ¶r â.sbssâ: %sfel: #foo()-direktiv anvÃ¤nt pÃ¥ symbol stÃ¶ds inteuppskattad storlek
estimate_size_before_relax anropadÃ¤ven registernummer krÃ¤vsjÃ¤mnt register krÃ¤vsfÃ¶r mÃ¥nga operander: â%sâfÃ¶rvÃ¤ntade #konstantfÃ¶rvÃ¤ntade #n som fÃ¶rsta argument till %sfÃ¶rvÃ¤ntade %cfÃ¶rvÃ¤ntade â,â efter sektionsnamnfÃ¶rvÃ¤ntade â,â efter symbolnamnfÃ¶rvÃ¤ntade â,â efter symbolstorlekfÃ¶rvÃ¤ntade â]â, inte %c i %sfÃ¶rvÃ¤ntade , <konstant>fÃ¶rvÃ¤ntade .L, .W eller .B fÃ¶r register i indexerat adresseringslÃ¤gefÃ¶rvÃ¤ntade 0 operander fÃ¶r genererad etikettfÃ¶rvÃ¤ntade 0 eller 1fÃ¶rvÃ¤ntade <Rm>- eller <Dm>- eller <Qm>-operandfÃ¶rvÃ¤ntade <nn>fÃ¶rvÃ¤ntade <avstÃ¥nd>, <opkod>fÃ¶rvÃ¤ntade <reg>, <reg>fÃ¶rvÃ¤ntade <tagg>, <vÃ¤rde>fÃ¶rvÃ¤ntade @(exp, reg16)fÃ¶rvÃ¤ntade EP-registerfÃ¶rvÃ¤ntade att â%sâ redan ha stÃ¤llts in fÃ¶r .vtable_inheritfÃ¶rvÃ¤ntade ett %s-namn fÃ¶ljt av ett â,âfÃ¶rvÃ¤ntade adressuttryckfÃ¶rvÃ¤ntad justering efter storlekfÃ¶rvÃ¤ntade avslutande parentesfÃ¶rvÃ¤ntade kommafÃ¶rvÃ¤ntade komma efter â%sâfÃ¶rvÃ¤ntade komma efter instruktionsnamnfÃ¶rvÃ¤ntade komma efter huvudopkodfÃ¶rvÃ¤ntade komma efter namnfÃ¶rvÃ¤ntade komma efter namn â%sâfÃ¶rvÃ¤ntade komma efter namn â%sâ i .localentry-direktivfÃ¶rvÃ¤ntade komma efter namn â%sâ i .size-direktivfÃ¶rvÃ¤ntade komma efter namn i .symverfÃ¶rvÃ¤ntade komma efter namn i .vtable_entryfÃ¶rvÃ¤ntade komma efter namn i .vtable_inheritfÃ¶rvÃ¤ntade komma efter registerlÃ¤gefÃ¶rvÃ¤ntade komma efter registernummerfÃ¶rvÃ¤ntade komma efter symbolnamnfÃ¶rvÃ¤ntade komma efter symbolnamn: resten av raden Ã¶verhoppad.fÃ¶rvÃ¤ntade komma eller kolon efter symbolnamn; resten av redan Ã¶verhoppadfÃ¶rvÃ¤ntade kommaseparatorfÃ¶rvÃ¤ntade konstantuttryck som fÃ¶rsta argument till %sfÃ¶rvÃ¤ntade konstantuttryck, fick %sfÃ¶rvÃ¤ntade konstant i intervallet 2..16fÃ¶rvÃ¤ntade konstant eller registernamn som argument till RPT-instfÃ¶rvÃ¤ntade konstantvÃ¤rde som argument till RPTfÃ¶rvÃ¤ntade uttryckfÃ¶rvÃ¤ntade uttryck, fick %sfÃ¶rvÃ¤ntat fyllnadsmÃ¶nster saknasfÃ¶rvÃ¤ntade fÃ¶rsta argumentet till %s skulle vara i intervallet 1-4fÃ¶rvÃ¤ntade indexfÃ¶rvÃ¤ntade numerisk konstantfÃ¶rvÃ¤ntade en operand fÃ¶r genererad literalfÃ¶rvÃ¤ntade citeradstrÃ¤ngfÃ¶rvÃ¤ntade registerfÃ¶rvÃ¤ntade register som andra argument till %sfÃ¶rvÃ¤ntade registerlistafÃ¶rvÃ¤ntade registernamn eller konstant som fÃ¶rsta argument till %sfÃ¶rvÃ¤ntade enkelt nummerfÃ¶rvÃ¤ntade symbolfÃ¶rvÃ¤ntade symbolnamnfÃ¶rvÃ¤ntade giltigt adresseringslÃ¤ge fÃ¶r mova: â@(disp, ea.xz),ERnâfÃ¶rvÃ¤ntade vÃ¤rdet av fÃ¶rsta argumentet till %s skulle fÃ¥ plats i 20 bitarfÃ¶rvÃ¤ntade }fÃ¶rvÃ¤ntade %c nÃ¤ra %sfÃ¶rvÃ¤ntade )fÃ¶rvÃ¤ntar ]fÃ¶rvÃ¤ntade â)â efter skalfaktor i â%sâfÃ¶rvÃ¤ntade â,â eller â)â efter basregister i â%sâfÃ¶rvÃ¤ntade â,â eller â)â efter index register i â%sâfÃ¶rvÃ¤ntade kommaavgrÃ¤nsade operanderfÃ¶rvÃ¤ntade kommaavgrÃ¤nsade registeroperanderfÃ¶rvÃ¤ntade kontrollregisterfÃ¶rvÃ¤ntade antingen ON eller OFF efter .listfÃ¶rvÃ¤ntade indexregister eller skalfaktor efter â,â; fick â%câfÃ¶rvÃ¤ntad indirekt hoppinstruktion efter ânotrackâfÃ¶rvÃ¤ntade indirekt register â(%rA)âfÃ¶rvÃ¤ntade indirekt register â($rX)âfÃ¶rvÃ¤ntar lÃ¥sbar instruktion efter âlockâfÃ¶rvÃ¤ntade mnemonic, fick ingentingfÃ¶rvÃ¤ntar opkodsstrÃ¤ngi sjÃ¤lvtextlÃ¤gefÃ¶rvÃ¤ntade operand efter â,â; fick ingentingfÃ¶rvÃ¤ntade operand fÃ¶re â,â; fick ingentingfÃ¶rvÃ¤ntade prefix; fick ingentingfÃ¶rvÃ¤ntade registerfÃ¶rvÃ¤ntar skalfaktor pÃ¥ 1, 2, 4 eller 8: fick â%sâfÃ¶rvÃ¤ntad giltig hoppinstruktion efter âbndâfÃ¶rvÃ¤ntade {uttryck fÃ¥r inte plats i BYTEuttryck fÃ¥r inte plats i ORDuttrycksfeluttryck mÃ¥ste vara konstantuttryck utanfÃ¶r intervall: standardvÃ¤rdet Ã¤r 0uttryck utanfÃ¶r intervall: standardvÃ¤rdet Ã¤r 1uttryck fÃ¶r komplextutÃ¶kad instruktion i hoppluckautÃ¶kad instruktion i hoppluckautÃ¶kad operand begÃ¤rd men krÃ¤vs inteutÃ¶kad skift tillÃ¥ts inteokÃ¤nd utÃ¶kning â%sâutÃ¶kning gÃ¤ller inte fÃ¶r basarkitekturenextra .LABEL-argument Ã¶verhoppade.extra tecken â%sâ vid slutet pÃ¥ konstantuttryck â%sâextra tecken â%sâ vid slut av omedelbart uttryck â%sâextra tecken â%sâ vid slutet av operand â%sâextra tecken â%sâ vid slutet av absolut operand â%sâextra avslutande klammerextra kolonextra kommaextra punktextra inledande klammerextra saker pÃ¥ raden Ã¶ver hoppadeextra tecken pÃ¥ slutet av numerisk sektionstypextra skift som del av operand till skift-instrmisslyckades fÃ¶r %d
misslyckades med rimlighetskontroll fÃ¶r generellt register.misslyckades med rimlighetskontroll fÃ¶r regnum.misslyckades med rimlighetskontrollmisslyckades med rimlighetskontroll.misslyckades med rimlighetskontroll: long_jumpmisslyckades med rimlighetskontroll: short_jumpmisslyckades med rimlighetskontroll fÃ¶r specialfalls instrmisslyckades med att assemblera instruktion: â%sâmisslyckades med att tolka flaggormisslyckades med att lÃ¤sa instruktionstabellen %s
misslyckades med att stÃ¤lla in flaggor fÃ¶r "%sâ: %smisslyckades med att stÃ¤lla in undersektioner efter symbolermisslyckades med att stÃ¤lla in felsÃ¶kningsinformation: %sfalsk .file efter riktiggenomfallfrekvens mÃ¥ste vara stÃ¶rre Ã¤n 0fÃ¤lt fx_size fÃ¶r litet fÃ¶r att hÃ¥lla %dfÃ¤ltstorlek mÃ¥ste vara 16 nÃ¤r vÃ¤rde Ã¤r omlokaliseringsbartfÃ¤ltvÃ¤rde â%sâ fÃ¶r komplex fÃ¶r ett bitfÃ¤ltfÃ¤ltvÃ¤rde trunkeratfÃ¤ltbredd â%sâ fÃ¶r komplex fÃ¶r ett bitfÃ¤ltfÃ¤ltbredd %lu fÃ¶r stor fÃ¶r att fÃ¥ plats i %d byte: trunkerad till %d bitarfÃ¤ltbredd %lu fÃ¶r stor fÃ¶r att fÃ¥ plats i %d byte: trunkerad till %d bitarfemtefil avslutad med ett Ã¶ppet IT-block.fil hittades inte: %sfilnummer %ld redan allokeratfilnummer mindre Ã¤n ettfilnamn spÃ¤nner Ã¶ver en sidgrÃ¤nsfyllnadsmÃ¶nster fÃ¶r lÃ¥ngt, trunkerar till %ufÃ¶rstafÃ¶rsta och andra operander bÃ¶r vara samma registerfÃ¶rsta operanden Ã¤r flyttalfÃ¶rsta operanden Ã¤r fÃ¶r stor fÃ¶r ett 16-bitars heltal med teckenfÃ¶rsta operanden Ã¤r fÃ¶r stor fÃ¶r en 24-bitarsfÃ¶rskjutningfÃ¶rsta register mÃ¥ste vara r4fÃ¶rsta Ã¶verfÃ¶ringsregistret mÃ¥ste vara jÃ¤mntalla fixar inte flyttade frÃ¥n %sflagga fÃ¶r {c}psr-instruktion fÃ¶rvÃ¤ntadflyttalsregister bÃ¶r vara jÃ¤mnt, var %dflyttalsargument finns i fp-registerflyttalskonstant fÃ¶r storflyttal ogiltigtflyttalsnummer ogiltigt; noll antagetflyttal Ã¤r inte implementeradeflyttalsuttryck krÃ¤vsformat = %s
formatnamn endast giltiga inuti buntarhittade %d operand fÃ¶r â%sâ: FÃ¶rvÃ¤ntade %dhittade %d operander fÃ¶r â%sâ: FÃ¶rvÃ¤ntade %dhittade â%câ, fÃ¶rvÃ¤ntade: â%câfjÃ¤rdefr_mem-post fÃ¶re omrÃ¥despost!fr_var %lu < lÃ¤ngd %dfr_var (%ld) < lÃ¤ngd (%d)vÃ¤rde fÃ¶r decimalbitar utanfÃ¶r intervallramregister fÃ¶rvÃ¤ntades, anvÃ¤nder $%d.ramstorlek angiven tvÃ¥ gÃ¥ngerfrgr_mem-post fÃ¶re omrÃ¥despost!funktionell enhet redan maskadfunktionell enhet redan maskad fÃ¶r operand %u till â%.*sâfunktionell enhet redan anvÃ¤nd i detta exekveringspaketskrÃ¤p efter index-spec. Ã¶verhoppatskrÃ¤p vid radslutskrÃ¤p fÃ¶ljer instruktiongenerera PIC-kodget_expanded_loop_offset: ogiltig opkodgr_gr-post fÃ¶re omrÃ¥despost!gr_mem-post fÃ¶re omrÃ¥despost!gruppnamn fÃ¶r SHF_GROUP inte angivetgruppsektion â%sâ har ingen gruppsignaturhandlerdata i cantunwind-ramhard-float stÃ¥r i konflikt med angiven fpuhÃ¥rdvarudivisionhÃ¥rdvaruutÃ¶kning fÃ¶r loopatt ha basregistret i registerlistan nÃ¤r Ã¥terskrivning anvÃ¤nds Ã¤r OPÃLITLIGThÃ¤r Ã¤r âelseâ-grenen fÃ¶r det oavslutade villkorethÃ¤r Ã¤r fÃ¶regÃ¥ende â.elseâhÃ¤r Ã¤r fÃ¶regÃ¥ende â.ifâhÃ¤r Ã¤r bÃ¶rjan pÃ¥ det oavslutade villkorethi()-omlokalisering anvÃ¤nd pÃ¥ en instruktion som inte har stÃ¶d fÃ¶r dethi0()-omlokalisering anvÃ¤nd pÃ¥ en instruktion som inte har stÃ¶d fÃ¶r dethÃ¶ga bitar satta i uttryck fÃ¶r registerlistatips i B-enhet kan inte anvÃ¤ndastips i B-enhet kan komma att hanteras som nophint.b kan komma att hanteras som nophint.b bÃ¶r inte anvÃ¤ndasiWMMXt-kontrollregister fÃ¶rvÃ¤ntadesiWMMXt-data eller kontrollregister fÃ¶rvÃ¤ntatiWMMXt-dataregister fÃ¶rvÃ¤ntadesiWMMXt-skalÃ¤rregister fÃ¶rvÃ¤ntadesia64.md_begin: kan inte hasha â%sâ: %sidentifierare+konstant@%s innebÃ¤r identifierare@%s+konstantidentifierar+konstant@got innebÃ¤r identifierare@got+konstantom Ã¥terskrivningsregister finns i lista, mÃ¥ste det vara det lÃ¤gsta registret i listanhoppar Ã¶ver fÃ¶rsÃ¶k att omdefiniera symbol â%sâ.hoppar Ã¶ver fÃ¶rsÃ¶k att omdefiniera inbyggt register â%sâhoppar Ã¶ver fÃ¶rsÃ¶kt att omdefiniera symbol %shoppar Ã¶ver fÃ¶rsÃ¶k att odefiniera inbyggt register â%sâhoppar Ã¶ver fÃ¶rsÃ¶k att anvÃ¤nda .unreq fÃ¶r fixerat registernamn: â%sâhoppar Ã¶ver felaktig justeringhoppar Ã¶ver Ã¤ndrade sektionsattribut fÃ¶r %shoppar Ã¶ver Ã¤ndrad storlek fÃ¶r sektionspost fÃ¶r %shoppar Ã¶ver Ã¤ndrad sektionstyp fÃ¶r %shoppar Ã¶ver extra â-rename-sectionâ-avgrÃ¤nsare â:âhoppar Ã¶ver fyllnadsvÃ¤rde i absolut sektionhoppar Ã¶ver fyllnadsvÃ¤rde i sektion â%sâhoppar Ã¶ver felaktig sektionstyp fÃ¶r %shoppar Ã¶ver ogiltig â-rename-sectionâ-specifikation: â%sâhoppar Ã¶ver makroavslut utanfÃ¶r en makrodefinition.hoppar Ã¶ver operande: %s hoppar Ã¶ver omdefiniera av register alias â%sâiff konvertera intern pcrel/binÃ¤riff konvertera intern pcrel/pekareotillÃ¥ten %s-omlokaliseringsstorlek: %dotillÃ¥tet .stab%c-direktiv, felaktigt teckenotillÃ¥tet .stabx-uttryck; noll antagetotillÃ¥ten dubbelindirektionotillÃ¥tet uttryckotillÃ¥ten omedelbar registeroperand %sotillÃ¥ten indirekt referensotillÃ¥ten opkod %s fÃ¶r mcu %sotillÃ¥ten operandotillÃ¥ten operand - registernamn hittat dÃ¤r inget fÃ¶rvÃ¤ntadesotillÃ¥tna operanderotillÃ¥tet intervall Ã¶ver versioner av mÃ¥lhÃ¥rdvaraotillÃ¥tet register efter @otillÃ¥tet register efter @-otillÃ¥tet register inkluderat i listaotillÃ¥tet registernummerotillÃ¥ten resursanvÃ¤ndning i buntotillÃ¥ten anvÃ¤ndning av kontrollregisterotillÃ¥ten anvÃ¤ndning av koprocessorregisterimm3imm5 borde vara >= 2omedelbart 0 kan inte anvÃ¤ndas hÃ¤romedelbar 1 eller 2 fÃ¶rvÃ¤ntadomedelbar kan inte flyttas med en enstaka instruktionomedelbar konstant Ã¤r giltig bÃ¥de som ett bitmÃ¶nster och ett flyttalsvÃ¤rde (via fp-vÃ¤rdet)omedelbart uttryck krÃ¤ver ett #-prefixomedelbar har bitar satta utanfÃ¶r operandstorlekenomedelbar Ã¤r inte en tvÃ¥potensomedelbar mÃ¥ste vara 1 eller 2omedelbart avstÃ¥nd inte 2-bytesjusteratomedelbart avstÃ¥nd inte 4-bytesjusteratomedelbart avstÃ¥nd utanfÃ¶r intervallomedelbar operand otillÃ¥ten med absolut hoppomedelbar operand matchar inteomedelbar operand fÃ¶r storomedelbar operand krÃ¤vsomedelbar operand krÃ¤ver iWMMXt2summa av omedelbara operander blir stÃ¶rre Ã¤n 32omedelbar utanfÃ¶r intervallomedelbar utanfÃ¶r intervall fÃ¶r infogningomedelbar utanfÃ¶r intervall fÃ¶r avsmalningsoperationomedelbar utanfÃ¶r intervall fÃ¶r skiftomedelbart vÃ¤rdeomedelbart vÃ¤rde %d utanfÃ¶r intervall %d till %domedelbart vÃ¤rde %llu utanfÃ¶r intervall %u till %luomedelbart vÃ¤rde %u utanfÃ¶r intervall %u till %uomedelbart vÃ¤rde 0x%x trunkerat till 0x%xomedelbart vÃ¤rde Ã¤r utanfÃ¶r intervallomedelbart vÃ¤rde mÃ¥ste vara en multipel av %d vid operand %d -- â%sâomedelbart vÃ¤rde inte tillÃ¥tet nÃ¤r kÃ¤lla & destination skiljer sig Ã¥tomedelbart vÃ¤rde utanfÃ¶r intervallomedelbart vÃ¤rde utanfÃ¶r intervall omedelbart vÃ¤rde utanfÃ¶r intervall, fÃ¶rvÃ¤ntat intervall [0, 16]omedelbart vÃ¤rde utanfÃ¶r intervall, fÃ¶rvÃ¤ntat intervall [1, 32]omedelbar nolla fÃ¶rvÃ¤ntadesolÃ¤mpliga argument fÃ¶r opkod â%sâolÃ¤mpliga argument fÃ¶r opkod â%sâinkompatibel flagga %i i raddirektivinkonsekventa typer i Neon-instruktioninkonsekventa anvÃ¤ndningar av .cfi_sectionsfelaktigt villkor i IT-blockfelaktig format fÃ¶r parallell multiplikationsinstruktionfelaktigt antal operander angivna i den fÃ¶rsta instruktionenfelaktigt antal operander angivna i den andra instruktionenfelaktig register â%s%sâ anvÃ¤nt med â%câ-suffixfelaktigt register i registerlistafelaktigt registernummer, hoppar Ã¶verindex- och destinationsregister bÃ¶r vara distinktaindex tillÃ¥ts inte inuti registerlistaindexavstÃ¥nd utanfÃ¶r intervallindexregister Ã¶verlappar med Ã¶verfÃ¶ringsregisterindexregister angivet men Ã¤r nollindexvÃ¤rde fÃ¶r stort fÃ¶r %sindexerat vektorregister fÃ¶rvÃ¤ntatindirekt %s utan â*âmisslyckades med att infoga â%sâ i %s aliashashtabell: %smisslyckades med att infoga â%sâ i %s namnhashtabell: %sinfogar â%sâ i strÃ¤nghashtabell: %smisslyckades med att infoga â%sâ i symboltabell: %sinfogar â%sâ i tagghashtabell: %sinstr kan inte kombineras med parallellhanterings-instrinstr kan inte kombineras med icke-nopxinstr kan inte kombinerad med icke-nopyinstr kan inte kombineras med pmulsinstruktion %s fÃ¥r inte fÃ¶lja pÃ¥ en annan I/O-instruktion.instruktion %s fÃ¶r inte fÃ¶lja pÃ¥ en annan instruktion med minnesÃ¥tkomst.instruktion %s krÃ¤ver %d operandinstruktion %s krÃ¤ver %d operanderinstruktion %s krÃ¤ver MSP430X-mcuinstruktion %s krÃ¤ver aktivering av AUDIO-utÃ¶kninginstruktion %s krÃ¤ver aktivering av DIV- & DX_REGS-utÃ¶kninginstruktion %s krÃ¤ver aktivering av DX_REGS-utÃ¶kninginstruktion %s krÃ¤ver aktivering av FPU-utÃ¶kninginstruktion %s krÃ¤ver aktivering av FPU_DP-utÃ¶kninginstruktion %s krÃ¤ver aktivering av FPU_MAC-utÃ¶kninginstruktion %s krÃ¤ver aktivering av FPU_SP-utÃ¶kninginstruktion %s krÃ¤ver aktivering av STRING-utÃ¶kninginstruktion %s krÃ¤ver aktivering av DSP-utÃ¶kninginstruktion %s krÃ¤ver aktivering av prestandautÃ¶kninginstruktion %s krÃ¤ver aktivering av prestandautÃ¶kning IIinstruktion %s krÃ¤ver aktivering av zol-utÃ¶kninginstruktion %s.a existerar inteinstruktion %s: resultat Ã¤r alltid falsktinstruktion %s: resultat Ã¤r alltid santinstruktion â%.*sâ kan inte anvÃ¤nda predikatinstruktion â%sâ kan inte exekveras parallellt.instruktion â%sâ finns endast fÃ¶r M32R2instruktion â%sâ finns endast fÃ¶r M32RXinstruktion â%sâ efter âxacquireâ inte tillÃ¥teninstruktion â%sâ stÃ¶ds inte i 16-bitarslÃ¤ge.instruktionsadress Ã¤r inte en multipel av %dinstruktionsadress inte en multipel av 16instruktionsadress Ã¤r inte en multipel av 2instruktionsadress Ã¤r inte en multipel av 8instruktion kan inte vara villkoradinstruktion kan inte behandla par av vÃ¤rdeninstruktionen accepterar inte fÃ¶rindexerad adresseringinstruktion accepterar inte skalat registerindexinstruktion accepterar inte detta adresseringslÃ¤geinstruktionen accepterar inte oindexerad adresseringinstruktion tillÃ¥ter inte skiftat indexinstruktion har inte stÃ¶d fÃ¶r oindexerad adresseringinstruktionen har inte stÃ¶d fÃ¶r Ã¥terskrivninginstruktion accepterar inte en blocktypinstruktionsform inte tillgÃ¤nglig fÃ¶r denna arkitektur.instruktion anvÃ¤nder implicit R31 frÃ¥n fÃ¶regÃ¥ende laddning.instruktion Ã¤r alltid ovillkoradinstruktionsmnemonic fÃ¶r lÃ¥ng: %sinstruktion inte tillÃ¥ten i IT-blockinstruktion stÃ¶ds inte i Thumb16-lÃ¤geinstruktion krÃ¤ver etikettinstruktion krÃ¤ver etikett eller vÃ¤rde i intervall -511:512instruktion krÃ¤ver etikett utan â%sâinstruktion krÃ¤ver registerindexinstruktionssekvens (skriv a0, gren, retw) kan utlÃ¶sta hÃ¥rdvarufelinstruktioner skriver till samma destinationsregister.32-bitars heltalsregister fÃ¶rvÃ¤ntat64-bitars heltalsregister fÃ¶rvÃ¤ntatheltalsoperand utanfÃ¶r intervallheltals- eller SP-register fÃ¶rvÃ¤ntatheltals- eller nollregister fÃ¶rvÃ¤ntatheltalsregister fÃ¶rvÃ¤ntatheltalsregister fÃ¶rvÃ¤ntades i det utÃ¶kade-/skiftoperandsregisteretheltals-, noll- eller SP-register fÃ¶rvÃ¤ntatintern fÃ¶rvirring: omlokalisering i en sektion utan innehÃ¥llinternet fel vid argumenttolkninginternt fel: [%s] ovÃ¤ntad kod [%lx] i frob-symbolinternt fel: felaktigt CFA-vÃ¤rde #%dinternt fel: felaktigt argumenttyp %cinternt fel: felaktigt filegenskaps-ID %dinternt fel: felaktig microMIPS-opkod (felaktig lÃ¤ngd: %u): %s %sinternt fel: felaktig microMIPS-opkod (opkod/lÃ¤ngd stÃ¤mmer inte): %s %sinternt fel: felaktigt omlokalisering #%dinternt fel: bas-sektionsindex utanfÃ¶r intervallinternt fel: trasig opkodsdeskriptor fÃ¶r â%s %sâ
internt fel: kan inte exportera omlokaliseringstyp %d (â%sâ)internt fel: kan inte hasha â%sâ: %sinternt fel: kan inte hasha â%sâ: %s
internt fel: kan inte hasha auxregister â%sâ: %sinternt fel: kan inte hasha makro â%sâ: %sinternt fel: kan inte hasha opkod â%sâ: %sinternt fel: kan inte hasha opkod â%sâ: %sinternt fel: kan inte installera fix fÃ¶r omlokaliseringstyp %d (â%sâ)internt fel: misslyckades med att allokera %d indirekta symbolpekareinternt fel: uppfixning inte begrÃ¤nsad inom fraginternt fel: ogiltigt makrointernt fel: uppslag/hÃ¤mtning av operander misslyckadesinternt fel: tappar bort opkod: â%sâ â%sâ
internt fel: fler indirekta mach-o-symboler Ã¤n fÃ¶rvÃ¤ntatinternt fel: omlokalisering %d (â%sâ) stÃ¶ds inte av objektfilsformatetinternt fel; okÃ¤nt dwarf2-formatinternt fel: okÃ¤nt instruktionsattribut: 0x%08xinternt fel: okÃ¤nt nop-kontrollstillstÃ¥ndinternt fel: okÃ¤nt flaggnamn â%sâinternt fel; kan inte generera â%sâ-omlokaliseringinternt fel"? kan inte generera â%sâ-omlokaliseringinternt fel? kan inte generera â%sâ-omlokalisering (%d, %d)internt fel i parse_register_listintern inkonsekvens i %s: kdap.w utan symbolintern inkonsekvens i %s: bdapq ingen symbolinternt inkonsekvensproblem i %s: %lxinternt inkonsekvensproblem i %s: ext. instr %04lxinternt inkonsekvensproblem i %s: fr_subtype %dinternt inkonsekvensproblem i %s: fr_symbol %lxinternt inkonsekvensproblem i %s: instr %04lxinternt inkonsekvensproblem i %s: upplÃ¶st symbolinternt inkonsekvensproblem: %s anropat fÃ¶r %d byteintern omlokalisering (typ: OMEDELBAR) inte uppfixadinternt: BFD_RELOC_MMIX_BASE_PLUS_OFFSET inte upplÃ¶st till sektioninternt: GREG-uttryck inte upplÃ¶st till sektioninternt: felaktig RISC-V-opkod (bitar 0x%lx odefinierade): %s %sinternt: felaktig RISC-V-opkod (maskfel):%s %sinternt: felaktig RISC-V-opkod (okÃ¤nd operandtyp â%câ): %s %sinternt: felaktig RISC-V-opkod (okÃ¤nd operandtyp âC%câ): %s %sinternt: felaktig RISC-V-opkod (okÃ¤nd operandtyp âCF%câ): %s %sinternt: felaktig RISC-V-opkod (okÃ¤nd operandtyp âF%câ): %s %sinternt: felaktig mips-opkod (bitar 0x%08lx definierade): %s %sinternt: felaktig mips-opkod (bitar 0x%08lx definierade dubbelt): %s %sinternt: felaktig mips-opkod (bitar 0x%08lx odefinierade): %s %sinternt: felaktig mips-opkod (maskfel):%s %sinternt: kan inte hasha â%sâ: %sinternt: mmix_prefix_name men tomt prefixinternt: ovÃ¤ntad lÃ¤ttnadstyp %d:%dinternt: ohanterad etikett %sinternt: okÃ¤nd operandtyp: %s %sinternal_relocation (typ: OFFSET_IMM) inte fixadavbrottsvektor fÃ¶r fÃ¤llinstruktion utanfÃ¶r intervallogiltig %s-flagga fÃ¶r %s-cpuogiltig -march=-flagga: â%sâogiltig -mavxscalar=-flagga: â%sâogiltig -mevexlig=-flagga: â%sâogiltig -mevexrcig=-flagga: â%sâogiltig -mevexwig=-flagga: â%sâogiltig -mfence-as-lock-add=-flagga: â%sâogiltig -mmnemonic=-flagga: â%sâogiltig -momit-lock-prefix=-flagga: â%sâogiltig -moperand-check=-flagga: â%sâogiltig -mrelax-relocations=-flagga: â%sâogiltig -msse-check=-flagga: â%sâogiltig -msyntax=-flagga: â%sâogiltig -mtune=-flagga: â%sâogiltig -mvexwig=-flagga: â%sâogiltig -mx86-used-note=-flagga: â%sâogiltig <ark> i --march=<ark>: %sogiltigt @slotcount-vÃ¤rdeogiltigt BSPEC-uttryckogiltigt omedelbart FPA-uttryckogiltigt Hi-register med omedelbarogiltigt LOC-uttryckogiltig NaN-instÃ¤llning -mnan=%sogiltig PC-relativ operandogiltigt PLT-uttryck â%sâogiltig VSIB-adressogiltigt WakeOnStatus %ldogiltig XFR WideBus-adress %ldogiltigt abi -mabi=%sogiltigt ackumulatorregisterogiltig adressogiltigt adresseringslÃ¤geogiltig arkitekturutÃ¶kningogiltig arkitektur -A%sogiltig arkitektur -xarch=%sogiltig arkitektur -z%sogiltig arkitekturflagga -m%s; Ã¶verhoppadogiltig argument â%sâ till -fdebug-prefix-mapogiltigt fÃ¶rsÃ¶k att deklarera externt versionsnamn som standard i symbol â%sâogiltigt auto-litpool-limit-argumentogiltigt auto-litpool-limit-argument (intervall Ã¤r 100-10000)ogiltig barriÃ¤rtypogiltig basregister fÃ¶r registeravstÃ¥ndogiltig grenoperandogiltigt avstÃ¥nd fÃ¶r bytegrenogiltigt cachoperationsnamnogiltigt tecken %s inleder operand %d â%sâogiltigt tecken %s fÃ¶re operand %dogiltigt tecken %s i mnemonicogiltigt tecken %s i operand %dogiltigt tecken i indataogiltig coprocessor-operandogiltigt villkorogiltig villkorskod â%sâogiltigt villkodskodsnamnogiltig konfigurationsflagga â%sâ i Ã¶vergÃ¥ngsregel â%sâogiltig konstantogiltig konstant (%lx) efter uppfixningogiltigt konstanttabellsavstÃ¥nd %ldogiltig konstant: %d-bitarsuttryck inte i intervall %d..%dogiltig konstant: %d-bitarsuttryck inte i intervall %u..%uogiltig konstant: %d Ã¤r inte ett ordjusterat heltalogiltig konstant: 10-bitarsuttryck utanfÃ¶r intervall [-2^9, 2^9-1ogiltig konstant: 20-bitarsuttryck utanfÃ¶r intervall -2^19..2^19-1ogiltig konstant: 25-bitarsuttryck utanfÃ¶r intervall [-16777216, 16777215]ogiltig konstant: 32-bitarsuttryck inte i intervall [-0x80000000, 0x7fffffff]ogiltig konstant: 32-bitarsuttryck inte i intervall [0, 0xffffffff]ogiltig konstant: 32-bitarsuttryck inte ordjusteratogiltig konstant: bituttryck inte definieratogiltigt namn fÃ¶r kontrollregisterogiltigt standardfÃ¶rskjutningsstorlek â%sâ. StandardvÃ¤rde blir %d.ogiltig minnesoperand fÃ¶r destinationogiltigt destinationsregisterogiltig registerlista fÃ¶r destinationogiltig destinationsenhetogiltigt elementvÃ¤ljareogiltig elementstorlek %d och vektorstorlekskombination %cogiltig tom loopogiltigt berÃ¤kningstyp fÃ¶r uttryck %dogiltigt uttryck fÃ¶r operand %i fÃ¶r â%sâogiltigt uttryck i load/store multipleogiltigt uttryck i adressenogiltig flagga â%sâogiltig flyttalsregisterpar.  Giltiga operander fÃ¶r fp-registerpar Ã¤r 0, 1, 4, 5, 8, 9, 12 eller 13.ogiltig flyttalskonstantogiltigt fjÃ¤rde registerogiltig ramstorlekogiltigt hvc-uttryckogiltig identifierare fÃ¶r â.ifdefâogiltig omedelbarogiltig omelbar fÃ¤ltpositionogiltig omedelbar fÃ¶r adressberÃ¤kning (vÃ¤rde = 0x%08lX)ogiltig omedelbar fÃ¶r berÃ¤kning av stackadressogiltig omedelbarstorlekogiltigt omedelbart vÃ¤rdeogiltig omedelbar: %ld Ã¤r utanfÃ¶r intervallogiltig indexstorlek fÃ¶r coldfireogiltig indirekt registerstorlekogiltig instruktion â%sâ efter â%sâogiltig instruktion fÃ¶r denna arkitektur; behÃ¶ver ogiltig instruktionsformogiltig instruktionsstorlek vald (%d)ogiltigt instruktionssuffixogiltig sista instruktion fÃ¶r en loop utan extra omkostnaderogiltigt lÃ¤ngdfÃ¤lt angivetogiltig lÃ¤ngd fÃ¶r .scomm-direktivogiltig listningsflagga â%câogiltig literalkonstant: pool mÃ¥ste vara nÃ¤rmreogiltig lrlive â%luâogiltig maskin â%sâogiltigt maskinlÃ¤ge â%sâogiltig minnesoperandogiltig storlek fÃ¶r sammanfogningspostogiltigt lÃ¤geogiltigt movx-adressregisterogiltigt movx-dspregisterogiltigt movy-adressregisterogiltigt movy-dspregsiterogiltigt neon-suffix fÃ¶r icke-neon-instruktionogiltigt nummerogiltigt antal register i listan; %d register fÃ¶rvÃ¤ntades vid operand %d -- â%sâogiltigt antal register i listan; endast 1 register fÃ¶rvÃ¤ntades vid operand %d -- â%sâogiltigt avstÃ¥ndsuttryckogiltigt avstÃ¥nd, mÃ¥l inte ordjusterat (0x%08lX)ogiltigt avstÃ¥nd, vÃ¤rde fÃ¶r stort (0x%08lX)ogiltig opkodogiltig opkod â%sâ i Ã¶vergÃ¥ngsregel â%sâogiltigt operandogiltig operand (sektion %s) fÃ¶r â%sâogiltig operand (sektion %s) fÃ¶r â%sâ) nÃ¤r â%sâ stÃ¤lldes inogiltig operand i ldmogiltig operand i stmogiltigt operandlÃ¤ge fÃ¶r denna arkitektur; behÃ¶ver 68020 eller hÃ¶greogiltig operand till ()+ogiltig operand till -()ogiltig operand fÃ¶r S^#ogiltig operandstorlek begÃ¤rdogiltigt operandsuffixogiltig operand till .code-direktiv (%d) (fÃ¶rvÃ¤ntade 16 eller 32)ogiltig operand till opkod %s: â%sâogiltiga operanderogiltiga operander (sektionerna %s och %s) fÃ¶r â%sâogiltiga operande (sektionerna %s och %s) fÃ¶r â%sâ nÃ¤r â%sâ stÃ¤lldes inogiltiga operander fÃ¶r korsenhets operationogiltiga operander fÃ¶r opkodogiltiga operander till opkod %s: â%sâogiltig kodning eller kodning utan stÃ¶d i .cfi_lsdaogiltig kodning eller kodning utan stÃ¶d i .cfi_personalityogiltig pc-relativ adressogiltigt prestandaregisterogiltigt pref-operationsnamnogiltig prioritet â%luâogiltig pseudooperationogiltigt quickrot-register angivetogiltig quickrot-enhet angivenogiltigt intervall i vektorregisterlistaogiltigt registerogiltigt register %sogiltigt register â%sâ fÃ¶r â%sâ-instruktionogiltigt registeruttryckogiltigt register fÃ¶r minnesÃ¥tkomstogiltig registerlistaogiltig registerlista fÃ¶r push/pop-instruktionogiltig registermaskogiltigt registernamneogiltigt registernummer (%ld) fÃ¶r â%sâogiltigt registernummer (%ld) fÃ¶r â%sâ-instruktionogiltigt registernummer: %d Ã¤r inte i [r0--r7]ogiltig registeroperandogiltig registeroperand #1ogiltig registeroperand #2ogiltig registeroperand #3ogiltig registeroperand #4ogiltig registeroperandsstorlek fÃ¶r â%sâogiltig registeroperand: %sogiltigt registerintervallogiltig registertyp %dogiltigt register: r15 otillÃ¥tetogiltigt resultat frÃ¥n lÃ¤ttnadsfragmentogiltigt omlokaliseringsuttryckogiltig omlokaliseringogiltig omlokalisering %s fÃ¶r fÃ¤ltogiltig omlokaliseringsuttryckogiltig omlokalisering fÃ¶r â%sâ-instruktionogiltig omlokalisering fÃ¶r fÃ¤ltogiltig omlokalisering fÃ¶r instruktionogiltig omlokalisering fÃ¶r operand %d fÃ¶r â%sâogiltig omlokalisering fÃ¶r operand %i fÃ¶r â%sâogiltig omlokalisering i instruktionslucka %iogiltig rotationogiltigt avrundningslÃ¤geogiltigt skalÃ¤rregister i listaogiltigt segment â%sâogiltig skiftogiltig skift fÃ¶r registrets avstÃ¥ndsadresseringslÃ¤geogiltig skiftoperatorogiltigt skiftvÃ¤rde: %ldogiltig omedelbar flyttalsoperand i kortformogiltig enkel nop-storlek: %d (fÃ¶rvÃ¤ntat inom [0, %d])ogiltigt smc-uttryckogiltig minnesoperand fÃ¶r kÃ¤llaogiltigt kÃ¤llregisterogiltig registerlista fÃ¶r kÃ¤llaogiltig kÃ¤llenhetogiltigt suffixogiltigt suffix efter register.ogtiligt swi-uttryckogiltig flagga -m%sogiltig symbolisk operandogiltig syntax fÃ¶r .dn-direktivogiltig syntax fÃ¶r .qn-direktivogiltig syntax fÃ¶r .req-direktivogiltig syntax fÃ¶r .unreq-direktivogiltigt systemregisternamnogiltig version av mÃ¥lhÃ¥rdvaraogiltig typ fÃ¶r literalpoologiltigt outÃ¶kat operandvÃ¤rdeogiltig upprullningsopkodogiltig anvÃ¤ndning av â=immediateâogiltig anvÃ¤ndning av %s-omlokaliseringogiltig anvÃ¤ndning av âMSLâogiltig anvÃ¤ndning av âMULâogiltig anvÃ¤ndning av 32-bitars registeravstÃ¥ndogiltig anvÃ¤ndning av 64-bitars registeravstÃ¥ndogiltig anvÃ¤ndning av operator â%sâogiltig anvÃ¤ndning av vektorregisterogiltigt vÃ¤rde fÃ¶r specialsyftesregisterogiltigt vektorregister i listaogiltigt vektorregisternamnogiltig skrivmask â%sâogiltig nollningsmask â%sâis_stmt value inte 0 eller 1isa nummer mindre Ã¤n nollhopp inte 3..10 byte bort (Ã¤r %d)hopp Ã¶ver nop-utfyllnad utanfÃ¶r intervallhoppmÃ¥l utanfÃ¶r intervallhoppmÃ¥l utanfÃ¶r intervall; ingen anvÃ¤ndbar trampolin hittadhopp till en symbol i ett annat ISA-lÃ¤gehopp till feljusterad adress (0x%lx)â%sâ-skrÃ¤p efter uttryckâ%sâ-skrÃ¤p efter registerskrÃ¤p efter operand %u till â%.*sâskrÃ¤p vid filslut, fÃ¶rsta okÃ¤nda tecken Ã¤r â%câskrÃ¤p vid radslut, fÃ¶rsta okÃ¤nda tecken vÃ¤rde 0x%xskrÃ¤p vid radlust: â%sâskrÃ¤p vid filslut: â%sâskrÃ¤p vid slut av maskinstrÃ¤ng, fÃ¶rsta okÃ¤nda tecken Ã¤r â%câskrÃ¤p hittat efter instruktion: %s.%sla mÃ¥ste anvÃ¤ndas med symbol. â%sâla anvÃ¤nt fÃ¶r att ladda 64-bitarsadress; rekommenerat att anvÃ¤nda dla istÃ¤lletetikett â$%dâ omdefinieradetikett â%d$â omdefinieradetikett %s har inte definierats i denna dwarf-sektionetikett efter â||âetikett efter predikatetikett inte vid bÃ¶rjan av exekveringspaketetiketter Ã¤r inte giltiga inuti buntarsaknar etikettsaknar etikett  sista register mÃ¥ste vara r7ldr till register 15 mÃ¥ste vara 4-byte-justeratldrd/strd krÃ¤ver udda:jÃ¤mnt registerparleb128-operand Ã¤r en odefinierad symbol: %svÃ¤nster operand Ã¤r ett stornum; heltalet 0 antagetvÃ¤nster operand Ã¤r ett flyttal; heltalet 0 antagetlÃ¤ngd behÃ¶vs intelÃ¤ngden fÃ¶r .comm â%sâ Ã¤r redan %ld. Inte Ã¤ndrad till %ld.lÃ¤ngd fÃ¶r .lcomm â%sâ Ã¤r redan %ld. Inte Ã¤ndrad till %ld.li rd-etikett fÃ¶ljer inte korrekt instruktionsformlibbfd ABI stÃ¤mmer interad %d: rep eller repi mÃ¥ste inkludera Ã¥tminstone 4 instruktionerrad %d: kan inte placera symboladress â%sâ i en byterad %d: kan inte placera adress fÃ¶r symbol â%sâ i en quadrad %d: kan inte placera adress fÃ¶r symbol â%sâ i en kortrad %d: kan inte placera vÃ¤rde %lx i en byterad %d: kan inte placera vÃ¤rde %lx i en kortrad %d: okÃ¤nd omlokaliseringstyp: 0x%xradnummer (%d) fÃ¶r .stab%c-direktiv fÃ¥r inte plats i indexfÃ¤lt (20 bitar)radnummer mÃ¥ste vara positiva; radnummer %d avbÃ¶jtlÃ¤nkregister mÃ¥ste vara ett lÃ¥gt numrerat registerlÃ¤nkregisterenhet mÃ¥ste vara endera av %sinfogning i literalpoolplats fÃ¶r literalpool krÃ¤vd fÃ¶r literaler i textsektion; ange med .literal_positionliteralpoolÃ¶verspillliteral refererad till Ã¶ver sektionsgrÃ¤nslk-adresseringslÃ¤gen Ã¤r ogiltiga fÃ¶r minnesmappad registeradresseringlmi-pseudoinstruktion bÃ¶r inte anvÃ¤nda en etikett i imm-fÃ¤ltetlo-register krÃ¤vslo()-omlokalisering anvÃ¤nd pÃ¥ en instruktion som inte har stÃ¶d fÃ¶r detladdar samma register i parallell operationlokal etikett â%sâ Ã¤r inte definieradlÃ¥ngt hopp krÃ¤vsloop som innehÃ¥ller mindre Ã¤n tre instruktioner kan utlÃ¶sa hÃ¥rdvarufellooprÃ¤knarkonstant %ld utanfÃ¶r intervall [1..%d]loopslut fÃ¶r nÃ¤r ett annat loopslut kan utlÃ¶sa hÃ¥rdvarufelloopmÃ¥l fÃ¶ljer inte loopinstruktion i sektionloop fÃ¶r lÃ¥ng fÃ¶r LOOP-instruktionloop: 32-bitarsfÃ¶rskjutning stÃ¶ds intelÃ¤gre register (r0-r15) fÃ¶rvÃ¤ntades, inte â%.100sâde lÃ¤gre 16 bitarna i masken ignoreradelui-uttryck inte i intervall 0..1048575m68k- och cf-funktioner Ã¤r bÃ¥da valdamakro %s inte implementerat Ã¤nmakroinstruktion expanderad till instruktion med fel storlek i en 16-bitarsgrenhoppluckamakroinstruktion expanderad till instruktion med fel storlek i en 32-bitarsgrenhoppluckamakroinstruktion expandera till multipla instruktionermakroinstruktion expanderad till multipla instruktioner i en grenhoppluckamakro krÃ¤ver %at-register medan noat anvÃ¤ndsmakro krÃ¤ver $at medan $at anvÃ¤ndsmakro anvÃ¤nde $at efter â.set noatâmakro nÃ¤stlade fÃ¶r djupthuvudopkod Ã¤r inte sorterad fÃ¶r %shuvudopkod inte inom intervall [0x%02x - 0x%02x]felaktigt angiven registerlista i push/popmask inte pÃ¥ destinationsoperandmask trimmar bort opkodsbitar fÃ¶r %smask-, index- och destinationsregister mÃ¥ste vara distinktamask-, index- och destinationsregister bÃ¶r vara destinktamatchande operander till opkodmd_apply_fix: okÃ¤nd r_type 0x%x
md_estimate_size_before_relax
minnesdestination krÃ¤vs fÃ¶r instruktion â%sâ efter âxreleaseâunderordnad opkod inte i intervall [0x00 - 0x3f]feljusterad grendestinationfeljusterad datafeljusterat avstÃ¥ndopkodsstorlek och operandstorlek stÃ¤mmer interegister och suffix stÃ¤mmer inteformat â%sâ stÃ¤mmer inte: #slots = %d, #opcodes = %d.eb stÃ¤mmer inteelement-/strukturtyper i lista stÃ¤mmer inteparenteser stÃ¤mmer intefelplacerat .procendfelplacerad PIC-operandsaknar â%câsaknar â)âsaknar â]âsaknar +saknar .endsaknar .end vid slutet av assembleringsaknar .end eller .bend vid filslutsaknar .endp fÃ¶re .cfi_startprocsaknar .fnstart fÃ¶r unwinding-direktivsaknar .funcsaknar .procsaknar =saknar CPS-flaggorsaknar DSP-namn â%sâsaknar [saknar ]saknar â)âsaknar â)â efter formella i makrodefinition â%sâsaknar â.endâsaknar â]âsaknar âlockâ med â%sâsaknar â}âsaknar â}â i â%sâsaknar abinamn â%sâsaknar justeringsaknar justeringstipssaknar arkitekturutÃ¶kningsaknar arkitekturnamn â%sâsaknar argumentsaknar argument fÃ¶r %s_check-direktivsaknar argumentseparator â,â fÃ¶r .cpsetupsaknar blocktypsaknar break-nummersaknar anropsargumentsaknar anropssignatursaknar klasssaknar avslutande citattecken; (antaget)saknar avslutande â"âsaknar avslutande â%câsaknar avslutande klammersaknar avslutande parentessaknar kommasaknar komma efter instr-konstant
saknar komma eller kolonsaknar villkorskod i strukturerat kontrolldirektivsaknar cpu-arkitektursaknar cpunamn â%sâsaknar doelementstorlek saknassaknar namn pÃ¥ emuleringslÃ¤gesaknar uttrycksaknar uttryck i .abiversion-direktivsaknar uttryck i .localentry-direktivuttryck saknas i .size-direktivsaknar flaggor: en av âPâ, âNâ eller âZâ krÃ¤vssaknar fpu-namn â%sâsaknar ramstorleksaknar omedelbart uttrycksaknar etikettsaknar lokalt uttrycksaknar lokalt indexsaknar modellparametersaknar namnsaknar avstÃ¥ndsaknar avstÃ¥nd i fÃ¶rindexerad adresssaknar operandsaknar operand eller kommasaknar operand; noll antagetsaknar eller felaktig avstÃ¥ndsuttrycksaknat eller ogiltigt fÃ¶rskjutningsuttryck â%sâsaknar eller ogiltigt fÃ¶rskjutningsuttryck â%sâ antogs vara 0saknat eller ogiltigt uttryck â%sâsaknat eller ogiltigt omedelbart uttryck â%sâsaknar predikattypsaknar riktigt symbolnamnsaknar omlokaliseringstypsaknar namnbytesstrÃ¤ngsaknar reserverat current_memory/grow_memeory-argumentsaknar rotationsfÃ¤lt efter kommasaknar avgrÃ¤nsaresaknar skiftmÃ¤ngdsaknar storlekstorleksuttryck saknassaknar sizeof_stub-uttrycksaknar stackstorleksaknar strÃ¤ngsaknar symbolnamnsaknar tabellindexsaknar thensaknar to eller downtosaknar typsaknar typsuffixsaknar vÃ¤rdesaknar versionsnamn i â%sâ fÃ¶r symbol â%sâmer Ã¤n 65K literalpoolermov kan inte anvÃ¤nda RD-port som destinationflera â||â pÃ¥ samma radflera grenar eller hopp i samma buntmultipla villkorsspecifikationerflera emuleringsnamn angivnamultipla format angivna fÃ¶r en bunt; anvÃ¤nd â%sâflera literaler i expansionmultipla movx-specifikationermultipla movy-specifikationermultipla specifikationer fÃ¶r parallellhanteringflera predikat pÃ¥ samma radmultipla sektioner ommappade till utdatasektion %sflera versioner [â%sâ|â%sâ] fÃ¶r symbol â%sâmultipla skrivningar till samma registermÃ¥ste vara @(r0,â¦)mÃ¥ste ange utÃ¶kningar att lÃ¤gga till innan de som ska tas bort angesbehÃ¶ver PIC-kvalificerare med symbol. â%sâbehÃ¶ver @GOT eller @GOTOFF. %snegativ justeringnegativt vÃ¤rde fÃ¶r %s - Ã¶verhoppatnegativt nop-kontrollbyte, Ã¶verhoppadnegativt avstÃ¥ndnegativ storleknegativt vÃ¤rde Ã¶verhoppat i %svarken Power- eller PowerPC-opkoder valdes.nÃ¤stlade .bs-blocknÃ¤stlade .ent-direktivnÃ¤stlad mjukvarurÃ¶rledad loopnyrad i titelny sektion â%sâ definierad utan attribut - detta kan orsaka problemnext utanfÃ¶r strukturerad loopinga %d-byteomlokaliseringar tillgÃ¤ngligaingen â(â som matchar â)âingen â[â matchar â]âingen .cprestore-pseudo-op anvÃ¤nd i PIC-kodingen .frame-pseudo-op anvÃ¤nd i PIC-kodingen arkitektur innehÃ¥ller alla instruktioner som anvÃ¤nts
stÃ¶d fÃ¶r 32bitars x86_64 har inte kompilerats iningen stÃ¶d inkompilerat fÃ¶r 64-bitars objektfilsformatstÃ¶d fÃ¶r x86_64 har inte kompilerats iningen aktuell filpekareingen startsymbol fÃ¶r global funktion â%sâinget filnamn fÃ¶ljer -t-flagganinget filnamn fÃ¶ljer .INCLUDE pseudo-opingen flyttalsenhet angiveningen funktionstyp fÃ¶r PLT-omlokaliseringingen hppa_fixup-post fÃ¶r uppfixningstyp 0x%xinget suffix fÃ¶r instruktionsmnemonic angivet och inga registeroperander; kan inte avgÃ¶ra storlek pÃ¥ instruktioninget suffix fÃ¶r instruktionmnemonic angivet; kan inte avgÃ¶ra omedelbar storlekingen kÃ¤nd dwarf-XCOFF-sektion fÃ¶r flagga 0x%08x
ingen fÃ¶regÃ¥ende sektion att returnera till, hoppas Ã¶ver.inget registrerat fragment fÃ¶r literalingen lÃ¤ttnad hittad fÃ¶r denna instruktion.inget sekvensnummer efter !%sokÃ¤nd storleksmodifierare efter punkt, .w antagetingen sÃ¥dan arkitekturmodifierare: â%sâingen sÃ¥dan arkitektur: â%sâingen sÃ¥dan instruktion : â%sâingen sÃ¥dan maskinutÃ¶kning â%sâolÃ¤mplig GREG-definition fÃ¶r operanderingen tagg angiven fÃ¶r %singet sÃ¤tt att hantera .file inom .ent/.end-sektionno-auto-litptools Ã¤r inkompatibelt med auto-litpool-limiticke-PIC-hopp anvÃ¤nd i PIC-bibliotekicke-absolut uttryck i konstantfÃ¤lticke-absolut vÃ¤rde anvÃ¤nt med .space/.besicke-konstant .%cleb128 stÃ¶ds inteicke-konstant byteantalicke-konstant uttryck i â.elseifâ-satsicke-konstant uttryck i â.ifâ-satsicke-konstant fyllnadsantal fÃ¶r absolutsektiondiskontinuerligt registerintervallicke-omedelbar OPF-operand, Ã¶verhoppadicke-valfri operand %d fÃ¶ljer pÃ¥ valfri operand i %sicke-pc-relativ omlokalisering fÃ¶r pc-relativt fÃ¤ltinte en 16-bitarsinstruktion â%sâinte tillrÃ¤ckligt med operander (%d) till â%sâ; fÃ¶rvÃ¤ntade %dtal (0x%s) stÃ¶rre Ã¤n 32 bitartal stÃ¶rre Ã¤n 64 bitarnummer mÃ¥ste vara positivt och mindre Ã¤n %dantal literalsymboler != 1felaktigt antal operanderantalet register mÃ¥ste vara i intervallet [1:4]numerisk vy kan endast hÃ¤vdas vara nolludda adressoperand: %ldudda justering vid %xudda fÃ¶rskjutningsgren (0x%lx byte)udda fÃ¶rskjutningsgren (0x%lx byte)udda nummer kan inte anvÃ¤ndas hÃ¤rudda antal byte i operandbeskrivningudda numrerat allmÃ¤nt register angivet som registerparudda register kan inte anvÃ¤ndas hÃ¤ravstÃ¥nd och bas mÃ¥ste vara i samma enhetavstÃ¥nd har annorlunda storlek jÃ¤mfÃ¶rt med basavstÃ¥nd i operand %u till â%.*sâ inte delbart med %uavstÃ¥nd i operand %u till â%.*sâ utanfÃ¶r intervallavstÃ¥nd mÃ¥ste vara en multipel av %davstÃ¥nd mÃ¥ste vara noll i ARM-kodningavstÃ¥nd inte en multipel av 4avstÃ¥nd utanfÃ¶r intervallavstÃ¥ndsregister fÃ¶rvÃ¤ntatavstÃ¥nd till ojusterad destinationavstÃ¥nd fÃ¶r stortavstÃ¥ndsvÃ¤rde utanfÃ¶r intervallendast âLSLâ-skift tillÃ¥tsendast âMUL VLâ tillÃ¥tsendast âMULâ tillÃ¥tsendast D-register kan indexerasendast LSL-skift tillÃ¥tet i thumb-lÃ¤geendast SUBS PC, LR, #konst tillÃ¥tetendast konstantuttryck tillÃ¥tetendast konstanta avstÃ¥nd stÃ¶ds i absolutsektionendast flyttalsnolla Ã¤r tillÃ¥ten som omedelbart vÃ¤rdeendast lo-register tillÃ¥tna med omedelbarendast de lÃ¤gre 16 bitarna av den fÃ¶rsta operanden anvÃ¤ndsendast en typ bÃ¶r anges fÃ¶r operandendast r0 kan anvÃ¤nda som byteantalsregisterendast r0.bX-bytefÃ¤lt av r0 kan anvÃ¤nds som byteantalendast r15 Ã¤r tillÃ¥tet hÃ¤rendast enkelblockstyper tillÃ¥tnaendast tvÃ¥ konsekutiva VFP-SP-register tillÃ¥tna hÃ¤ropkod %s hittades inte i hashtabellen Ã¶ver opkoderopkod â%sâ stÃ¶ds inte fÃ¶r mÃ¥l %sopkod â%sâ: kan inte hitta literaldefinitionopkod â%sâ: kunde inte tolka operand â%sâ i â%sâopkod â%sâ: inget bundet opnamn â%sâ fÃ¶r fÃ¶rvillkor i â%sâopkod â%sâ: fÃ¶rvillkor innehÃ¥ller endast konstanter i â%sâopkod â%sâ: ersÃ¤ttning har inte %d operationopkod â%sâ: ersÃ¤ttning har inte %d operationeropkod â%sâ: oidentifierad operand â%sâ i â%sâopkod âNOP.Nâ inte tillgÃ¤nglig i denna konfigurationopkod â%sâ stÃ¶ds inte fÃ¶r mÃ¥l %sopkod har ingen effektopkod saknas eller hittades inte pÃ¥ indataradenopkod stÃ¶ds inte i âinsn32â-lÃ¤geopkod stÃ¶ds inte i âinsn32â-lÃ¤ge â%sâopkod stÃ¶ds inte fÃ¶r denna processor: %s (%s)opkod inte giltig fÃ¶r denna cpu-variantopkodsspecifik %s-omlokalisering anvÃ¤nd utanfÃ¶r en instruktionopkoder â%sâ (lucka %d) och â%sâ (lucka %d) har bÃ¥da flyktig portÃ¥tkomstopkoder â%sâ (lucka %d) och â%sâ (lucka %d) skriver till samma portopkoder â%sâ (lucka %d) och â%sâ (lucka %d) skriver till samma registeropkoder â%sâ (lucka %d) och â%sâ (lucka %d) skriver till samma tillstÃ¥ndCFI Ã¶ppet vid filslut; saknar .cfi_endproc-direktivoperandoperand %d mÃ¥ste vara %s -- â%sâoperand %d mÃ¥ste vara en omedelbaroperand %d mÃ¥ste vara ett omedelbart uttryckoperand %d mÃ¥ste vara konstantoperand %d mÃ¥ste vara skalÃ¤roperander %d mÃ¥ste vara samma register som operand 1 -- â%sâoperand %d fÃ¶r â%sâ har ogiltigt vÃ¤rde â%uâoperand %d fÃ¶r â%sâ har vÃ¤rde â%uâ utanfÃ¶r intervalloperand %d utanfÃ¶r intervalloperand %d Ã¶verlappar i %soperand %d: otillÃ¥tet anvÃ¤ndningsuttryck: â%sâoperand %s0x%lx utanfÃ¶r intervall.operand %u till â%.*sâ Ã¤r skrivskyddatoperand %u till â%.*sâ Ã¤r lÃ¤sskyddatoperand %u till â%.*sâ Ã¤r inte ett giltigt basadressregisteroperand %u till â%.*sâ Ã¤r inte en giltig minnesreferensoperand %u till â%.*sâ inte ett giltigt returadressregisteroperand %u till â%.*sâ inte konstantoperand %u till â%.*sâ pÃ¥ fel sidaoperand %u till â%.*sâ utanfÃ¶r intervalloperand 1 mÃ¥ste vara FPSCRoperandindexfel fÃ¶r %soperand Ã¤r inte en absolut konstantoperand Ã¤r inte en omedelbarÃ¶verspill fÃ¶r operandmaskoperand stÃ¤mmer inte -- â%sâoperand mÃ¥ste vara en konstantoperand mÃ¥ste vara en konstant eller en etikettoperand mÃ¥ste var en multipel av 2operand mÃ¥ste vara en multipel av 4operand mÃ¥ste vara ett heltal i intervallet %lx..%lx, inte %lxoperand mÃ¥ste vara ett heltal i intervallet %u..%u, inte %ldoperandnummer stÃ¤mmer inteoperand utanfÃ¶r intervalloperand utanfÃ¶r intervall (%d Ã¤r inte mellan %d och %d)operand utanfÃ¶r intervall (%s inte mellan %ld och %ld)operand utanfÃ¶r intervall, instruktion expanderadoperand utanfÃ¶r intervall: %ldoperand utanfÃ¶r intervall: %luoperand utanfÃ¶r intervall: 0x%lxoperandÃ¶verspilloperand refererar till R%ld fÃ¶r instruktion fÃ¶re fÃ¶regÃ¥ende.operand refererar till R%ld fÃ¶r fÃ¶regÃ¥ende instruktion.operand referera till R%ld fÃ¶r fÃ¶regÃ¥ende laddning.felaktig operandstorlekoperandstorlek mÃ¥ste specificeras fÃ¶r omedelbar VMOVoperandstorlek mÃ¥ste stÃ¤mma Ã¶verens med registerbreddfelaktig operandtypoperandtyper kan inte hÃ¤rledasoperandvÃ¤rde utanfÃ¶r intervall fÃ¶r instruktionoperand/storlek stÃ¤mmer inteoperander 0 och 1 mÃ¥ste vara samma registeroperander fÃ¶r opkod â%sâ matchar inte nÃ¥got giltigt formatoperander stÃ¤mmer inteoperander var inte reducerbara i assembleringstidoperation kombinerar symboler i olika segmentflagga -mdsp stÃ¥r i konflikt med -medsp, aktiverar endast -medspflagga â%sâ kan inte negerasokÃ¤nd flagga â%sâflaggan â-%c%sâ Ã¤r fÃ¶rÃ¥ldrad: %sflaggan â-A%sâ Ã¤r fÃ¶rÃ¥ldrad: anvÃ¤nd â-%sâeller hÃ¶greslut pÃ¥ minneutanfÃ¶r intervallmata ut utfÃ¶rliga felmeddelandenÃ¶verspillÃ¶verspill i gren till %s; konverterad till lÃ¤ngre instruktionssekvensÃ¶verspill i omedelbart argumentÃ¶verspill i literaltabell (.lit8)Ã¶verspill i literaltabell (.lita)p2align stÃ¶ds inte fÃ¶r detta mÃ¥lpackningskonflikt: %s mÃ¥ste avsÃ¤ndas sekvensielltutfyllnad tillagdparallellparallellinstruktion fÃ¶ljer inte en annan instruktionparenteser Ã¶verhoppadetolkningfelpc kan inte anvÃ¤ndas med Ã¥terskrivningpc-relativ avstÃ¥nd fÃ¶r pc-relativ adress utanfÃ¶r intervallavstÃ¥nd fÃ¶r pc-relativ lÃ¤sning inte ordjusteratavstÃ¥nd fÃ¶r pc-relativ lÃ¤sning utanfÃ¶r intervallpce-instruktionsfel (16 bit || 16 bit).pcrel fÃ¶r gren till %s fÃ¶r lÃ¥ngt bort (0x%lx)pcrel fÃ¶r gren till %s fÃ¶r lÃ¥ngt bort (0x%x)pcrel fÃ¶r loopt fÃ¶r lÃ¥ngt bort (0x%lx)pcrel fÃ¶r lrw/jmpi/jsri till %s fÃ¶r lÃ¥ngt bort (0x%lx)pcrel avstÃ¥nd fÃ¶r gren till %s fÃ¶r lÃ¥ngt bort (0x%lx)pcrel-omlokalisering tillÃ¥ts inte i en instruktionpcrel fÃ¶r lÃ¥ngt bortpcrel allt fÃ¶r fjÃ¤rran frÃ¥n BFD_RELOC_BFIN_10pcrel allt fÃ¶r fjÃ¤rran frÃ¥n BFD_RELOC_BFIN_11_PCRELpcrel allt fÃ¶r fjÃ¤rran frÃ¥n BFD_RELOC_BFIN_12pcrel allt fÃ¶r fjÃ¤rran frÃ¥n BFD_RELOC_BFIN_24pcrel allt fÃ¶r fjÃ¤rran frÃ¥n BFD_RELOC_BFIN_5pcrel fÃ¶r lÃ¥ngt frÃ¥n BFD_RELOC_MOXIE_10personlighetsrutin krÃ¤vs fÃ¶re .handlerdata-direktivpersonlighetsrutin angiven fÃ¶r cantunwind-rampekarregister (X, Y eller Z) krÃ¤vspekarregister (Y eller Z) krÃ¤vspekarregister Z krÃ¤vspolymorfer Ã¤r inte aktiverade. AnvÃ¤nd flaggan -mP fÃ¶r att aktivera.efterindex mÃ¥ste var ett registerefterindexerat uttryck anvÃ¤nt i fÃ¶rinlÃ¤sningsinstruktionefterinkrementering stÃ¶ds intepowerpc_operands[%d] dubblerar powerpc_operands[%d]powerpc_operands[%d].bitm ogiltigfÃ¶rindexerad uttryck fÃ¶rvÃ¤ntatpredikat fÃ¶ljs inte av instruktionpredikat pÃ¥ A0 stÃ¶ds inte fÃ¶r denna arktitekturprefer-const16 stÃ¥r i konflikt med prefer-l32rprefer-l32r stÃ¥r i konflikt med prefer-const16fÃ¶rtigt slut pÃ¥ flyttalsprefixfÃ¶regÃ¥ende .ent inte stÃ¤ngt av ett .endfÃ¶regÃ¥ende CFI-post inte avslutad (saknar .cfi_endproc)fÃ¶regÃ¥ende â%sâ-sekvens har inte stÃ¤ngtsfÃ¶regÃ¥ende movx krÃ¤ver nopyfÃ¶regÃ¥ende movy krÃ¤ver nopxprofilering i absolut sektion?pseudoinstruktion â%sâ stÃ¶ds intepseudo-prefix utan instruktionpseudo-op otillÃ¥ten inom .struct/.unionpush/pop har inte stÃ¶d fÃ¶r {reglist}^kvalificerande predikat fÃ¶ljs inte av instruktionsnabbgrenavstÃ¥nd %d utanfÃ¶r intervall %d till %dr12 inte tillÃ¥tet hÃ¤rr13 inte tillÃ¥tet hÃ¤rr14 inte tillÃ¥tet som fÃ¶rsta register nÃ¤r andra registret utelÃ¤mnasr14 inte tillÃ¥tet hÃ¤rr15 baserad sparning inte tillÃ¥tenr15 inte tillÃ¥tet hÃ¤rr2 bÃ¶r inte anvÃ¤nds i indexerat adresseringslÃ¤ge-mips16 kan inte anvÃ¤ndas med jmp; anvÃ¤nd ret istÃ¤lletr31: kan inte anvÃ¤ndas med jmpr.n; anvÃ¤nd ret.n istÃ¤lletrd mÃ¥ste vara ett jÃ¤mnt register.rdhi och rdlo mÃ¥ste vara olikardhi, rdlo och rm mÃ¥ste alla vara olikaÃ¥terstartbar kodposttyp Ã¤r inte giltigrecord_type_not_validomdefinierad symbol kan inte anvÃ¤ndas fÃ¶r omlokaliseringomdefinition av globalt registeromdefinition mcutyp â%sâ till â%sâredundant %s-prefixregister borde vara <= 31reg-reg fÃ¶rvÃ¤ntatregister fÃ¶rvÃ¤ntadesregister fÃ¶rvÃ¤ntat, men sÃ¥g â%.6sâregister fÃ¶rvÃ¤ntades, inte â%.100sâregister Ã¤r i fel ordningregister har fel storlek fÃ¶r ett ord %sregister har fel storlek fÃ¶r adress %sregisterlista mÃ¥ste vara jÃ¤mnt numreradregisterlista mÃ¥ste vara frÃ¥n samma enhetregisterlista mÃ¥ste innehÃ¥lla Ã¥tminstone 1 och som mest 16 registerregisterlista fÃ¥r inte innehÃ¥lla duplikatregisterlista inte i stigande ordningregister mÃ¥ste antingen vara sp eller instÃ¤llt av ett tidigare unwind_movsp-direktivregisternamn eller nummer frÃ¥n 0 till 31 krÃ¤vsregisternamn eller nummer frÃ¥n 16 till 31 krÃ¤vsregisternummer %u stÃ¶ds inte fÃ¶r denna arkitekturregisternummer ovanfÃ¶r 15 krÃ¤vsregisternummer utanfÃ¶r intervallregisternummer fÃ¶r stort fÃ¶r push/popregisteravstÃ¥nd inte tillÃ¥tet i fÃ¶rindexerat adresseringslÃ¤geregisteroperand fÃ¶rvÃ¤ntad, men fick skalÃ¤rregister utanfÃ¶r intervall i listaregisterpar fÃ¶r operand %u till â%.*sâ inte ett giltig jÃ¤mnt/udda-parregister r%d utanfÃ¶r intervallregister r0 kan inte anvÃ¤ndas hÃ¤rregister r16-r23 krÃ¤vsregister r24, r26, r28 eller r30 krÃ¤vsregisterintervall inte i stigande ordningregister rh%d utanfÃ¶r intervallregister rl%d utanfÃ¶r intervallregister rq%d existerar interegister rq%d utanfÃ¶r intervallregister rr%d existerar interegister rr%d utanfÃ¶r intervallregister samma som Ã¥teskrivningsbasregister lagringsavstÃ¥nd inte en multipel av %uregisterskalning ignoreras hÃ¤rregistersektion har innehÃ¥ll
registersteg mÃ¥ste vara 1 eller 2registersyntax Ã¤r .register %%g[2367],{#kladd|symbolnamn|#hoppaÃ¶ver}felaktig registertypregisterenhet mÃ¥ste vara endera av %sregistervÃ¤rde anvÃ¤nt som uttryckregister kan inte vara de sammarel allt fÃ¶r fjÃ¤rran BFD_RELOC_16rel allt fÃ¶r fjÃ¤rran BFD_RELOC_8Ã¶verspill fÃ¶r rel31-omlokaliseringrelativ adress utanfÃ¶r intervallrelativt anrop utanfÃ¶r intervallrelativt hopp utanfÃ¶r intervallokÃ¤nt lÃ¤ttnadstipsinstruktion: rad %d.lÃ¤ttnad stÃ¶ds inte
lÃ¤ttade gren utanfÃ¶r intervall till ett hoppomlokalisering %d stÃ¶ds inte av objektfilsformatomlokalisering inte inom (fix del av) sektionomlokaliserat fÃ¤lt och omlokaliseringstyp skiljer sig i teckenomlokalisering %s stÃ¶ds inte av aktuellt ABIomlokalisering kan inte utfÃ¶ras nÃ¤r -mrelocatable anvÃ¤ndsomlokalisering stÃ¶ds inteomlokalisering inte tillÃ¥tenomlokalisering inte tillÃ¤mpligomlokalisering utanfÃ¶r intervallomlokaliseringsÃ¶verspillomlokalisering endast giltig i thumb1-kodrepetition < 0; .fill Ã¶verhoppatrepetitionsantal kan inte anvÃ¤ndas med %srepetitionsinstruktion anvÃ¤nd med icke-registerlÃ¤gesinstruktionersÃ¤tt ârepâ/ârepeâ-prefix med âbndânÃ¶dvÃ¤ndig fÃ¶rskjutning angavs inte i indirekt referensÃ¥terstoden av lÃ¥ga bitar i pmem diff-omlokaliseringresurskonflikt (A%d)resurskonflikt (C-flagga)resurskonflikt (F-flagga)resurskonflikt (PSW)resurskonflikt (R%d)resten av raden Ã¶verhoppad; fÃ¶rsta Ã¶verhoppat tecken Ã¤r â%câÃ¥terstÃ¤llning utan lagringreturnerad frÃ¥n mips_ip(%s) insn_opcode = 0x%x
hÃ¶ger operand Ã¤r ett stornum; heltalet 0 antagethÃ¶ger operand Ã¤r ett flyttal; heltalet 0 antagetror #imm stÃ¶ds interotation kan endast vara 0, 8, 16 eller 24avrundar den fÃ¶rsta operandens flyttal nedÃ¥t till ett heltal med teckenavrundar fÃ¶rsta flyttalsoperanden nedÃ¥t till teckenlÃ¶st heltalrva utan symbols-suffix vid jÃ¤mfÃ¶relseinstruktioner Ã¤r fÃ¶rÃ¥ldratÃ¶verspill fÃ¶r s3_PIC kodavstÃ¥nd (max 16 bitar med tecken)samma typ av prefix anvÃ¤nt tvÃ¥ gÃ¥ngerskalÃ¤rindex mÃ¥ste vara konstantskalÃ¤rindex utanfÃ¶r intervallskalÃ¤r mÃ¥ste ha ett indexskalÃ¤r utanfÃ¶r intervallskalÃ¤r utanfÃ¶r intervall fÃ¶r multiplkationsinstruktionskalfaktor ogiltig fÃ¶r denna arkitektur; behÃ¶ver cpu32 eller 68020 eller hÃ¶gre%d skalfaktor utan ett indexregisterscore3d-instruktion.sdaoff()-omlokalisering anvÃ¤nd pÃ¥ en instruktion som inte har stÃ¶d fÃ¶r detandraandra .ent-direktiv funnet innan .end-direktivandra operanden saknasandra operanden mÃ¥ste vara 1andra operanden mÃ¥ste vara 4andra operanden till .instr inte en konstant
det andra registret borde vara stÃ¶rre Ã¤n det fÃ¶rsta registretett andra register borde fÃ¶lja efter bindestreck i registerlistasektion %s har bytt namn flera gÃ¥ngersektion â%sâ avslutad med ett Ã¶ppet IT-block.sektion â%sâ aliasad till â%sâ anvÃ¤nds intesektionsjustering mÃ¥ste vara >= 4 byte fÃ¶r att matcha MULS/MULU-sÃ¤kerhetsektionsÃ¤ndring frÃ¥n inuti ett BSPEC/ESPEC-par stÃ¶ds intesektionssymboler Ã¤r redan globalasÃ¶kning till slutet av .incbin-fil misslyckades â%sâsegmentÃ¥sidosÃ¤ttning fÃ¶r â%sâ har ingen effektvald FPU stÃ¶der inte instruktionvald arkitektur har inte stÃ¶d fÃ¶r bred, villkorad greninstruktionvald processor har inte alla funktioner fÃ¶r den valda arkitekturenvald processor har inte stÃ¶d fÃ¶r âAâ-formen av denna instruktionvald processor har inte stÃ¶d fÃ¶r 32-bitar bred variant av instruktion â%sâvald processor har inte stÃ¶d fÃ¶r ARM-opkodervald processor har inte stÃ¶d fÃ¶r DSP-utÃ¶kningvald processor har inte stÃ¶d fÃ¶r PSTATE-fÃ¤ltnamn â%sâvald processor har inte stÃ¶d fÃ¶r SETPAN-instruktionvald processor har inte stÃ¶d fÃ¶r THUMB-opkodervald processor har inte stÃ¶d fÃ¶r â%sâvald processor har inte stÃ¶d fÃ¶r â%sâ i ARM-lÃ¤gevald processor har inte stÃ¶d fÃ¶r â%sâ i Thumb-lÃ¤gevald processor har inte stÃ¶d fÃ¶r â%sâ i Thumb-2-lÃ¤gevald processor har inte stÃ¶d fÃ¶r fp16-instruktionvald processor har inte stÃ¶d fÃ¶r begÃ¤rt register fÃ¶r sÃ¤rskilt Ã¤ndamÃ¥lvald processor har inte stÃ¶d fÃ¶r systemregisternamn â%sâvalt mÃ¥lformat â%sâ Ã¤r okÃ¤ntsekvensnummer anvÃ¤nds fÃ¶r !tlsgd!%ldsekvensnummer anvÃ¤nds fÃ¶r !tlsldm!%ldsekvensiellset kan endast anvÃ¤nda RD-port som kÃ¤llaset: nummer inte i intervall -2147483648..4294967295set: nummer inte i intervall 0..4294967295setend-anvÃ¤ndning fÃ¶r ARMv8 Ã¤r fÃ¶rÃ¥ldratsetsw: nummer inte i intervall -2147483648..4294967295stÃ¤ller in felaktiga sektionsattribut fÃ¶r %ssÃ¤tter in felaktig sektionstyp fÃ¶r %ssetx: otillÃ¥tet temporÃ¤rregister g0setx: temporÃ¤rregister samma som destinationsregisterskiftmÃ¤ngd utanfÃ¶r intervall 0 till 63skift med register inte tillÃ¥tet i thumb-lÃ¤geskiftantalskiftuttryck fÃ¶rvÃ¤ntadesskiftuttryck allt fÃ¶r stortskift mÃ¥ste vara konstantskift inte tillÃ¥ten fÃ¶r omedelbart vÃ¤rde med bitmaskskiftoperator fÃ¶rvÃ¤ntadskift utanfÃ¶r intervallskiftvÃ¤rde Ã¶ver 3 inte tillÃ¥tet i thumb-lÃ¤geskiftar i CMP-/MOV-instruktioner stÃ¶ds endast fÃ¶r enhetlig syntaxkort gren med noll avstÃ¥nd: anvÃ¤nd :wgenvÃ¤gsbetecknare ogiltigÃ¶verspill i .word med tecken; switch kan bli fÃ¶r stor; %ld vid 0x%lxvÃ¤rde med tecken utanfÃ¶r intervallsimd-instruktioner arbetar pÃ¥ parvÃ¤rden (L-prefix)enstaka instruktion Ã¤r %u byte lÃ¥ng men .bundle_align_mode_limit Ã¤r %u bytestorlek (%ld) utanfÃ¶r intervall, Ã¶verhoppadstorlek Ã¤r inte 4 eller 6storlek negativ; .fill Ã¶verhoppatstorleken fÃ¶r â%sâ Ã¤r redan %ld; Ã¤ndrar inte till %ldstorleksvÃ¤rde fÃ¶r uttrymesdirektiv fÃ¶r stort: %lxÃ¶verhoppning (%ld) eller antal (%ld) ogiltigt fÃ¶r filstorlek (%ld)hoppar Ã¶ver prefix fÃ¶r denna instruktionhoppar Ã¶ver tvÃ¥ordsinstruktionsmi-pseudoinstruktion borde inte anvÃ¤nda en etikett i imm-fÃ¤ltetnÃ¥gon symbol odefinierad; noll antogskÃ¤llakÃ¤ll- och adressenheter fÃ¥r inte delas i detta adresseringslÃ¤gekÃ¤ll- och destinationsinkrementlÃ¤ge mÃ¥ste stÃ¤mmakÃ¤lla och destination mÃ¥ste vara olikakÃ¤ll- och destinationsregister mÃ¥ste vara i olika enheterkÃ¤lloperand mÃ¥ste vara 16-bitars absolutadresskÃ¤lloperand mÃ¥ste vara 8-bitarsregisterkÃ¤llregistret â%s%sâ betecknar implicit â%s%.3s%uâ till â%s%.3s%uâ kÃ¤llgrupp i â%sâkÃ¤llregister mÃ¥ste vara i utlÃ¶sarenhetenkÃ¤llregister mÃ¥ste vara r1kÃ¤llregister samma som Ã¥terskrivningsbaskÃ¤llregister borde vara jÃ¤mnt numreradekÃ¤llregister borde vara jÃ¤mnt numreradekÃ¤lla1 och destination mÃ¥ste vara samma registerutrymmesallokering fÃ¶r komplex i absolutsektionutrymmesallokering fÃ¶r komplex i allmÃ¤n sektionsparc convert_frag
speciell vÃ¤nsterinstruktion â%sâ dÃ¶da instruktionen â%sâ i hÃ¶gerbehÃ¥llareangiven position var inte TETRA-justeradspill_mask-post inte implementerad.spu convert_frag
vilsekommen operand; (max %d operander/instruktion)st/ld-avstÃ¥nd 23-instruktion var inaktiverad.stackramslayout matchar inte personlighetsrutinstackramslayout fÃ¶r komplex fÃ¶r upprullarestackinkrement mÃ¥ste vara en multipel av 4stackpekaravstÃ¥nd fÃ¶r stort fÃ¶r personlighetsrutinfristÃ¥ende â%sâ-prefixstartadress stÃ¶ds inteunderlig pappershÃ¶jd, instÃ¤lld till ingen formfelplacerat â\âsteg mÃ¥ste vara en multipel av 64; de 6 lÃ¤gre bitarna ignoreradesteg om 2 inte tillgÃ¤ngligt nÃ¤r elementstorlek Ã¤r 8strÃ¤ng fÃ¶r stor (%lu byte)strÃ¤ngar mÃ¥ste vara placerade i en sektionstÃ¶d fÃ¶r ARM/Thumb-samarbeteanvÃ¤ndning av swp{b} fÃ¶r ARMv6 och ARMv7 Ã¤r fÃ¶rÃ¥ldratanvÃ¤ndning av swp{b} fÃ¶r ARMv8 och senare Ã¤r fÃ¶rÃ¥ldratsymbol â%sâ odefinierad; noll antassymbol %s Ã¤r i en annan sektionsymbol %s Ã¤r svag och kan Ã¥sidosÃ¤ttas senaresymbol â%sâ Ã¤r redan definieradsymbol â%sâ aliasad till â%sâ anvÃ¤nds intesymbol â%sâ redan definieradsymbol â%sâ kan inte bÃ¥de vara svag och normalsymbolen â%sâ Ã¤r redan definieradsymbol â%sâ Ã¤r redan definierad som â%sâ/%s%ldloop mellan symboldefinioner pÃ¥trÃ¤ffad vid â%sâsymbol i .toc matchar inte nÃ¥gon i .tcokÃ¤nt symbolnamn i den aktuella lokalenÃ¶verspill vid berÃ¤kning av symbolstorleksymbol allt fÃ¶r lÃ¥ngt bortstÃ¶d fÃ¶r symboltyp â%sâ finns bara fÃ¶r GNU- och FreeBSD-mÃ¥lstÃ¶d fÃ¶r symboltyp â%sâ finns bara fÃ¶r GNU-mÃ¥lsymbol%dsymbol+avstÃ¥nd stÃ¶ds inte fÃ¶r got tlssymbolisk operand inte tillÃ¥tensymboler tilldelade med .asg mÃ¥ste bÃ¶rja med en bokstavsymboler tilldelade med .eval mÃ¥ste bÃ¶rja med en bokstavsyntaxfelsyntaxfel i .startof. eller .sizeof.syntaxfel i @(disp,[Rn, gbr, pc])syntaxfel i @(r0,â¦)syntaxfel i @(r0â¦)syntaxfel i strukturerat villkorsdirektivsyntaxfel: villkorskod fÃ¶rvÃ¤ntades intesyntaxfel: fÃ¶rvÃ¤ntade â]â, hittade â%câsyntaxfel: otilgit toc-specificerare â%sâsyntaxfel: register fÃ¶rvÃ¤ntades intesyntaxfel: systemregister fÃ¶rvÃ¤ntades intesyntaxfel: vÃ¤rde saknas fÃ¶re registernamnetsyntaxfel: vektorregister fÃ¶rvÃ¤ntades intesyntaxfel; â)â inte tillÃ¥tet hÃ¤rsyntaxfel; filslut, fÃ¶rvÃ¤ntade â%câsyntaxfel; fÃ¶rvÃ¤ntade â,âsyntaxfel; hittade â%câ, fÃ¶rvÃ¤ntade â%câsyntaxfel; saknar â(â efter fÃ¶rskjutningsyntaxfel; saknar â)â efter basregistersystemregisternamn â%sâ Ã¤r fÃ¶rÃ¥ldrat och kan komma att tas bort i en framtida versionsystemregister kan inte inkluderas i listantagg inte hittad fÃ¶r .tag %smÃ¥l utanfÃ¶r intervalltdaoff()-omlokalisering anvÃ¤nd pÃ¥ en instruktion som inte har stÃ¶d fÃ¶r dettillfÃ¤llig vÃ¤xling fÃ¶r dumpningtextetikett â%sâ justerad till udda grÃ¤ns%d-bitars %s-arkitektur har inte stÃ¶d fÃ¶r â%sâ-utÃ¶kningen%s-namnet â%sâ Ã¤r fÃ¶r lÃ¥ngt (maximalt 16 tecken)XCOFF-filformatet har inte stÃ¶d fÃ¶r godtyckliga sektionerâ%sâ-utÃ¶kning krÃ¤ver %s%d revision %d eller stÃ¶reâ%sâ-utÃ¶kningen krÃ¤ver 64-bitars FPR:erâ%sâ-utÃ¶kning togs bort i %s%d revision %dden fÃ¶rsta operanden mÃ¥ste vara en symbolantalet .indirect_symbols definierade i sektion %s matchar inte antalet som fÃ¶rvÃ¤ntades (%d definierade, %d fÃ¶rvÃ¤ntade)avstÃ¥nde 0x%08lX Ã¤r inte representerbarde enda giltiga suffixen hÃ¤r Ã¤r â(plt)â och â(tlscall)âdet valfria omedelbara avstÃ¥ndet kan endast vara 0kÃ¤llregister fÃ¥r inte vara $0kÃ¤llregistret fÃ¥r inte vara $31den angivna flaggan accepteras inte i PSBden angivna flaggan accepteras inte i ISBden angivna omlokaliseringstypen Ã¤r inte tillÃ¥ten fÃ¶r 32-bitarsregisterden angivna omlokaliseringstypen Ã¤r inte tillÃ¥ten fÃ¶r MOVKden Ã¶vre halvan av ett 128-bitars FP/SIMD-register fÃ¶rvÃ¤ntadestypen fÃ¶r %s Ã¤r fÃ¶r komplex; den kommer att fÃ¶renklasanvÃ¤ndning av -mvle krÃ¤ver -a32.anvÃ¤ndning av -mvle krÃ¤ver rak byteordning.vikningsinstruktionen %s fÃ¥r inte placeras i en hopplucka.det finns inga prc-relativa storleksomlokaliseringardet finns inga teckenlÃ¶sa pc-relativa omlokaliseringartredjedetta adresseringslÃ¤ge Ã¤r inte tillÃ¤mpbart fÃ¶r destinationsoperanddetta adresseringslÃ¤ge krÃ¤ver Ã¥terskrivning av basregisterdenna gruppomlokalisering Ã¤r inte tillÃ¥ten fÃ¶r denna instruktiondenna instruktion accepterar inte en ackumulatordenna instruktion accepterar inte en omedelbardenna instruktion har inte stÃ¶d fÃ¶r indexeringdenna instruktion implicerar anvÃ¤ndning av ARMv8.1 AdvSIMD.denna instruktion krÃ¤ver en efterindexerad adressdenna instruktion kommer inte att Ã¥terskriva basregistretdenna instruktion kommer att Ã¥terskriva basregistretdenna omlokaliseringsmodifierare Ã¤r inte tillÃ¥ten fÃ¶r denna instruktiondenna strÃ¤ng fÃ¥r inte innehÃ¥lla â\0âdenna typ av register kan inte indexerasvillkorad thumb-instruktion bÃ¶r vara i IT-blockfÃ¶r fÃ¥ operanderfÃ¶r mÃ¥nga !literal!%ld for %sfÃ¶r mÃ¥nga .dim-posterfÃ¶r mÃ¥nga .size-posterfÃ¶r mÃ¥nga GREG-register allokerade (max %d)fÃ¶r mÃ¥nga IVC2-instr att packa tillsammansfÃ¶r mÃ¥nga IVC2-instr att packa med en 16-bitars core-instrfÃ¶r mÃ¥nga IVC2-instr att packa med en 32-bitars core-instrfÃ¶r mÃ¥nga argumentfÃ¶r mÃ¥nga fixarfÃ¶r mÃ¥nga instruktioner i exekveringspaketfÃ¶r mÃ¥nga lda-instr fÃ¶r !gpdisp!%ldfÃ¶r mÃ¥nga ldah-instr fÃ¶r !gpdisp!%ldfÃ¶r mÃ¥nga lituse-instr fÃ¶r !lituse_tlsgd!%ldfÃ¶r mÃ¥nga lituse-instr fÃ¶r !lituse_tlsldm!%ldallt fÃ¶r mÃ¥nga minnesreferenser fÃ¶r â%sâfÃ¶r mÃ¥nga operanderfÃ¶r mÃ¥nga operander (%d) till â%sâ; fÃ¶rvÃ¤ntade %dfÃ¶r mÃ¥nga operander till instruktionfÃ¶r mÃ¥nga operander till â%.*sâfÃ¶r mÃ¥nga positionella argumentfÃ¶r mÃ¥nga register i vektorregisterlistafÃ¶r mÃ¥nga st_EndfÃ¶r mÃ¥nga upprullningsopkoderallt fÃ¶r mÃ¥nga upprullningsopkoder fÃ¶r personlighetsrutin 0fÃ¶r mÃ¥nga upprullningsinstruktionerskrÃ¤p efter uttryck: %sÃ¶versÃ¤tter bgeni till moviÃ¶versÃ¤tter bmaski till moviÃ¶versÃ¤tter mgeni till moviÃ¶versÃ¤tter till â%s %s%sâÃ¶versÃ¤tter till â%s %s%s,%s%sâÃ¶versÃ¤tter till â%spâfÃ¤llundantag stÃ¶ds inte i vid ISA 1fÃ¤llvÃ¤rde %ld Ã¤r inte giltigtfÃ¶rsÃ¶kte att stÃ¤lla in okÃ¤nd symbol: %s
trunkerad fil â%sâ, %ld av %ld byte inlÃ¤statvÃ¥ .function-pseudo-op:er utan mellanliggande .eftyp %d omlokalisering klar?
typ stÃ¤mmer inte i vektorregisterlistatypspecificerare har fel antal delartyper angivna i bÃ¥de mnemonic och operandekan inte berÃ¤kna ADRL-instruktioner fÃ¶r PC-avstÃ¥nd 0x%lxkan inte fortsÃ¤tta med assemblering.kan inte hantera omlokalisering fÃ¶r byggnoteringkan inte generera upprullningsopkod fÃ¶r rampekaravstÃ¥ndkan inte generera upprullningsopkod fÃ¶r rampekarregister %dkan inte generera upprullningsopkod fÃ¶r register %dkan inte hitta inkluderingsfil: %skan inte packa %s ensamt?kan inte ombuffra fil: %s
kan inte repetera %s-instrkan inte Ã¥terstÃ¤lla returadress frÃ¥n tidigare Ã¥terstÃ¤llt registerkan inte bredda instruktionojusterat grenmÃ¥l: %d byte vid 0x%lxojusterad data vid en absolut position stÃ¶ds inteojusterad postinstruktionojusterad loop: %d byte vid 0x%lxotilldelat filnummer %ldobalanserade klamrar i operand %d.obalanserade parenteser i operand %d.oavslutad â(âoavkodbar fixoavkodbar instruktion i instruktions-fragodefinierad kombination av operanderodefinierad lokal etikett â%sâodefinierad symbol %s i PCR-omlokaliseringodefinierad symbol %s anvÃ¤nd som ett omedelbart vÃ¤rdeodefinierad symbol fÃ¶r opkod â%sâovÃ¤ntad %s-fixovÃ¤ntat .cantunwind-direktivovÃ¤ntad .cfi_inline_lsdaovÃ¤ntat .handlerdata-direktivovÃ¤ntat .unwind-movsp-direktivovÃ¤ntad 12-bitars omlokaliseringstypovÃ¤ntad 18-bitars omlokaliseringstypovÃ¤ntat PC-relativt uttryckovÃ¤ntad TLS-omlokaliseringovÃ¤ntat â"â i uttryckovÃ¤ntat adresseringslÃ¤ge fÃ¶r %sovÃ¤ntad bit angiven efter APSRovÃ¤ntat tecken â%câ i elementstorlekovÃ¤ntat tecken â%câ i predikattypovÃ¤ntat tecken â%câ i typspecificerareovÃ¤ntade tecken fÃ¶ljer pÃ¥ instruktionovÃ¤ntat komma efter mnemonicnamnet â%sâ -- â%sâovÃ¤ntat komma fÃ¶re den utelÃ¤mnade valfria operandenovÃ¤ntat filslut i irp eller irpcovÃ¤ntat filslut i makro â%sâ-definitionovÃ¤ntat radslutovÃ¤ntad fixfÃ¶rvÃ¤ntade negativ konstantovÃ¤ntat register i omedelbar operandovÃ¤ntad sektionsstorleksinformationovÃ¤ntad skiftoperatorovÃ¤ntad lagringsklass %dohanterat %d
ohanterad CFA-instr fÃ¶r upprullning (%d)ohanterad lokal omlokaliseringsfix %sohanterad operandkod %dohanterad omlokalisering %s i md_pcrel_from_sectionohanterad omlokaliseringstyp %sohanterat: .proc %s,%doimplementerat .nops-direktivoimplementerad opkod â%sâoimplementerat omlokaliseringssuffixoimplementerat segment %s i operandoimplementerad toc32-uttrycksmodifierareoimplementerad toc64-uttrycksmodifierareoindexerad adressering anvÃ¤nd i fÃ¶rinlÃ¤sningsinstruktionokÃ¤ndokÃ¤nt -mpid=-argument â%sâokÃ¤nt .gnu-attribut-vÃ¤rdeokÃ¤nt .loc-underdirektiv â%sâokÃ¤nt ABI-version â%sâ
okÃ¤nd CSR â%sâokÃ¤nd DSP â%sâokÃ¤nt DSP-prefixtecken %c %sokÃ¤nt EABI â%sâ
okÃ¤nd FPU-konfiguration â%sâ
okÃ¤nd ISA-nivÃ¥ %sokÃ¤nd ISA eller arktitektur %sokÃ¤nd MCU: %s
okÃ¤nt abi â%sâ
okÃ¤nt adresseringslÃ¤ge %sokÃ¤nt arkitekturnamn â%sâ
okÃ¤nt arkitekturutÃ¶kning â%sâokÃ¤nd arkitekturokÃ¤nd arkitektur %sokÃ¤nd arkitektur â%sâokÃ¤nd arkitektur â%sâokÃ¤nd arkitektur â%sâ
okÃ¤nd arkitekturutÃ¶kning â%sâ
okÃ¤nd arkitektur: %s
okÃ¤nt argument fÃ¶r .usepvokÃ¤nd baslinje â%sâ
okÃ¤nd villkorskod: %sokÃ¤nd begrÃ¤nsning â%câokÃ¤nd cpu â%sâokÃ¤nd standardvÃ¤rde cpu = %s, os = %sokÃ¤nt direktivokÃ¤nd kontrollsekvens â\%câ i strÃ¤ng; Ã¶verhoppadokÃ¤nd exekveringstyp skickad till write_2_short()okÃ¤nt uttryck i operand %sokÃ¤nt uttryck i operand %s. AnvÃ¤nd #llo() #lhi() #hlo() #hhi()okÃ¤nd korrigeringsstorlekokÃ¤nt flyttalsabi â%sâ
okÃ¤nt flyttalsformat â%sâ
okÃ¤nd flyttalsmnemonic: â%sâokÃ¤nt flyttalsprefixteckenokÃ¤nd flyttalstyp â%câokÃ¤nd fpu â%sâokÃ¤nd gruppomlokaliseringokÃ¤nt implicit IT-lÃ¤ge â%sâ, bÃ¶r vara arm, thumb, always eller never.okÃ¤nd instruktion â%sâokÃ¤nt avbrott %sokÃ¤nd mnemonic â%sâ -- â%sâokÃ¤nd mnemonic: â%sâokÃ¤nd opkodokÃ¤nd opkod â%sâokÃ¤nd opkod %sokÃ¤nd opkod â%sâokÃ¤nd opkod â%sâokÃ¤nd opkod eller formatnamn â%sâokÃ¤nd opkod: %sokÃ¤nd opkod: â%sâokÃ¤nd operand %sokÃ¤nt antal operanderokÃ¤nd operandskift: %x
okÃ¤nd operand till .archokÃ¤nd operator %s. Menade du X(Rn) eller #[hl][hl][oi](CONST) ?okÃ¤nt flagga till BTIokÃ¤nt eller ogiltigt sektionsattribut â%sâokÃ¤nd eller ogiltigt sektionstyp â%sâokÃ¤nt eller saknat PSTATE-fÃ¤ltnamnokÃ¤nt eller saknat operationsnamnokÃ¤nt eller saknad flagga till PSBokÃ¤nt eller saknat systemregisternamnokÃ¤nd parameter fÃ¶ljer .SECTION-direktiv: %sokÃ¤nd procedurtypokÃ¤nd profileringsflagga - Ã¶verhoppad.okÃ¤nd pseudo-op: â%sâokÃ¤nd posttyp %d (in %s)okÃ¤nt register %sokÃ¤nt register â%sâ -- .req Ã¶verhoppatokÃ¤nt register â%sâokÃ¤nt registeralias â%sâokÃ¤nd omlokalisering (%u)okÃ¤nd omlokaliseringsmodifierareokÃ¤nt sektionsattribut %sokÃ¤nt sektionsattribut â%câokÃ¤nd anvÃ¤ndardefinierad funktion %sokÃ¤nd vektoroperation: â%sâokÃ¤nt breddangivare â.%câokÃ¤nd/felaktig operandomatchad â[âomatchat .end-direktivofÃ¶rutsÃ¤gbart DCTI-parofÃ¶rutsÃ¤gbar inlÃ¤sning av register -- â%sâofÃ¶rutsÃ¤gbar inlÃ¤sning av registerpat -- â%sâofÃ¶rutsÃ¤gbar Ã¶verfÃ¶ring med Ã¥terskrivning -- â%sâofÃ¶rutsÃ¤gbar: identisk Ã¶verfÃ¶ring och statusregister â â%sâokÃ¤nd RX CPU-typ %sokÃ¤nt justeringsvÃ¤rde i .SECTION-direktiv: %sokÃ¤nt argument till -mcpu-flagga â%sâokÃ¤nd cpu-typ â%sâokÃ¤nd instruktion %sokÃ¤nd storleksmodifierare fÃ¶r instruktion .%cokÃ¤nd %d-bitarsversion av microMIPS-opkodokÃ¤nd .linkonce-typ â%sâokÃ¤nt .section-attribut: vill ha a,e,w,x,M,S,G,T eller nummerokÃ¤nd CPS-flaggaokÃ¤nda tecken vid slutet av parallellhanterings-instrokÃ¤nd standard-cpu â%sâokÃ¤nt emuleringsnamn â%sâokÃ¤nd utÃ¶kad version av MIPS16-opkodokÃ¤nd flaggaokÃ¤nd fopt-flaggaokÃ¤nd opkodokÃ¤nd opkod: â%sâokÃ¤nd flagga â%sâokÃ¤nd flagga -%c%sokÃ¤nd pseudo-instruktion %sokÃ¤nt registernamn â%sâokÃ¤nd omlokaliseringstypokÃ¤nt omlokaliseringssuffixokÃ¤nt sektionsattributokÃ¤nd sektionstypokÃ¤nd stabtyp â%câokÃ¤nt symbolsuffixsymboltyp â%sâ stÃ¶ds inteokÃ¤nt syntaxlÃ¤ge â%sâokÃ¤nd outÃ¶kad version av MIPS16-opkodoupplÃ¶sbart eller icke-positivt repetitionsantal; anvÃ¤nder 1oupplÃ¶st uttryck som mÃ¥ste lÃ¶sas uppoupplÃ¶st mÃ¥lsymbol fÃ¶r loop: %soskiftat register krÃ¤vsteckenlÃ¶st vÃ¤rde utanfÃ¶r intervallBFD-omlokaliseringsstorlek %d stÃ¶ds inteBFD omlokaliseringsstorlek %u stÃ¶ds intejustering fÃ¶r instruktion stÃ¶ds inteutsÃ¤ndning stÃ¶ds intebytevÃ¤rde stÃ¶ds inte; anvÃ¤nd ett annat suffixkonstant i omlokalisering stÃ¶ds intekonstantstorlek %d stÃ¶ds inte
uppfixningsstorlek %d stÃ¶ds inteflagga %i i raddirektiv stÃ¶ds intefptr-uppfixning stÃ¶ds intefptr-uppfixningsstorlek %d stÃ¶ds inteinstruktion â%sâ stÃ¶ds intestor konstant stÃ¶ds intemaskning stÃ¶ds intembin-sektionsinfo stÃ¶ds inte: %somlokalisering stÃ¶ds inteomlokalisering mot %s stÃ¶ds inteomlokalisering fÃ¶r DS-avstÃ¥ndsfÃ¤lt stÃ¶ds inteomlokaliseringstyp stÃ¶ds intesektionsattribut â%câ stÃ¶ds intesektionsattribut stÃ¶ds inte -- âaâstatisk avrundning/sae stÃ¶ds intesymbolsubtraktion stÃ¶ds intesyntax stÃ¶ds ejfelaktig anvÃ¤ndning av %s stÃ¶d intefelaktig anvÃ¤ndning av .ehword stÃ¶ds intefelaktig anvÃ¤ndning av .gpdword stÃ¶ds intefelaktig anvÃ¤ndning av .gpword stÃ¶ds intevariabel nop-kontroll stÃ¶ds inte i .nops-direktivvariabelstorlek eller fyllnadsvÃ¤rde stÃ¶ds intevektorindexregister stÃ¶ds intestÃ¶ds inte med Intel-mnemonicoterminerad strÃ¤ngoterminerad strÃ¤ng; nyrad infogatuntil utan repeatupprullningsopkod fÃ¶r lÃ¥ngupprullad ram har negativ storlekupprullad stackpekare inte dubbelordsjusteradanvÃ¤nd -march=armv2anvÃ¤nd -march=armv2aanvÃ¤nd -march=armv3anvÃ¤nd -march=armv3manvÃ¤nd -march=armv4anvÃ¤nd -march=armv4tanvÃ¤nd -march=armv5anvÃ¤nd -march=armv5tanvÃ¤nd -march=armv5teanvÃ¤nd -mcpu=allanvÃ¤nd -mcpu=arm1anvÃ¤nd -mcpu=arm2anvÃ¤nd -mcpu=arm250anvÃ¤nd -mcpu=arm3anvÃ¤nd -mcpu=arm6anvÃ¤nd -mcpu=arm600anvÃ¤nd -mcpu=arm610anvÃ¤nd -mcpu=arm620anvÃ¤nd -mcpu=arm7anvÃ¤nd -mcpu=arm70anvÃ¤nd -mcpu=arm700anvÃ¤nd -mcpu=arm700ianvÃ¤nd -mcpu=arm710anvÃ¤nd -mcpu=arm7100anvÃ¤nd -mcpu=arm710canvÃ¤nd -mcpu=arm710tanvÃ¤nd -mcpu=arm720anvÃ¤nd -mcpu=arm720tanvÃ¤nd -mcpu=arm740tanvÃ¤nd -mcpu=arm7500anvÃ¤nd -mcpu=arm7500feanvÃ¤nd -mcpu=arm7danvÃ¤nd -mcpu=arm7dianvÃ¤nd -mcpu=arm7dmanvÃ¤nd -mcpu=arm7dmianvÃ¤nd -mcpu=arm7manvÃ¤nd -mcpu=arm7tdmianvÃ¤nd -mcpu=arm8anvÃ¤nd -mcpu=arm810anvÃ¤nd -mcpu=arm9anvÃ¤nd -mcpu=arm920anvÃ¤nd -mcpu=arm940anvÃ¤nd -mcpu=arm9tdmianvÃ¤nd -mcpu=iwmmxtanvÃ¤nd -mcpu=strongarmanvÃ¤nd -mcpu=strongarm110anvÃ¤nd -mcpu=strongarm1100anvÃ¤nd -mcpu=strongarm1110anvÃ¤nd -mcpu=xscaleanvÃ¤nd -mfpu=fpa10anvÃ¤nd -mfpu=fpa11anvÃ¤nd -mfpu=fpeanvÃ¤nd .code16 fÃ¶r att garantera korrekt adresseringslÃ¤geanvÃ¤nd antingen -mfpu=softfpa eller -mfpu=softvfpanvÃ¤nd rampekareanvÃ¤ndning av .indirect_symbols krÃ¤ver â-dynamicâanvÃ¤ndning av PC i denna instruktion Ã¤r fÃ¶rÃ¥ldratanvÃ¤ndning av gammal och ny flaggstil fÃ¶r att stÃ¤lla in CPU-typanvÃ¤ndning av gammal och ny flaggstil fÃ¶r att stÃ¤lla in FPU-typanvÃ¤ndning av r13 Ã¤r fÃ¶rÃ¥ldratanvÃ¤ndning av r15 i blx i ARM-lÃ¤ge Ã¤r inte sÃ¥ anvÃ¤ndbartanvÃ¤ndning av r15 i bx i ARM-lÃ¤ge Ã¤r inte sÃ¥ anvÃ¤ndbartanvÃ¤ndning av r15 i bxj Ã¤r inte sÃ¥ anvÃ¤ndbartanvÃ¤nd kontroll av stackstorlek$%u anvÃ¤nt med â.set at=$%uâ$at anvÃ¤nt utan â.set noatâanvÃ¤nder anvÃ¤nder â%s%sâ istÃ¤llet fÃ¶r â%s%sâ pÃ¥ grund av â%câ-suffixanvÃ¤nder en bitfÃ¤ltsbredd som Ã¤r nollgiltiga byteordningsspecificerare Ã¤r be eller levÃ¤rde %d utanfÃ¶r intervall. AnvÃ¤nd #lo() eller #hi()vÃ¤rde %ld utanfÃ¶r intervallvÃ¤rde %lu Ã¤r fÃ¶r stort fÃ¶r byteoperandvÃ¤rde 0x%I64x trunkerat till 0x%I64xvÃ¤rde 0x%llx trunkerat till 0x%llxvÃ¤rde 0x%lx trunkerat till 0x%lxvÃ¤rde 0x%x utanfÃ¶r utÃ¶kat intervall.vÃ¤rde inte i intervall [-0xffffffff, 0xffffffff]vÃ¤rde utanfÃ¶r intervall [0, 0x7fffffff]vÃ¤rde inte i intervall [0, 0xffffffff]vÃ¤rde %ld utanfÃ¶r intervall fÃ¶r bytefÃ¶rskjutning.vÃ¤rde %ld utanfÃ¶r intervall fÃ¶r dubbeloldsfÃ¶rskjutning.vÃ¤rde %ld utanfÃ¶r intervall fÃ¶r ordfÃ¶rskjutning.vÃ¤rde %ld fÃ¶r stort fÃ¶r 16-bitarsgrenvÃ¤rde %ld fÃ¶r stort fÃ¶r 8-bitarsgrenvÃ¤rde fÃ¶r %s fÃ¶r stort fÃ¶r fÃ¤lt om %d byte vid %svÃ¤rde fÃ¶r %s fÃ¶r stort fÃ¶r fÃ¤lt om %d byte vid %svÃ¤rde utanfÃ¶r intervallvÃ¤rde utanfÃ¶r intervall: 0x%xvÃ¤rde sparat fÃ¶r r%d Ã¤r OKÃNTvÃ¤rde fÃ¶r stort fÃ¶r 1-bytesfÃ¤ltvÃ¤rde fÃ¶r stort fÃ¶r 2-bytesfÃ¤ltvÃ¤rde fÃ¶r stort fÃ¶r att fÃ¥r plats i %d bitarvektorelement mÃ¥ste vara konstantvektorregister fÃ¶rvÃ¤ntadesvektortyp fÃ¶rvÃ¤ntadesvfmal/vfmsl med FP16-typ kan inte vara villkorad, beteendet Ã¤r OFÃRUTSÃGBARTvynummer stÃ¤mmer inteslut pÃ¥ virtuellt minnevliw-grup mÃ¥ste bestÃ¥ av 1 kÃ¤rn- och 1 kopro-instr.varna fÃ¶r symboler som matchar instruktionsnamn [standard]varning: symbol %s har ingen csectwasm32-assemblerflaggor:
breddsuffix Ã¤r ogiltiga i ARM-lÃ¤gebreddsuffix Ã¤r ogiltiga i ARM-lÃ¤ge -- â%sâord med NOP:ar tillagt mellan ordmultiplikation och 16-bitarsmultiplikationord med NOP:ar tillagt mellan ordmultiplikation och lÃ¤sningÃ¥terskrivning (!) mÃ¥ste anvÃ¤ndas fÃ¶r VLDMDB och VSTMDBÃ¥terskrivning av basregister Ã¤r OPÃLITLIGTÃ¥terskrivning av basregister i registerlista Ã¤r OPÃLITLIGTÃ¥terskrivning anvÃ¤nd i fÃ¶rinlÃ¤sningsinstruktionÃ¥terskrivningsvÃ¤rde mÃ¥ste vara en omedelbar konstantatt skriva eller modifiera # Ã¤r opÃ¥litligtatt skriva till APSR utan att ange en bitmask Ã¤r fÃ¶rÃ¥ldratfelaktigt argument till .cfi_personality_idfel antal operanderfel antal operander fÃ¶r â%sâfelaktigt register i flyttalsregisterlistafel andraargument till .cfi_lsdafel andra argument till .cfi_personalityfelaktig instruktionsstorlek i en %u-bitarsgrenhoppluckafel tredjeargument till .cfi_val_encoded_addrxtensa-isa-fel: %sdu kan inte anvÃ¤nda âpop %scsâdu mÃ¥ste fÃ¥r endast ange en enkel typdu mÃ¥ste anvÃ¤nda hi-/lo-direktiv eller 16-bitarsmakro fÃ¶r att ladda ett 16-bitars vÃ¤rde.zdaoff()-omlokalisering anvÃ¤nd pÃ¥ en instruktion som inte har stÃ¶d fÃ¶r detnoll antaget fÃ¶r saknat uttrycknollflagga inte giltig fÃ¶r denna instruktionnoll mÃ¥ste anvÃ¤ndas som omedelbart vÃ¤rdenollningsmask tillÃ¥ts endast med skrivmask{standard in}