Defined in 1 files as a member:
Referenced in 62 files:
- external/apache2/llvm/dist/llvm/lib/CodeGen/MachineLICM.cpp
- external/apache2/llvm/dist/llvm/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp
- external/apache2/llvm/dist/llvm/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp
- external/apache2/llvm/dist/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
- external/apache2/llvm/dist/llvm/lib/CodeGen/TwoAddressInstructionPass.cpp
- external/apache2/llvm/dist/llvm/lib/Target/AArch64/AArch64AdvSIMDScalarPass.cpp
- external/apache2/llvm/dist/llvm/lib/Target/AArch64/AArch64CondBrTuning.cpp
- external/apache2/llvm/dist/llvm/lib/Target/AArch64/AArch64FrameLowering.cpp
- external/apache2/llvm/dist/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
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- external/apache2/llvm/dist/llvm/lib/Target/AArch64/AArch64InstrInfo.cpp
- external/apache2/llvm/dist/llvm/lib/Target/AArch64/AArch64LoadStoreOptimizer.cpp
- external/apache2/llvm/dist/llvm/lib/Target/AArch64/GISel/AArch64InstructionSelector.cpp
- external/apache2/llvm/dist/llvm/lib/Target/AArch64/GISel/AArch64PostLegalizerLowering.cpp
- external/apache2/llvm/dist/llvm/lib/Target/AArch64/GISel/AArch64PostSelectOptimize.cpp
- external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp
- external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
- external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.h, line 94
- external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/AMDGPUPostLegalizerCombiner.cpp
- external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
- external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/SIFoldOperands.cpp
- external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
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- external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp
- external/apache2/llvm/dist/llvm/lib/Target/ARM/ARMConstantIslandPass.cpp
- external/apache2/llvm/dist/llvm/lib/Target/ARM/ARMExpandPseudoInsts.cpp
- external/apache2/llvm/dist/llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp
- external/apache2/llvm/dist/llvm/lib/Target/ARM/ARMISelLowering.cpp
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- external/apache2/llvm/dist/llvm/lib/Target/ARM/ARMInstructionSelector.cpp
- external/apache2/llvm/dist/llvm/lib/Target/ARM/ARMLoadStoreOptimizer.cpp
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- external/apache2/llvm/dist/llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
- external/apache2/llvm/dist/llvm/lib/Target/ARM/Thumb2InstrInfo.cpp
- external/apache2/llvm/dist/llvm/lib/Target/ARM/ThumbRegisterInfo.cpp
- external/apache2/llvm/dist/llvm/lib/Target/Hexagon/HexagonBitSimplify.cpp
- external/apache2/llvm/dist/llvm/lib/Target/Hexagon/HexagonConstExtenders.cpp
- external/apache2/llvm/dist/llvm/lib/Target/Hexagon/HexagonCopyToCombine.cpp
- external/apache2/llvm/dist/llvm/lib/Target/Hexagon/HexagonFrameLowering.cpp
- external/apache2/llvm/dist/llvm/lib/Target/Hexagon/HexagonGenPredicate.cpp
- external/apache2/llvm/dist/llvm/lib/Target/Hexagon/HexagonISelLowering.cpp
- external/apache2/llvm/dist/llvm/lib/Target/Hexagon/HexagonInstrInfo.cpp
- external/apache2/llvm/dist/llvm/lib/Target/Hexagon/HexagonRDFOpt.cpp
- external/apache2/llvm/dist/llvm/lib/Target/Lanai/LanaiMemAluCombiner.cpp
- external/apache2/llvm/dist/llvm/lib/Target/Mips/MipsBranchExpansion.cpp
- external/apache2/llvm/dist/llvm/lib/Target/Mips/MipsInstrInfo.cpp
- external/apache2/llvm/dist/llvm/lib/Target/Mips/MipsInstrInfo.h, line 152
- external/apache2/llvm/dist/llvm/lib/Target/Mips/MipsInstructionSelector.cpp
- external/apache2/llvm/dist/llvm/lib/Target/Mips/MipsSEISelLowering.cpp
- external/apache2/llvm/dist/llvm/lib/Target/Mips/MipsSEISelLowering.h, line 78
- external/apache2/llvm/dist/llvm/lib/Target/Mips/MipsSEInstrInfo.cpp
- external/apache2/llvm/dist/llvm/lib/Target/Mips/MipsSEInstrInfo.h, line 98
- external/apache2/llvm/dist/llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp
- external/apache2/llvm/dist/llvm/lib/Target/RISCV/RISCVISelLowering.cpp
- external/apache2/llvm/dist/llvm/lib/Target/RISCV/RISCVISelLowering.h, line 541
- external/apache2/llvm/dist/llvm/lib/Target/SystemZ/SystemZISelDAGToDAG.cpp
- external/apache2/llvm/dist/llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp
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- external/apache2/llvm/dist/llvm/lib/Target/X86/X86EvexToVex.cpp
- external/apache2/llvm/dist/llvm/lib/Target/X86/X86FixupLEAs.cpp
- external/apache2/llvm/dist/llvm/lib/Target/X86/X86ISelDAGToDAG.cpp
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- external/apache2/llvm/dist/llvm/lib/Target/X86/X86ISelLowering.cpp
- external/apache2/llvm/dist/llvm/lib/Target/X86/X86InstrInfo.cpp
- external/apache2/llvm/dist/llvm/lib/Target/X86/X86InstructionSelector.cpp
- external/apache2/llvm/dist/llvm/lib/Target/X86/X86MCInstLower.cpp
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- external/apache2/llvm/dist/llvm/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp
- external/apache2/llvm/dist/llvm/lib/Transforms/InstCombine/InstCombineCasts.cpp