addMBB identifier - Netbsd-lockdoc source code (lockdoc-10.99.5-vfs-0.1)

Defined in 1 files as a prototype:

external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/AMDGPUMachineCFGStructurizer.cpp, line 403 (as a prototype)

Defined in 2 files as a function:

external/apache2/llvm/dist/llvm/include/llvm/CodeGen/MachineInstrBuilder.h, line 146 (as a function)
external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/AMDGPUMachineCFGStructurizer.cpp, line 978 (as a function)

Referenced in 100 files:

external/apache2/llvm/dist/llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp, line 3752
external/apache2/llvm/dist/llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp, line 2850
external/apache2/llvm/dist/llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp, line 3642
external/apache2/llvm/dist/llvm/lib/CodeGen/GlobalISel/MachineIRBuilder.cpp
- line 219
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external/apache2/llvm/dist/llvm/lib/CodeGen/ImplicitNullChecks.cpp, line 733
external/apache2/llvm/dist/llvm/lib/CodeGen/MachineSSAUpdater.cpp
- line 195
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external/apache2/llvm/dist/llvm/lib/CodeGen/ModuloSchedule.cpp
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external/apache2/llvm/dist/llvm/lib/CodeGen/PeepholeOptimizer.cpp, line 778
external/apache2/llvm/dist/llvm/lib/CodeGen/SelectionDAG/InstrEmitter.cpp, line 413
external/apache2/llvm/dist/llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
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external/apache2/llvm/dist/llvm/lib/CodeGen/SwiftErrorValueTracking.cpp, line 248
external/apache2/llvm/dist/llvm/lib/CodeGen/TailDuplicator.cpp
- line 526
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external/apache2/llvm/dist/llvm/lib/Target/AArch64/AArch64CondBrTuning.cpp, line 139
external/apache2/llvm/dist/llvm/lib/Target/AArch64/AArch64ExpandPseudoInsts.cpp
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external/apache2/llvm/dist/llvm/lib/Target/AArch64/AArch64FastISel.cpp
- line 2359
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external/apache2/llvm/dist/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
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external/apache2/llvm/dist/llvm/lib/Target/AArch64/AArch64InstrInfo.cpp
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external/apache2/llvm/dist/llvm/lib/Target/AArch64/GISel/AArch64InstructionSelector.cpp
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external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp, line 2466
external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
- line 4711
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external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/AMDGPUMachineCFGStructurizer.cpp
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external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp
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external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/R600InstrInfo.cpp
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external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/SIISelLowering.cpp
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external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
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external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/SILateBranchLowering.cpp
- line 108
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external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/SILowerControlFlow.cpp
- line 332
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external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/SIWholeQuadMode.cpp
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external/apache2/llvm/dist/llvm/lib/Target/ARC/ARCBranchFinalize.cpp
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external/apache2/llvm/dist/llvm/lib/Target/ARC/ARCInstrInfo.cpp
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external/apache2/llvm/dist/llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp
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external/apache2/llvm/dist/llvm/lib/Target/ARM/ARMBlockPlacement.cpp, line 206
external/apache2/llvm/dist/llvm/lib/Target/ARM/ARMConstantIslandPass.cpp
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external/apache2/llvm/dist/llvm/lib/Target/ARM/ARMExpandPseudoInsts.cpp
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external/apache2/llvm/dist/llvm/lib/Target/ARM/ARMFastISel.cpp
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external/apache2/llvm/dist/llvm/lib/Target/ARM/ARMFrameLowering.cpp, line 2599
external/apache2/llvm/dist/llvm/lib/Target/ARM/ARMISelLowering.cpp
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external/apache2/llvm/dist/llvm/lib/Target/AVR/AVRISelLowering.cpp
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external/apache2/llvm/dist/llvm/lib/Target/AVR/AVRInstrInfo.cpp
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external/apache2/llvm/dist/llvm/lib/Target/BPF/BPFISelLowering.cpp
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external/apache2/llvm/dist/llvm/lib/Target/BPF/BPFInstrInfo.cpp, line 233
external/apache2/llvm/dist/llvm/lib/Target/Hexagon/HexagonBitSimplify.cpp
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external/apache2/llvm/dist/llvm/lib/Target/Hexagon/HexagonConstPropagation.cpp, line 3173
external/apache2/llvm/dist/llvm/lib/Target/Hexagon/HexagonEarlyIfConv.cpp
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external/apache2/llvm/dist/llvm/lib/Target/Hexagon/HexagonHardwareLoops.cpp
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external/apache2/llvm/dist/llvm/lib/Target/Hexagon/HexagonInstrInfo.cpp
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external/apache2/llvm/dist/llvm/lib/Target/Hexagon/HexagonNewValueJump.cpp
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external/apache2/llvm/dist/llvm/lib/Target/Lanai/LanaiInstrInfo.cpp
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external/apache2/llvm/dist/llvm/lib/Target/M68k/M68kISelLowering.cpp
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external/apache2/llvm/dist/llvm/lib/Target/M68k/M68kInstrInfo.cpp
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external/apache2/llvm/dist/llvm/lib/Target/MSP430/MSP430BranchSelector.cpp
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external/apache2/llvm/dist/llvm/lib/Target/MSP430/MSP430ISelLowering.cpp
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external/apache2/llvm/dist/llvm/lib/Target/MSP430/MSP430InstrInfo.cpp
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external/apache2/llvm/dist/llvm/lib/Target/Mips/Mips16ISelLowering.cpp
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external/apache2/llvm/dist/llvm/lib/Target/Mips/MipsBranchExpansion.cpp
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external/apache2/llvm/dist/llvm/lib/Target/Mips/MipsConstantIslandPass.cpp
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external/apache2/llvm/dist/llvm/lib/Target/Mips/MipsExpandPseudo.cpp
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external/apache2/llvm/dist/llvm/lib/Target/Mips/MipsFastISel.cpp, line 978
external/apache2/llvm/dist/llvm/lib/Target/Mips/MipsISelLowering.cpp
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external/apache2/llvm/dist/llvm/lib/Target/Mips/MipsInstrInfo.cpp
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external/apache2/llvm/dist/llvm/lib/Target/Mips/MipsSEISelLowering.cpp
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external/apache2/llvm/dist/llvm/lib/Target/NVPTX/NVPTXInstrInfo.cpp
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external/apache2/llvm/dist/llvm/lib/Target/PowerPC/PPCBranchSelector.cpp, line 394
external/apache2/llvm/dist/llvm/lib/Target/PowerPC/PPCExpandISEL.cpp
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external/apache2/llvm/dist/llvm/lib/Target/PowerPC/PPCFastISel.cpp, line 795
external/apache2/llvm/dist/llvm/lib/Target/PowerPC/PPCFrameLowering.cpp
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external/apache2/llvm/dist/llvm/lib/Target/PowerPC/PPCISelLowering.cpp
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external/apache2/llvm/dist/llvm/lib/Target/PowerPC/PPCInstrInfo.cpp
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external/apache2/llvm/dist/llvm/lib/Target/PowerPC/PPCMIPeephole.cpp
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external/apache2/llvm/dist/llvm/lib/Target/PowerPC/PPCReduceCRLogicals.cpp
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external/apache2/llvm/dist/llvm/lib/Target/RISCV/RISCVExpandAtomicPseudoInsts.cpp
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external/apache2/llvm/dist/llvm/lib/Target/RISCV/RISCVExpandPseudoInsts.cpp, line 180
external/apache2/llvm/dist/llvm/lib/Target/RISCV/RISCVISelLowering.cpp
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external/apache2/llvm/dist/llvm/lib/Target/RISCV/RISCVInstrInfo.cpp
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external/apache2/llvm/dist/llvm/lib/Target/Sparc/SparcISelLowering.cpp
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external/apache2/llvm/dist/llvm/lib/Target/Sparc/SparcInstrInfo.cpp
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external/apache2/llvm/dist/llvm/lib/Target/SystemZ/SystemZFrameLowering.cpp, line 699
external/apache2/llvm/dist/llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
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external/apache2/llvm/dist/llvm/lib/Target/SystemZ/SystemZInstrInfo.cpp
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external/apache2/llvm/dist/llvm/lib/Target/SystemZ/SystemZPostRewrite.cpp, line 194
external/apache2/llvm/dist/llvm/lib/Target/VE/VEISelLowering.cpp
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external/apache2/llvm/dist/llvm/lib/Target/VE/VEInstrInfo.cpp
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external/apache2/llvm/dist/llvm/lib/Target/WebAssembly/WebAssemblyCFGStackify.cpp, line 983
external/apache2/llvm/dist/llvm/lib/Target/WebAssembly/WebAssemblyFastISel.cpp, line 1321
external/apache2/llvm/dist/llvm/lib/Target/WebAssembly/WebAssemblyFixIrreducibleControlFlow.cpp
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external/apache2/llvm/dist/llvm/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp
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external/apache2/llvm/dist/llvm/lib/Target/WebAssembly/WebAssemblyInstrInfo.cpp
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external/apache2/llvm/dist/llvm/lib/Target/WebAssembly/WebAssemblyLateEHPrepare.cpp, line 243
external/apache2/llvm/dist/llvm/lib/Target/X86/X86CmovConversion.cpp
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external/apache2/llvm/dist/llvm/lib/Target/X86/X86ExpandPseudo.cpp
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external/apache2/llvm/dist/llvm/lib/Target/X86/X86FastISel.cpp
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external/apache2/llvm/dist/llvm/lib/Target/X86/X86FrameLowering.cpp
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external/apache2/llvm/dist/llvm/lib/Target/X86/X86ISelLowering.cpp
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external/apache2/llvm/dist/llvm/lib/Target/X86/X86IndirectThunks.cpp, line 235
external/apache2/llvm/dist/llvm/lib/Target/X86/X86InstrInfo.cpp
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external/apache2/llvm/dist/llvm/lib/Target/X86/X86InstructionSelector.cpp, line 1371
external/apache2/llvm/dist/llvm/lib/Target/X86/X86SpeculativeLoadHardening.cpp
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external/apache2/llvm/dist/llvm/lib/Target/XCore/XCoreISelLowering.cpp
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external/apache2/llvm/dist/llvm/lib/Target/XCore/XCoreInstrInfo.cpp
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external/apache2/llvm/dist/llvm/tools/llvm-exegesis/lib/X86/Target.cpp, line 849