Defined in 3 files as a prototype:

• external/apache2/llvm/dist/llvm/include/llvm/CodeGen/TargetInstrInfo.h, line 1570 (as a prototype)
• external/apache2/llvm/dist/llvm/include/llvm/CodeGen/TargetSchedule.h, line 109 (as a prototype)
• external/apache2/llvm/dist/llvm/lib/Target/ARM/ARMBaseInstrInfo.h, line 316 (as a prototype)

Defined in 5 files as a function:

• external/apache2/llvm/dist/llvm/include/llvm/MC/MCInstrItineraries.h, line 228 (as a function)
• external/apache2/llvm/dist/llvm/include/llvm/MCA/Instruction.h, line 422 (as a function)
• external/apache2/llvm/dist/llvm/lib/CodeGen/TargetInstrInfo.cpp, line 1120 (as a function)
• external/apache2/llvm/dist/llvm/lib/CodeGen/TargetSchedule.cpp, line 107 (as a function)
• external/apache2/llvm/dist/llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp, line 3727 (as a function)

Referenced in 8 files:

• external/apache2/llvm/dist/llvm/lib/CodeGen/MachineScheduler.cpp
  • line 2027
  • line 2171
  • line 2174
  • line 2393
• external/apache2/llvm/dist/llvm/lib/CodeGen/TargetSchedule.cpp
  • line 110
  • line 111
• external/apache2/llvm/dist/llvm/lib/MCA/HardwareUnits/RetireControlUnit.cpp, line 45
• external/apache2/llvm/dist/llvm/lib/MCA/Stages/DispatchStage.cpp
  • line 63
  • line 82
  • line 161
• external/apache2/llvm/dist/llvm/lib/MCA/Stages/ExecuteStage.cpp
  • line 60
  • line 203
• external/apache2/llvm/dist/llvm/lib/MCA/Stages/InOrderIssueStage.cpp
  • line 40
  • line 240
• external/apache2/llvm/dist/llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp
  • line 3430
  • line 3734
  • line 4739
  • line 4740
• external/apache2/llvm/dist/llvm/lib/Target/Hexagon/HexagonMachineScheduler.cpp
  • line 340
  • line 407