ÞÜü%Ü
pqLsKÀ4½A3ÿu37©ká}MË[\¸[F¢1(Æ(ï(1A%s%1¿.ñ? ?`( (É2ò1%?W(ÀÕâ/ò."Q
]k¡» Õ ßé2F(d£ºÚó.*@k
¢%)Ó%ý!#!E$g:¨9ã "7 Z m ¬ Â Ø ð "!#.!R!o!!!¢!5Ä!/ú!*"H")Z"%"#ª"+Î"+ú"1X#+#1¶#1è#$%6$\$<p$ $Î$é$%%5%+J%v%%$¬%!Ñ%"ó%+& B& c& &¥&Å&!Ù&'û&'#''K's'''¶'Ì'ì'
(((F(d(u(("(¿(ß(ü()1)%L)r)0
).¶)1å)*%(*N*(d*%*&³*Ú*ò*+%+D+a+}++¥+±+!½+ß+$ð+%,;,Z,2n,2¡,2Ô,----D-X-p---±-Å-Ù-í-(.*.:.W.d...%º.à.ø.-/;F/// ²/¼/Ù/á/ñ/0 0:0S0#r0"0"¹0 Ü0ý0111I1a1q1Î1O3>Q3=3/Î3þ354zÍ42H5z{5Tö5lK6D¸6iý6kg7kÓ7s?8(³8(Ü8(9*.9(Y9(9*«9'Ö90þ90/:+`:+:+¸:*ä:9;+I;u;;;0¬;/Ý;
<<+<E<_<t<<<<¹<Ï<á<ó<,=;=S=o==*¢=*Í=ø=">1>E>d>p>">²>Ñ>ì>?%?E>?E?Ê?â?þ?@"@7@L@a@v@@ ¨@!É@ë@AA#-A4QA.A%µAÛA,ìA'B'AB1iB1B9ÍB9C1AC9sC9CçC0D1D9GD"D¤DºDÕDóDE'%EMEZE%sEE¬E#¼EàE÷EF%F;FKFjFF¨FÇFÚFíFG
G#G7GKG_GsGG GG¹GÉGÙGìGH*HFH6\H3H4ÇHüH$I4I'GI$oI%IºIÖIïI+J4JTJmJJ
J
§J!²JÔJäJ$úJ#KCK.UK/K.´KãKóK L"L8LRLlLLL¯LÅLÛL$ñLM#M?MOMkMM¢MÂMÛM3úM7.N4fN N¥N»NÂNÑNàNøNO*O#DO"hO"O®OËOäOöOPP%P
²+m´o°ØTw¤«U¸ -Ú&ÃxKĵu"/BPasXe<p(_Ò0ÖÅOv`§=ª:Õj2Ù$¡L®3E£Í¬\¹º»|ID.)yË' 5NF¾8
}k[¼t¶cH±
lÇ#1 b>¿fgM,RiÁC*zÔ!;W©ÆSVÂÌÈr³¥6J×ÑZ]nh9¢ÎϨÊÛ~7·qGн4ܯÀÓY@¦É?dQ^%{A
For the options above, The following values are supported for "ARCH":
For the options above, the following values are supported for "ABI":
aliases Do print instruction aliases.
cp0-names=ARCH Print CP0 register names according to
specified architecture.
Default: based on binary being disassembled.
debug_dump Temp switch for debug trace.
fpr-names=ABI Print FPR names according to specified ABI.
Default: numeric.
no-aliases Don't print instruction aliases.
reg-names=ABI Print GPR and FPR names according to
specified ABI.
reg-names=ARCH Print CP0 register and HWR names according to
specified architecture.
The following AARCH64 specific disassembler options are supported for use
with the -M switch (multiple options should be separated by commas):
The following ARM specific disassembler options are supported for use with
the -M switch:
The following MIPS specific disassembler options are supported for use
with the -M switch (multiple options should be separated by commas):
The following PPC specific disassembler options are supported for use with
the -M switch:
The following S/390 specific disassembler options are supported for use
with the -M switch (multiple options should be separated by commas):
The following i386/x86-64 specific disassembler options are supported for use
with the -M switch (multiple options should be separated by commas):
addr16 Assume 16bit address size
addr32 Assume 32bit address size
addr64 Assume 64bit address size
att Display instruction in AT&T syntax
data16 Assume 16bit data size
data32 Assume 32bit data size
dpfp Recognize FPX DP instructions.
dsp Recognize DSP instructions.
fpud Recognize double precision FPU instructions.
fpus Recognize single precision FPU instructions.
i386 Disassemble in 32bit mode
i8086 Disassemble in 16bit mode
intel Display instruction in Intel syntax
spfp Recognize FPX SP instructions.
suffix Always display instruction suffix in AT&T syntax
x86-64 Disassemble in 64bit mode
# <dis error: %08lx>$<undefined>%02x *unknown*%dsp16() takes a symbolic address, not a number%dsp8() takes a symbolic address, not a number%s: Error: %s: Warning: 'LSL' operator not allowed'ROR' operator not allowed(DP) offset out of range.(SP) offset out of range.(unknown)*unknown*21-bit offset out of range64-bit address is disabled<function code %d><illegal precision><internal disassembler error><internal error in opcode table: %s %s>
<unknown register %d>ABORT: unknown operandAddress 0x%s is out of bounds.
Bad immediate expressionBad register in postincrementBad register in preincrementBad register nameDon't know how to specify # dependency %s
Don't understand 0x%x
Error: read from memory failedHmmmm 0x%xImmediate is out of range -128 to 127Immediate is out of range -32768 to 32767Immediate is out of range -512 to 511Immediate is out of range -7 to 8Immediate is out of range -8 to 7Immediate is out of range 0 to 65535Internal disassembler errorInternal error: bad sparc-opcode.h: "%s", %#.8lx, %#.8lx
Internal error: bad sparc-opcode.h: "%s", %#.8lx, %#.8lx
Label conflicts with `Rx'Label conflicts with register nameMissing '#' prefixMissing '.' prefixMissing 'pag:' prefixMissing 'pof:' prefixMissing 'seg:' prefixMissing 'sof:' prefixOperand is not a symbolRegister list is not validRegister must be between r0 and r7Register must be between r8 and r15Register number is not validSR/SelID is out of rangeSelect raw register namesSelect register names used by GCCSelect register names used in ARM's ISA documentationSelect special register names used in the ATPCSSyntax error: No trailing ')'Unknown error %d
Unrecognised disassembler CPU option: %s
Unrecognised disassembler option: %s
Unrecognised register name set: %s
Unrecognized field %d while building insn.
Unrecognized field %d while decoding insn.
Unrecognized field %d while getting int operand.
Unrecognized field %d while getting vma operand.
Unrecognized field %d while printing insn.
Unrecognized field %d while setting int operand.
Unrecognized field %d while setting vma operand.
Value is not aligned enoughW keyword invalid in FR operand slot.W register expectedWarning: disassembly unreliable - not enough bytes availableaccepted values are from -1 to 6address writeback expectedbad instruction `%.50s'bad instruction `%.50s...'branch operand unalignedbranch to odd offsetbranch value not in range and to odd offsetbranch value out of rangebyte relocation unsupportedcan't create i386-tbl.h, errno = %s
displacement value is not aligneddisplacement value is out of rangedon't know how to specify %% dependency %s
dsp:16 immediate is out of rangedsp:20 immediate is out of rangedsp:24 immediate is out of rangedsp:8 immediate is out of rangeextraneous registerfloating-point immediate expectedfloating-point value must be 0.0 or 1.0floating-point value must be 0.5 or 1.0floating-point value must be 0.5 or 2.0illegal bitmaskillegal immediate valueillegal use of parenthesesimm10 is out of rangeimm:6 immediate is out of rangeimmediate is out of range 0-7immediate is out of range 1-2immediate is out of range 1-8immediate is out of range 2-9immediate offsetimmediate out of rangeimmediate valueimmediate value cannot be registerimmediate value is out of rangeimmediate value out of rangeinvalid addressing modeinvalid arithmetic immediateinvalid conditional optioninvalid immediate, must be 1, 2, or 4invalid mask fieldinvalid position, should be 0, 16, 32, 48 or 64.invalid position, should be 16, 32, 64 or 128.invalid position, should be one of: 0,4,8,...124.invalid registerinvalid register for stack adjustmentinvalid register nameinvalid register number, should be blinkinvalid register number, should be fpinvalid register number, should be pclinvalid register offsetinvalid shift amountinvalid shift operatorinvalid size, should be 1, 2, 4, or 8invalid size, value must be invalid value for immediatejump hint unalignedjunk at end of linemissing `)'missing `]'missing mnemonic in syntax stringmissing registernegative immediate value not allowednegative or unaligned offset expectedoffset(IP) is not a valid formoperand is not zerooperand out of range (%ld not between %ld and %ld)operand out of range (%ld not between %ld and %lu)operand out of range (%lu not between %lu and %lu)p0-p7 expectedregister element indexregister must be BLINKregister must be GPregister must be ILINK1register must be ILINK2register must be PCLregister must be R0register must be R1register must be R2register must be R3register must be SPregister must be either r0-r3 or r12-r15register numberregister number must be evenshift amountshift amount must be 0 or 12shift amount must be 0 or 16shift amount must be 0 or 8shift amount must be a multiple of 16shift operator expectedstack pointer register expectedsyntax error (expected char `%c', found `%c')syntax error (expected char `%c', found end of instruction)unable to change directory to "%s", errno = %s
undefinedunexpected address writebackunknownunknown 0x%02lxunknown 0x%04lxunknown constraint `%c'unrecognized form of instructionunrecognized instructionvalue must be a multiple of 16value must be in the range 0 to 240value must be in the range 0 to 28value must be in the range 0 to 31value must be in the range 1 to value must be power of 2value out of range 1 - 256vector5 is out of rangevector8 is out of rangez0-z15 expectedz0-z7 expectedProject-Id-Version: opcodes 2.30.0
Report-Msgid-Bugs-To: bug-binutils@gnu.org
PO-Revision-Date: 2018-05-15 21:17+0800
Last-Translator: Boyuan Yang <073plan@gmail.com>
Language-Team: Chinese (simplified) <i18n-zh@googlegroups.com>
Language: zh_CN
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
Plural-Forms: nplurals=1; plural=0;
X-Bugs: Report translation errors to the Language-Team address.
X-Generator: Poedit 2.0.7
对äºä»¥ä¸çé项ï¼ä»¥ä¸å¼å¯è¢«ç¨äº "ARCH"ï¼
对äºä»¥ä¸çé项ï¼ä»¥ä¸å¼å¯è¢«ç¨äº "ABI"ï¼
aliases è¦æå°æä»¤å«åã
cp0-names=ARCH æ ¹æ®æå®çæ¶ææå° CP0 å¯åå¨åã
é»è®¤ï¼æ ¹æ®è¢«åæ±ç¼çäºè¿å¶ä»£ç ã
debug_dump è°è¯è·è¸ªç临æ¶å¼å
³ã
fpr-names=ABI æ ¹æ®æå®ç ABI æå°æµ®ç¹å¯åå¨åã
é»è®¤ï¼æ°åã
no-aliases ä¸è¦æå°æä»¤å«åã
reg-names=ABI æ ¹æ®æå®ç ABI æå°éç¨å¯åå¨åæµ®ç¹å¯å
å¨åã
reg-names=ARCH æ ¹æ®æå®çæ¶ææå° CP0 å HWR å¯åå¨åã
ä¸å AARCH64 ç¹å®çåæ±ç¼å¨é项å¯éè¿ -M å¼å
³å¯ç¨ï¼ä½¿ç¨éå·åéå¤ä¸ªé项ï¼ï¼
ä¸å ARM ç¹å®çåæ±ç¼å¨é项å¯éè¿ -M å¼å
³å¯ç¨ï¼
ä¸å MIPS ç¹å®çåæ±ç¼å¨é项å¯éè¿ -M å¼å
³å¯ç¨ï¼ä½¿ç¨éå·åéå¤ä¸ªé项ï¼ï¼
ä¸å PPC ç¹å®çåæ±ç¼å¨é项å¨ä½¿ç¨ -M å¼å
³æ¶å¯ç¨ï¼ä½¿ç¨éå·åéå¤ä¸ªé项ï¼ï¼
ä¸å S/390 ç¹å®çåæ±ç¼å¨é项å¯éè¿ -M å¼å
³å¯ç¨ï¼ä½¿ç¨éå·åéå¤ä¸ªé项ï¼ï¼
ä¸å i386/x86-64 ç¹å®çåæ±ç¼å¨é项å¨ä½¿ç¨ -M å¼å
³æ¶å¯ç¨ï¼ä½¿ç¨éå·åéå¤ä¸ªé项ï¼ï¼
addr16 åå® 16 ä½å°å大å°
addr32 åå® 32 ä½å°å大å°
addr64 åå® 64 ä½å°å大å°
att ç¨ AT&T è¯æ³æ¾ç¤ºæä»¤
data16 åå® 16 使°æ®å¤§å°
data32 åå® 32 使°æ®å¤§å°
dpfp è¯å« FPX DP æä»¤ã
dsp è¯å« DSP æä»¤ã
fpud è¯å«å精度 FPU æä»¤ã
fpus è¯å«å精度 FPU æä»¤ã
i386 å¨ 32 使¨¡å¼ä¸åæ±ç¼
i8086 å¨ 16 使¨¡å¼ä¸åæ±ç¼
intel ç¨ Intel è¯æ³æ¾ç¤ºæä»¤
spfp è¯å« FPX SP æä»¤ã
suffix å¨ AT&T è¯æ³ä¸å§ç»æ¾ç¤ºæä»¤åç¼
x86-64 å¨ 64 使¨¡å¼ä¸åæ±ç¼
# <åæ±ç¼åºé: %08lx>$<æªå®ä¹>%02x *æªç¥*%dsp16() 使ç¨ä¸ä¸ªç¬¦å·å°åï¼èéæ°å%dsp8() 使ç¨ä¸ä¸ªç¬¦å·å°åï¼èéæ°å%sï¼é误ï¼%sï¼è¦åï¼ä¸å
许 'LSL' æä½ç¬¦ä¸å
许 'ROR' æä½ç¬¦(DP) åç§»éè¶ç(SP) åç§»éè¶çã(æªç¥)*æªç¥*21ä½é¿çåç§»éè¶ç64 ä½å°åå·²ç¦ç¨<彿°ä»£ç %d><éæ³ç精度><åæ±ç¼å¨å
é¨é误><æä½æ°è¡¨ä¸åºç°å
é¨é误ï¼%s %s>
<æªç¥çå¯åå¨ %d>䏿¢ï¼æªç¥çæä½æ°å°å 0x%s è¶çã
é误çç«å³æ°è¡¨è¾¾å¼åç½®èªå¢ä¸ä½¿ç¨äºé误çå¯åå¨åç½®èªå¢ä¸ä½¿ç¨äºé误çå¯åå¨é误çå¯åå¨åä¸ç¥éå¦ä½æå® # ä¾èµ %s
æ æ³è¯å« 0x%x
é误ï¼ä»å
å读å失败å¦... 0x%xç«å³æ°è¶ç (-128 å° 127)ç«å³æ°è¶ç (-32768 å° 32767)ç«å³æ°è¶ç (-512 å° 511)ç«å³æ°è¶ç (-7 å° 8)ç«å³æ°è¶ç (-8 å° 7)ç«å³æ°è¶ç (0 å° 65535)åæ±ç¼å¨å
é¨é误å
é¨é误ï¼é误ç sparc-opcode.hï¼â%sâï¼%#.8lxï¼%#.8lx
å
é¨é误ï¼é误ç sparc-opcode.hï¼â%sâï¼%#.8lxï¼%#.8lx
æ å·ä¸âRxâå²çªæ å·ä¸å¯åå¨åå²çªç¼ºå¤± '#' åç¼ç¼ºå¤± '.' åç¼ç¼ºå¤± 'pag:' åç¼ç¼ºå¤± 'pof:' åç¼ç¼ºå¤± 'seg:' åç¼ç¼ºå¤± 'sof:' åç¼æä½æ°ä¸æ¯ä¸ä¸ªç¬¦å·å¯åå¨åè¡¨æ æå¯åå¨å¿
é¡» r0 å r7 ä¹é´å¯åå¨å¿
é¡» r8 å r15 ä¹é´å¯å卿°åæ æSR/SelID è¶çéæ©åå§å¯åå¨åç§°éæ© GCC 使ç¨çå¯åå¨åç§°éæ© ARM ç ISA ææ¡£ä¸ä½¿ç¨çå¯åå¨åç§°éæ© ATPCS ä¸ä½¿ç¨çç¹æ®å¯åå¨åç§°è¯æ³éè¯¯ï¼æ²¡æç»å°¾çâ)âæªç¥é误 %d
æ æ³è¯å«çåæ±ç¼å¨ CPU é项ï¼%s
æ æ³è¯å«çåæ±ç¼å¨é项ï¼%s
æ æ³è¯å«çå¯åå¨åç§°éï¼%s
å»ºç« insn æ¶éå°æ æ³è¯å«çåæ®µ %dã
è§£ç insn æ¶éå°æ æ³è¯å«çåæ®µ %dã
è·å¾ int æä½æ°æ¶éå°æ æ³è¯å«çåæ®µ %dã
è·å¾ vma æä½æ°æ¶éå°æ æ³è¯å«çåæ®µ %dã
æå° insn æ¶éå°æ æ³è¯å«çåæ®µ %dã
设置 int æä½æ°æ¶éå°æ æ³è¯å«çåæ®µ %dã
设置 vma æä½æ°æ¶éå°æ æ³è¯å«çåæ®µ %dã
æ°å¼å¯¹é½ç¨åº¦ä¸å¤W å
³é®åéæ³ï¼å¨ FR æä½æ°æ§½ä½ä¸ã颿ç W å¯åå¨è¦åï¼åæ±ç¼ä¸å¯é - 没æè¶³å¤çå¯ç¨åè坿¥åçå¼å¨ -1 å° 6 ä¹é´é¢æçå°åååé误çæä»¤â%.50sâé误çæä»¤â%.50s...â忝æä½æ°æªå¯¹é½è·³è½¬åç§»éä¸ºå¥æ°è·³è½¬è¶çä¸è·³è½¬åç§»éä¸ºå¥æ°è·³è½¬è¶ç䏿¯æåèéå®ä½æ æ³å建 i386-tbl.hï¼errno = %s
åç§»å¼æªå¯¹é½åç§»å¼è¶çä¸ç¥éå¦ä½æå® %% ä¾èµ %s
dsp:16 ç«å³æ°è¶çdsp:20 ç«å³æ°è¶çdsp:24 ç«å³æ°è¶çdsp:8 ç«å³æ°è¶çå¤ä½å¯åå¨é¢æçæµ®ç¹å¸¸éç«å³æ°æµ®ç¹å¼å¿
须为 0.0 æ 1.0æµ®ç¹å¼å¿
须为 0.5 æ 1.0æµ®ç¹å¼å¿
须为 0.5 æ 2.0éæ³ç使©ç éæ³çç«å³æ°æ¬å·ç¨æ³éæ³imm10 è¶çimm:6 ç«å³æ°è¶çç«å³æ°è¶ç 0-7ç«å³æ°è¶ç 1-2ç«å³æ°è¶ç 1-8ç«å³æ°è¶ç 2-9ç«å³æ°åç§»ç«å³æ°è¶çç«å³æ°ç«å³æ°ä¸è½æ¯å¯åå¨ç«å³æ°è¶çç«å³æ°è¶çæ æå¯»åæ¨¡å¼æ æçç®æ¯ç«å³æ°æ æçæ¡ä»¶éé¡¹æ æçç«å³æ°ï¼åºå½ä¸º 1ã2 æ 4æ æçæ©ç åæ®µæ æçä½ç½®ï¼åºå½ä¸º 0ã16ã32ã48 æ 64ãæ æçä½ç½®ï¼åºå½ä¸º 16ã32ã64 æ 128ãæ æçä½ç½®ï¼åºå½ä¸º 0ã4ã8ã...ã124ãæ æçå¯åå¨ç¨äºè°æ´å æ çå¯å卿 ææ æå¯åå¨åæ æçå¯å卿°ï¼åºå½ä¸º blinkæ æçå¯å卿°ï¼åºå½ä¸º fpæ æçå¯å卿°ï¼åºå½ä¸º pclæ æçå¯åå¨åç§»éæ æçç§»ä½æä½æ°æ æçç§»ä½æä½ç¬¦æ æç大å°ï¼åºå½ä¸º 1ã2ã4 æ 8æ æç大å°ï¼å¼å¿
须为 æ æçç«å³æ°çå¼è·³è½¬æç¤ºæªå¯¹é½è¡å°¾æåå¾å符缺å°â)âç¼ºå° `]'è¯æ³åç¬¦ä¸²ä¸æ²¡æå©è®°ç¬¦ç¼ºå¤±å¯åå¨ä¸å
许è´ç«å³æ°é¢æçè´ææªå¯¹é½çåç§»éåç§»éï¼IPï¼ä¸æ¯åæ³æ ¼å¼æä½æ°ä¸æ¯ 0æä½æ°è¶ç(%ld ä¸å¨ %ld å %ld ä¹é´)æä½æ°è¶ç (%ld ä¸å¨ %ld å %lu ä¹é´)æä½æ°è¶ç(%lu ä¸å¨ %lu å %lu ä¹é´)é¢æä¸º p0-p7å¯åå¨å
ç´ ä¸æ å¯åå¨å¿
é¡»æ¯ BLINKå¯åå¨å¿
é¡»æ¯ GPå¯åå¨å¿
é¡»æ¯ ILINK1å¯åå¨å¿
é¡»æ¯ ILINK2å¯åå¨å¿
é¡»æ¯ PCLå¯åå¨å¿
é¡»æ¯ R0å¯åå¨å¿
é¡»æ¯ R1å¯åå¨å¿
é¡»æ¯ R2å¯åå¨å¿
é¡»æ¯ R3å¯åå¨å¿
é¡»æ¯ SPå¯åå¨å¿
é¡»æ¯ r0-r3 æ r12-r15å¯å卿°å¯å卿°å¿
é¡»æ¯å¶æ°ç§»ä½æä½æ°ç§»ä½éå¿
须为 0 æ 12ç§»ä½éå¿
须为 0 æ 16ç§»ä½éå¿
须为 0 æ 8ç§»ä½éå¿
é¡»æ¯ 16 ç忰颿çç§»ä½æä½ç¬¦é¢æçå æ æéå¯åå¨è¯æ³é误(éè¦å符â%câï¼å¾å°â%câ)è¯æ³é误(éè¦å符â%câï¼å´å°è¾¾æä»¤å°¾)æ æ³å°å½åç®å½åæ¢è³â%sâï¼errno = %s
æªå®ä¹æå¤çå°åååæªç¥æªç¥ 0x%02lxæªç¥ 0x%04lxæªç¥ç约æâ%câæ æ³è¯å«çæä»¤æ ¼å¼æ æ³è¯å«çæä»¤å¼å¿
é¡»æ¯ 16 çåæ°å¼å¿
é¡»å¨ 0 å° 240 çèå´ä¸å¼å¿
é¡»å¨ 0 å° 28 çèå´ä¸å¼å¿
é¡»å¨ 0 å° 31 çèå´ä¸å¼çèå´å¿
é¡»å¨ 1 å° å¼å¿
é¡»æ¯ 2 çåæ°å¼è¶ç 1 - 256vector5 è¶çvector8 è¶çé¢æä¸º z0-z15é¢æä¸º z0-z7