Training courses

Kernel and Embedded Linux

Bootlin training courses

Embedded Linux, kernel,
Yocto Project, Buildroot, real-time,
graphics, boot time, debugging...

Bootlin logo

Elixir Cross Referencer

#as: -32 -EB
#objdump: -dr --prefix-addresses -Mgpr-names=numeric
#name: ULW with relocation operators

.*file format.*

Disassembly of section \.text:
[0-9a-f]+ <[^>]*> lwl	\$1,0\(\$4\)
[0-9a-f]+ <[^>]*> lwr	\$1,3\(\$4\)
[0-9a-f]+ <[^>]*> move	\$4,\$1
[0-9a-f]+ <[^>]*> lwl	\$1,2044\(\$4\)
[0-9a-f]+ <[^>]*> lwr	\$1,2047\(\$4\)
[0-9a-f]+ <[^>]*> move	\$4,\$1
[0-9a-f]+ <[^>]*> lwl	\$1,2045\(\$4\)
[0-9a-f]+ <[^>]*> lwr	\$1,2048\(\$4\)
[0-9a-f]+ <[^>]*> move	\$4,\$1
[0-9a-f]+ <[^>]*> lwl	\$1,2047\(\$4\)
[0-9a-f]+ <[^>]*> lwr	\$1,2050\(\$4\)
[0-9a-f]+ <[^>]*> move	\$4,\$1
[0-9a-f]+ <[^>]*> lwl	\$1,2048\(\$4\)
[0-9a-f]+ <[^>]*> lwr	\$1,2051\(\$4\)
[0-9a-f]+ <[^>]*> move	\$4,\$1
[0-9a-f]+ <[^>]*> lwl	\$1,32764\(\$4\)
[0-9a-f]+ <[^>]*> lwr	\$1,32767\(\$4\)
[0-9a-f]+ <[^>]*> move	\$4,\$1
[0-9a-f]+ <[^>]*> addiu	\$1,\$4,32765
[0-9a-f]+ <[^>]*> lwl	\$4,0\(\$1\)
[0-9a-f]+ <[^>]*> lwr	\$4,3\(\$1\)
[0-9a-f]+ <[^>]*> addiu	\$1,\$4,32767
[0-9a-f]+ <[^>]*> lwl	\$4,0\(\$1\)
[0-9a-f]+ <[^>]*> lwr	\$4,3\(\$1\)
[0-9a-f]+ <[^>]*> li	\$1,0x8000
[0-9a-f]+ <[^>]*> addu	\$1,\$1,\$4
[0-9a-f]+ <[^>]*> lwl	\$4,0\(\$1\)
[0-9a-f]+ <[^>]*> lwr	\$4,3\(\$1\)
#--------------------------------------------------------------------
[0-9a-f]+ <[^>]*> lwl	\$4,0\(\$5\)
[0-9a-f]+ <[^>]*> lwr	\$4,3\(\$5\)
[0-9a-f]+ <[^>]*> lwl	\$4,2044\(\$5\)
[0-9a-f]+ <[^>]*> lwr	\$4,2047\(\$5\)
[0-9a-f]+ <[^>]*> lwl	\$4,2045\(\$5\)
[0-9a-f]+ <[^>]*> lwr	\$4,2048\(\$5\)
[0-9a-f]+ <[^>]*> lwl	\$4,2047\(\$5\)
[0-9a-f]+ <[^>]*> lwr	\$4,2050\(\$5\)
[0-9a-f]+ <[^>]*> lwl	\$4,2048\(\$5\)
[0-9a-f]+ <[^>]*> lwr	\$4,2051\(\$5\)
[0-9a-f]+ <[^>]*> lwl	\$4,32764\(\$5\)
[0-9a-f]+ <[^>]*> lwr	\$4,32767\(\$5\)
[0-9a-f]+ <[^>]*> addiu	\$1,\$5,32765
[0-9a-f]+ <[^>]*> lwl	\$4,0\(\$1\)
[0-9a-f]+ <[^>]*> lwr	\$4,3\(\$1\)
[0-9a-f]+ <[^>]*> addiu	\$1,\$5,32767
[0-9a-f]+ <[^>]*> lwl	\$4,0\(\$1\)
[0-9a-f]+ <[^>]*> lwr	\$4,3\(\$1\)
[0-9a-f]+ <[^>]*> li	\$1,0x8000
[0-9a-f]+ <[^>]*> addu	\$1,\$1,\$5
[0-9a-f]+ <[^>]*> lwl	\$4,0\(\$1\)
[0-9a-f]+ <[^>]*> lwr	\$4,3\(\$1\)
# Would be more efficient to apply the offset to the base register.
[0-9a-f]+ <[^>]*> lui	\$1,0x3
[0-9a-f]+ <[^>]*> ori	\$1,\$1,0x7ffc
[0-9a-f]+ <[^>]*> addu	\$1,\$1,\$5
[0-9a-f]+ <[^>]*> lwl	\$4,0\(\$1\)
[0-9a-f]+ <[^>]*> lwr	\$4,3\(\$1\)
# This one must use LUI/ORI
[0-9a-f]+ <[^>]*> lui	\$1,0x3
[0-9a-f]+ <[^>]*> ori	\$1,\$1,0x7ffd
[0-9a-f]+ <[^>]*> addu	\$1,\$1,\$5
[0-9a-f]+ <[^>]*> lwl	\$4,0\(\$1\)
[0-9a-f]+ <[^>]*> lwr	\$4,3\(\$1\)
# This one must use LUI/ORI
[0-9a-f]+ <[^>]*> lui	\$1,0x3
[0-9a-f]+ <[^>]*> ori	\$1,\$1,0x7fff
[0-9a-f]+ <[^>]*> addu	\$1,\$1,\$5
[0-9a-f]+ <[^>]*> lwl	\$4,0\(\$1\)
[0-9a-f]+ <[^>]*> lwr	\$4,3\(\$1\)
# Would be more efficient to apply the offset to the base register.
[0-9a-f]+ <[^>]*> lui	\$1,0x3
[0-9a-f]+ <[^>]*> ori	\$1,\$1,0x8000
[0-9a-f]+ <[^>]*> addu	\$1,\$1,\$5
[0-9a-f]+ <[^>]*> lwl	\$4,0\(\$1\)
[0-9a-f]+ <[^>]*> lwr	\$4,3\(\$1\)
#--------------------------------------------------------------------
[0-9a-f]+ <[^>]*> li	\$1,0
[ 	]*[0-9a-f]+: R_MIPS_LO16	foo
[0-9a-f]+ <[^>]*> lwl	\$4,0\(\$1\)
[0-9a-f]+ <[^>]*> lwr	\$4,3\(\$1\)
[0-9a-f]+ <[^>]*> li	\$1,0
[ 	]*[0-9a-f]+: R_MIPS_HI16	foo
[0-9a-f]+ <[^>]*> lwl	\$4,0\(\$1\)
[0-9a-f]+ <[^>]*> lwr	\$4,3\(\$1\)
[0-9a-f]+ <[^>]*> lwl	\$4,0\(\$0\)
[ 	]*[0-9a-f]+: R_MIPS_GPREL16	foo
[0-9a-f]+ <[^>]*> lwr	\$4,3\(\$0\)
[ 	]*[0-9a-f]+: R_MIPS_GPREL16	foo
[0-9a-f]+ <[^>]*> li	\$1,-30875
[0-9a-f]+ <[^>]*> lwl	\$4,0\(\$1\)
[0-9a-f]+ <[^>]*> lwr	\$4,3\(\$1\)
[0-9a-f]+ <[^>]*> li	\$1,4661
[0-9a-f]+ <[^>]*> lwl	\$4,0\(\$1\)
[0-9a-f]+ <[^>]*> lwr	\$4,3\(\$1\)
#--------------------------------------------------------------------
[0-9a-f]+ <[^>]*> addiu	\$1,\$4,0
[ 	]*[0-9a-f]+: R_MIPS_LO16	foo
[0-9a-f]+ <[^>]*> lwl	\$4,0\(\$1\)
[0-9a-f]+ <[^>]*> lwr	\$4,3\(\$1\)
[0-9a-f]+ <[^>]*> addiu	\$1,\$4,0
[ 	]*[0-9a-f]+: R_MIPS_HI16	foo
[0-9a-f]+ <[^>]*> lwl	\$4,0\(\$1\)
[0-9a-f]+ <[^>]*> lwr	\$4,3\(\$1\)
[0-9a-f]+ <[^>]*> lwl	\$1,0\(\$4\)
[ 	]*[0-9a-f]+: R_MIPS_GPREL16	foo
[0-9a-f]+ <[^>]*> lwr	\$1,3\(\$4\)
[ 	]*[0-9a-f]+: R_MIPS_GPREL16	foo
[0-9a-f]+ <[^>]*> move	\$4,\$1
#--------------------------------------------------------------------
[0-9a-f]+ <[^>]*> addiu	\$1,\$5,0
[ 	]*[0-9a-f]+: R_MIPS_LO16	foo
[0-9a-f]+ <[^>]*> lwl	\$4,0\(\$1\)
[0-9a-f]+ <[^>]*> lwr	\$4,3\(\$1\)
[0-9a-f]+ <[^>]*> addiu	\$1,\$5,0
[ 	]*[0-9a-f]+: R_MIPS_HI16	foo
[0-9a-f]+ <[^>]*> lwl	\$4,0\(\$1\)
[0-9a-f]+ <[^>]*> lwr	\$4,3\(\$1\)
[0-9a-f]+ <[^>]*> lwl	\$4,0\(\$5\)
[ 	]*[0-9a-f]+: R_MIPS_GPREL16	foo
[0-9a-f]+ <[^>]*> lwr	\$4,3\(\$5\)
[ 	]*[0-9a-f]+: R_MIPS_GPREL16	foo
[0-9a-f]+ <[^>]*> addiu	\$1,\$5,-30875
[0-9a-f]+ <[^>]*> lwl	\$4,0\(\$1\)
[0-9a-f]+ <[^>]*> lwr	\$4,3\(\$1\)
[0-9a-f]+ <[^>]*> addiu	\$1,\$5,4661
[0-9a-f]+ <[^>]*> lwl	\$4,0\(\$1\)
[0-9a-f]+ <[^>]*> lwr	\$4,3\(\$1\)
[0-9a-f]+ <[^>]*> addiu	\$1,\$5,-30875
[ 	]*[0-9a-f]+: R_MIPS_LO16	foo
[0-9a-f]+ <[^>]*> lwl	\$4,0\(\$1\)
[0-9a-f]+ <[^>]*> lwr	\$4,3\(\$1\)
[0-9a-f]+ <[^>]*> addiu	\$1,\$5,4661
[ 	]*[0-9a-f]+: R_MIPS_HI16	foo
[0-9a-f]+ <[^>]*> lwl	\$4,0\(\$1\)
[0-9a-f]+ <[^>]*> lwr	\$4,3\(\$1\)
#pass