Training courses

Kernel and Embedded Linux

Bootlin training courses

Embedded Linux, kernel,
Yocto Project, Buildroot, real-time,
graphics, boot time, debugging...

Bootlin logo

Elixir Cross Referencer

  1
  2
  3
  4
  5
  6
  7
  8
  9
 10
 11
 12
 13
 14
 15
 16
 17
 18
 19
 20
 21
 22
 23
 24
 25
 26
 27
 28
 29
 30
 31
 32
 33
 34
 35
 36
 37
 38
 39
 40
 41
 42
 43
 44
 45
 46
 47
 48
 49
 50
 51
 52
 53
 54
 55
 56
 57
 58
 59
 60
 61
 62
 63
 64
 65
 66
 67
 68
 69
 70
 71
 72
 73
 74
 75
 76
 77
 78
 79
 80
 81
 82
 83
 84
 85
 86
 87
 88
 89
 90
 91
 92
 93
 94
 95
 96
 97
 98
 99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
275
276
277
278
279
280
281
282
283
284
285
286
287
288
289
290
291
292
293
294
295
296
297
298
299
300
301
302
303
304
305
306
307
308
309
310
311
312
313
314
315
316
317
318
319
320
321
322
323
324
325
326
327
328
329
330
331
332
333
334
335
336
337
338
339
340
341
342
343
344
345
346
347
348
349
350
351
352
353
354
355
356
357
358
359
360
361
362
363
364
365
366
367
368
369
370
371
372
373
374
375
376
377
378
379
380
381
382
383
384
385
386
387
388
389
390
391
392
393
394
395
396
397
398
399
400
401
402
403
404
405
406
407
408
409
410
411
412
413
414
415
416
417
418
419
420
421
422
423
424
425
426
427
428
429
430
431
432
433
434
435
436
437
438
439
440
441
442
443
/*	$NetBSD: bus_funcs.h,v 1.5 2018/08/27 16:16:16 riastradh Exp $	*/

/*-
 * Copyright (c) 1996, 1997, 1998, 2001 The NetBSD Foundation, Inc.
 * All rights reserved.
 *
 * This code is derived from software contributed to The NetBSD Foundation
 * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
 * NASA Ames Research Center.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * 1. Redistributions of source code must retain the above copyright
 *    notice, this list of conditions and the following disclaimer.
 * 2. Redistributions in binary form must reproduce the above copyright
 *    notice, this list of conditions and the following disclaimer in the
 *    documentation and/or other materials provided with the distribution.
 *
 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
 * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
 * POSSIBILITY OF SUCH DAMAGE.
 */

/*
 * Copyright (c) 1997-1999, 2001 Eduardo E. Horvath. All rights reserved.
 * Copyright (c) 1996 Charles M. Hannum.  All rights reserved.
 * Copyright (c) 1996 Christopher G. Demetriou.  All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * 1. Redistributions of source code must retain the above copyright
 *    notice, this list of conditions and the following disclaimer.
 * 2. Redistributions in binary form must reproduce the above copyright
 *    notice, this list of conditions and the following disclaimer in the
 *    documentation and/or other materials provided with the distribution.
 * 3. All advertising materials mentioning features or use of this software
 *    must display the following acknowledgement:
 *      This product includes software developed by Christopher G. Demetriou
 *	for the NetBSD Project.
 * 4. The name of the author may not be used to endorse or promote products
 *    derived from this software without specific prior written permission
 *
 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 */

#ifndef _SPARC64_BUS_FUNCS_H_
#define _SPARC64_BUS_FUNCS_H_

#include <sys/cdefs.h>
#include <sys/types.h>
#include <sys/null.h>

#include <machine/bus_defs.h>

struct mbuf;
struct openprom_range;
struct proc;
struct uio;

/*
 * Debug hooks
 */

extern int bus_space_debug;

bus_space_tag_t bus_space_tag_alloc(bus_space_tag_t, void *);
int		bus_space_translate_address_generic(struct openprom_range *,
						    int, bus_addr_t *);

#if 0
/*
 * The following macro could be used to generate the bus_space*() functions
 * but it uses a gcc extension and is ANSI-only.
#define PROTO_bus_space_xxx		(bus_space_tag_t t, ...)
#define RETURNTYPE_bus_space_xxx	void *
#define BUSFUN(name, returntype, t, args...)			\
	static __inline RETURNTYPE_##name			\
	bus_##name PROTO_##name					\
	{							\
		while (t->sparc_##name == NULL)			\
			t = t->parent;				\
		return (*(t)->sparc_##name)(t, args);		\
	}
 */
#endif

/*
 * Bus space function prototypes.
 */
static void	*bus_intr_establish(
				bus_space_tag_t,
				int,			/*bus-specific intr*/
				int,			/*device class level,
							  see machine/intr.h*/
				int (*)(void *),	/*handler*/
				void *);		/*handler arg*/


/* This macro finds the first "upstream" implementation of method `f' */
#define _BS_CALL(t,f)			\
	while (t->f == NULL)		\
		t = t->parent;		\
	return (*(t)->f)

#define _BS_VOID_CALL(t,f)			\
	while (t->f == NULL)		\
		t = t->parent;		\
	(*(t)->f)

static __inline void *
bus_intr_establish(bus_space_tag_t t, int p, int l, int	(*h)(void *), void *a)
{
	_BS_CALL(t, sparc_intr_establish)(t, p, l, h, a, NULL);
}

/* XXXX Things get complicated if we use unmapped register accesses. */
#define	bus_space_vaddr(t, h)	(PHYS_ASI((h)._asi) ? \
			NULL : (void *)(vaddr_t)((h)._ptr))

#define bus_space_barrier(t, h, o, s, f)	\
	sparc_bus_space_barrier((t), (h), (o), (s), (f))

static __inline void
sparc_bus_space_barrier(bus_space_tag_t t, bus_space_handle_t h,
    bus_size_t o, bus_size_t s, int f)
{
	/*
	 * We have a bit of a problem with the bus_space_barrier()
	 * interface.  It defines a read barrier and a write barrier
	 * which really don't map to the 7 different types of memory
	 * barriers in the SPARC v9 instruction set.
	 */
	if (f == BUS_SPACE_BARRIER_READ)
		/* A load followed by a load to the same location? */
		__asm volatile("membar #Lookaside");
	else if (f == BUS_SPACE_BARRIER_WRITE)
		/* A store followed by a store? */
		__asm volatile("membar #StoreStore");
	else 
		/* A store followed by a load? */
		__asm volatile("membar #StoreLoad|#MemIssue|#Lookaside");
}

/*
 *	uintN_t bus_space_read_N(bus_space_tag_t tag,
 *	    bus_space_handle_t bsh, bus_size_t offset);
 *
 * Read a 1, 2, 4, or 8 byte quantity from bus space
 * described by tag/handle/offset.
 */
#ifndef BUS_SPACE_DEBUG
#define	bus_space_read_1(t, h, o)					\
	    (0 ? (t)->type : lduba((h)._ptr + (o), (h)._asi))

#define	bus_space_read_2(t, h, o)					\
	    (0 ? (t)->type : lduha((h)._ptr + (o), (h)._asi))

#define	bus_space_read_4(t, h, o)					\
	    (0 ? (t)->type : lda((h)._ptr + (o), (h)._asi))

#define	bus_space_read_8(t, h, o)					\
	    (0 ? (t)->type : ldxa((h)._ptr + (o), (h)._asi))
#else
#define	bus_space_read_1(t, h, o) ({					\
	uint8_t __bv =							\
	    lduba((h)._ptr + (o), (h)._asi);				\
	if (bus_space_debug & BSDB_ACCESS)				\
	printf("bsr1(%llx + %llx, %x) -> %x\n", (long long)(h)._ptr,	\
		(long long)(o),						\
		(h)._asi, (uint32_t) __bv);				\
	__bv; })

#define	bus_space_read_2(t, h, o) ({					\
	uint16_t __bv =							\
	    lduha((h)._ptr + (o), (h)._asi);				\
	if (bus_space_debug & BSDB_ACCESS)				\
	printf("bsr2(%llx + %llx, %x) -> %x\n", (long long)(h)._ptr,	\
		(long long)(o),						\
		(h)._asi, (uint32_t)__bv);				\
	__bv; })

#define	bus_space_read_4(t, h, o) ({					\
	uint32_t __bv =							\
	    lda((h)._ptr + (o), (h)._asi);				\
	if (bus_space_debug & BSDB_ACCESS)				\
	printf("bsr4(%llx + %llx, %x) -> %x\n", (long long)(h)._ptr,	\
		(long long)(o),						\
		(h)._asi, __bv);					\
	__bv; })

#define	bus_space_read_8(t, h, o) ({					\
	uint64_t __bv =							\
	    ldxa((h)._ptr + (o), (h)._asi);				\
	if (bus_space_debug & BSDB_ACCESS)				\
	printf("bsr8(%llx + %llx, %x) -> %llx\n", (long long)(h)._ptr,	\
		(long long)(o),						\
		(h)._asi, (long long)__bv);				\
	__bv; })
#endif
/*
 *	void bus_space_write_N(bus_space_tag_t tag,
 *	    bus_space_handle_t bsh, bus_size_t offset,
 *	    uintN_t value);
 *
 * Write the 1, 2, 4, or 8 byte value `value' to bus space
 * described by tag/handle/offset.
 */
#ifndef BUS_SPACE_DEBUG
#define	bus_space_write_1(t, h, o, v)					\
	(0 ? (t)->type : ((void)(stba((h)._ptr + (o), (h)._asi, (v)))))

#define	bus_space_write_2(t, h, o, v)					\
	(0 ? (t)->type : ((void)(stha((h)._ptr + (o), (h)._asi, (v)))))

#define	bus_space_write_4(t, h, o, v)					\
	(0 ? (t)->type : ((void)(sta((h)._ptr + (o), (h)._asi, (v)))))

#define	bus_space_write_8(t, h, o, v)					\
	(0 ? (t)->type : ((void)(stxa((h)._ptr + (o), (h)._asi, (v)))))
#else
#define	bus_space_write_1(t, h, o, v) ({				\
	if (bus_space_debug & BSDB_ACCESS)				\
	printf("bsw1(%llx + %llx, %x) <- %x\n", (long long)(h)._ptr,	\
		(long long)(o),						\
		(h)._asi, (uint32_t) v);				\
	((void)(stba((h)._ptr + (o), (h)._asi, (v)))); })

#define	bus_space_write_2(t, h, o, v) ({				\
	if (bus_space_debug & BSDB_ACCESS)				\
	printf("bsw2(%llx + %llx, %x) <- %x\n", (long long)(h)._ptr,	\
		(long long)(o),						\
		(h)._asi, (uint32_t) v);				\
	((void)(stha((h)._ptr + (o), (h)._asi, (v)))); })

#define	bus_space_write_4(t, h, o, v) ({				\
	if (bus_space_debug & BSDB_ACCESS)				\
	printf("bsw4(%llx + %llx, %x) <- %x\n", (long long)(h)._ptr,	\
		(long long)(o),						\
		(h)._asi, (uint32_t) v);				\
	((void)(sta((h)._ptr + (o), (h)._asi, (v)))); })

#define	bus_space_write_8(t, h, o, v) ({				\
	if (bus_space_debug & BSDB_ACCESS)				\
	printf("bsw8(%llx + %llx, %x) <- %llx\n", (long long)(h)._ptr,	\
		(long long)(o),						\
		(h)._asi, (long long) v);				\
	((void)(stxa((h)._ptr + (o), (h)._asi, (v)))); })
#endif
/*
 *	uintN_t bus_space_read_stream_N(bus_space_tag_t tag,
 *	    bus_space_handle_t bsh, bus_size_t offset);
 *
 * Read a 1, 2, 4, or 8 byte quantity from bus space
 * described by tag/handle/offset.
 */
#ifndef BUS_SPACE_DEBUG
#define	bus_space_read_stream_1(t, h, o)				\
	    (0 ? (t)->type : lduba((h)._ptr + (o), (h)._sasi))

#define	bus_space_read_stream_2(t, h, o)				\
	    (0 ? (t)->type : lduha((h)._ptr + (o), (h)._sasi))

#define	bus_space_read_stream_4(t, h, o)				\
	    (0 ? (t)->type : lda((h)._ptr + (o), (h)._sasi))

#define	bus_space_read_stream_8(t, h, o)				\
	    (0 ? (t)->type : ldxa((h)._ptr + (o), (h)._sasi))
#else
#define	bus_space_read_stream_1(t, h, o) ({				\
	uint8_t __bv =							\
	    lduba((h)._ptr + (o), (h)._sasi);				\
	if (bus_space_debug & BSDB_ACCESS)				\
	printf("bsr1(%llx + %llx, %x) -> %x\n", (long long)(h)._ptr,	\
		(long long)(o),						\
		(h)._sasi, (uint32_t) __bv);				\
	__bv; })

#define	bus_space_read_stream_2(t, h, o) ({				\
	uint16_t __bv =							\
	    lduha((h)._ptr + (o), (h)._sasi);				\
	if (bus_space_debug & BSDB_ACCESS)				\
	printf("bsr2(%llx + %llx, %x) -> %x\n", (long long)(h)._ptr,	\
		(long long)(o),						\
		(h)._sasi, (uint32_t)__bv);				\
	__bv; })

#define	bus_space_read_stream_4(t, h, o) ({				\
	uint32_t __bv =							\
	    lda((h)._ptr + (o), (h)._sasi);				\
	if (bus_space_debug & BSDB_ACCESS)				\
	printf("bsr4(%llx + %llx, %x) -> %x\n", (long long)(h)._ptr,	\
		(long long)(o),						\
		(h)._sasi, __bv);					\
	__bv; })

#define	bus_space_read_stream_8(t, h, o) ({				\
	uint64_t __bv =							\
	    ldxa((h)._ptr + (o), (h)._sasi);				\
	if (bus_space_debug & BSDB_ACCESS)				\
	printf("bsr8(%llx + %llx, %x) -> %llx\n", (long long)(h)._ptr,	\
		(long long)(o),						\
		(h)._sasi, (long long)__bv);				\
	__bv; })
#endif
/*
 *	void bus_space_write_stream_N(bus_space_tag_t tag,
 *	    bus_space_handle_t bsh, bus_size_t offset,
 *	    uintN_t value);
 *
 * Write the 1, 2, 4, or 8 byte value `value' to bus space
 * described by tag/handle/offset.
 */
#ifndef BUS_SPACE_DEBUG
#define	bus_space_write_stream_1(t, h, o, v)				\
	(0 ? (t)->type : ((void)(stba((h)._ptr + (o), (h)._sasi, (v)))))

#define	bus_space_write_stream_2(t, h, o, v)				\
	(0 ? (t)->type : ((void)(stha((h)._ptr + (o), (h)._sasi, (v)))))

#define	bus_space_write_stream_4(t, h, o, v)				\
	(0 ? (t)->type : ((void)(sta((h)._ptr + (o), (h)._sasi, (v)))))

#define	bus_space_write_stream_8(t, h, o, v)				\
	(0 ? (t)->type : ((void)(stxa((h)._ptr + (o), (h)._sasi, (v)))))
#else
#define	bus_space_write_stream_1(t, h, o, v) ({				\
	if (bus_space_debug & BSDB_ACCESS)				\
	printf("bsw1(%llx + %llx, %x) <- %x\n", (long long)(h)._ptr,	\
		(long long)(o),						\
		(h)._sasi, (uint32_t) v);				\
	((void)(stba((h)._ptr + (o), (h)._sasi, (v)))); })

#define	bus_space_write_stream_2(t, h, o, v) ({				\
	if (bus_space_debug & BSDB_ACCESS)				\
	printf("bsw2(%llx + %llx, %x) <- %x\n", (long long)(h)._ptr,	\
		(long long)(o),						\
		(h)._sasi, (uint32_t) v);				\
	((void)(stha((h)._ptr + (o), (h)._sasi, (v)))); })

#define	bus_space_write_stream_4(t, h, o, v) ({				\
	if (bus_space_debug & BSDB_ACCESS)				\
	printf("bsw4(%llx + %llx, %x) <- %x\n", (long long)(h)._ptr,	\
		(long long)(o),						\
		(h)._sasi, (uint32_t) v);				\
	((void)(sta((h)._ptr + (o), (h)._sasi, (v)))); })

#define	bus_space_write_stream_8(t, h, o, v) ({				\
	if (bus_space_debug & BSDB_ACCESS)				\
	printf("bsw8(%llx + %llx, %x) <- %llx\n", (long long)(h)._ptr,	\
		(long long)(o),						\
		(h)._sasi, (long long) v);				\
	((void)(stxa((h)._ptr + (o), (h)._sasi, (v)))); })
#endif
/* Forwards needed by prototypes below. */
struct mbuf;
struct uio;

#define	bus_dmamap_create(t, s, n, m, b, f, p)			\
	(*(t)->_dmamap_create)((t), (s), (n), (m), (b), (f), (p))
#define	bus_dmamap_destroy(t, p)				\
	(*(t)->_dmamap_destroy)((t), (p))
#define	bus_dmamap_load(t, m, b, s, p, f)			\
	(*(t)->_dmamap_load)((t), (m), (b), (s), (p), (f))
#define	bus_dmamap_load_mbuf(t, m, b, f)			\
	(*(t)->_dmamap_load_mbuf)((t), (m), (b), (f))
#define	bus_dmamap_load_uio(t, m, u, f)				\
	(*(t)->_dmamap_load_uio)((t), (m), (u), (f))
#define	bus_dmamap_load_raw(t, m, sg, n, s, f)			\
	(*(t)->_dmamap_load_raw)((t), (m), (sg), (n), (s), (f))
#define	bus_dmamap_unload(t, p)					\
	(*(t)->_dmamap_unload)((t), (p))
#define	bus_dmamap_sync(t, p, o, l, ops)			\
	(void)((t)->_dmamap_sync ?				\
	    (*(t)->_dmamap_sync)((t), (p), (o), (l), (ops)) : (void)0)

#define	bus_dmamem_alloc(t, s, a, b, sg, n, r, f)		\
	(*(t)->_dmamem_alloc)((t), (s), (a), (b), (sg), (n), (r), (f))
#define	bus_dmamem_free(t, sg, n)				\
	(*(t)->_dmamem_free)((t), (sg), (n))
#define	bus_dmamem_map(t, sg, n, s, k, f)			\
	(*(t)->_dmamem_map)((t), (sg), (n), (s), (k), (f))
#define	bus_dmamem_unmap(t, k, s)				\
	(*(t)->_dmamem_unmap)((t), (k), (s))
#define	bus_dmamem_mmap(t, sg, n, o, p, f)			\
	(*(t)->_dmamem_mmap)((t), (sg), (n), (o), (p), (f))

#define bus_dmatag_subregion(t, mna, mxa, nt, f) EOPNOTSUPP
#define bus_dmatag_destroy(t) __nothing

#ifdef _SPARC_BUS_DMA_PRIVATE
int	_bus_dmamap_create(bus_dma_tag_t, bus_size_t, int, bus_size_t,
	    bus_size_t, int, bus_dmamap_t *);
void	_bus_dmamap_destroy(bus_dma_tag_t, bus_dmamap_t);
int	_bus_dmamap_load(bus_dma_tag_t, bus_dmamap_t, void *,
	    bus_size_t, struct proc *, int);
int	_bus_dmamap_load_mbuf(bus_dma_tag_t, bus_dmamap_t,
	    struct mbuf *, int);
int	_bus_dmamap_load_uio(bus_dma_tag_t, bus_dmamap_t,
	    struct uio *, int);
int	_bus_dmamap_load_raw(bus_dma_tag_t, bus_dmamap_t,
	    bus_dma_segment_t *, int, bus_size_t, int);
void	_bus_dmamap_unload(bus_dma_tag_t, bus_dmamap_t);
void	_bus_dmamap_sync(bus_dma_tag_t, bus_dmamap_t, bus_addr_t,
	    bus_size_t, int);

int	_bus_dmamem_alloc(bus_dma_tag_t tag, bus_size_t size,
	    bus_size_t alignment, bus_size_t boundary,
	    bus_dma_segment_t *segs, int nsegs, int *rsegs, int flags);
void	_bus_dmamem_free(bus_dma_tag_t tag, bus_dma_segment_t *segs,
	    int nsegs);
int	_bus_dmamem_map(bus_dma_tag_t tag, bus_dma_segment_t *segs,
	    int nsegs, size_t size, void **kvap, int flags);
void	_bus_dmamem_unmap(bus_dma_tag_t tag, void *kva,
	    size_t size);
paddr_t	_bus_dmamem_mmap(bus_dma_tag_t tag, bus_dma_segment_t *segs,
	    int nsegs, off_t off, int prot, int flags);

int	_bus_dmamem_alloc_range(bus_dma_tag_t tag, bus_size_t size,
	    bus_size_t alignment, bus_size_t boundary,
	    bus_dma_segment_t *segs, int nsegs, int *rsegs, int flags,
	    vaddr_t low, vaddr_t high);
#endif /* _SPARC_BUS_DMA_PRIVATE */

#endif /* _SPARC64_BUS_FUNCS_H_ */