Defined in 1 files as a prototype:
Defined in 2 files as a function:
Referenced in 35 files:
- external/apache2/llvm/dist/llvm/lib/CodeGen/GlobalISel/RegisterBankInfo.cpp, line 138
- external/apache2/llvm/dist/llvm/lib/CodeGen/MachineBasicBlock.cpp, line 619
- external/apache2/llvm/dist/llvm/lib/CodeGen/MachineLICM.cpp, line 1345
- external/apache2/llvm/dist/llvm/lib/CodeGen/MachineLoopUtils.cpp, line 67
- external/apache2/llvm/dist/llvm/lib/CodeGen/MachineRegisterInfo.cpp
- external/apache2/llvm/dist/llvm/lib/CodeGen/ModuloSchedule.cpp
- external/apache2/llvm/dist/llvm/lib/CodeGen/OptimizePHIs.cpp, line 181
- external/apache2/llvm/dist/llvm/lib/CodeGen/PeepholeOptimizer.cpp, line 585
- external/apache2/llvm/dist/llvm/lib/CodeGen/RegisterCoalescer.cpp, line 889
- external/apache2/llvm/dist/llvm/lib/CodeGen/SelectionDAG/FastISel.cpp
- external/apache2/llvm/dist/llvm/lib/CodeGen/SelectionDAG/InstrEmitter.cpp
- external/apache2/llvm/dist/llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp, line 537
- external/apache2/llvm/dist/llvm/lib/CodeGen/TailDuplicator.cpp
- external/apache2/llvm/dist/llvm/lib/CodeGen/TargetInstrInfo.cpp
- external/apache2/llvm/dist/llvm/lib/CodeGen/TwoAddressInstructionPass.cpp
- external/apache2/llvm/dist/llvm/lib/CodeGen/UnreachableBlockElim.cpp, line 183
- external/apache2/llvm/dist/llvm/lib/Target/AArch64/AArch64ConditionalCompares.cpp
- external/apache2/llvm/dist/llvm/lib/Target/AArch64/AArch64InstrInfo.cpp
- external/apache2/llvm/dist/llvm/lib/Target/AArch64/AArch64RegisterInfo.cpp, line 559
- external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/R600MachineScheduler.cpp
- external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
- external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/SILowerI1Copies.cpp, line 481
- external/apache2/llvm/dist/llvm/lib/Target/ARM/A15SDOptimizer.cpp, line 640
- external/apache2/llvm/dist/llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp
- external/apache2/llvm/dist/llvm/lib/Target/ARM/ARMBaseRegisterInfo.cpp, line 661
- external/apache2/llvm/dist/llvm/lib/Target/ARM/ARMLoadStoreOptimizer.cpp
- external/apache2/llvm/dist/llvm/lib/Target/ARM/MVETPAndVPTOptimisationsPass.cpp
- external/apache2/llvm/dist/llvm/lib/Target/ARM/Thumb2InstrInfo.cpp
- external/apache2/llvm/dist/llvm/lib/Target/Lanai/LanaiInstrInfo.cpp, line 509
- external/apache2/llvm/dist/llvm/lib/Target/PowerPC/PPCInstrInfo.cpp
- external/apache2/llvm/dist/llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp
- external/apache2/llvm/dist/llvm/lib/Target/PowerPC/PPCVSXFMAMutate.cpp, line 237
- external/apache2/llvm/dist/llvm/lib/Target/SystemZ/SystemZInstrInfo.cpp, line 588
- external/apache2/llvm/dist/llvm/lib/Target/X86/X86FixupSetCC.cpp, line 104
- external/apache2/llvm/dist/llvm/lib/Target/X86/X86InstrInfo.cpp