Defined in 1 files as a prototype:
Defined in 1 files as a member:
Defined in 2 files as a function:
Referenced in 39 files:
- external/apache2/llvm/dist/llvm/lib/CodeGen/EarlyIfConversion.cpp, line 576
- external/apache2/llvm/dist/llvm/lib/CodeGen/GlobalISel/InstructionSelector.cpp, line 70
- external/apache2/llvm/dist/llvm/lib/CodeGen/ImplicitNullChecks.cpp, line 240
- external/apache2/llvm/dist/llvm/lib/CodeGen/LiveRangeShrink.cpp, line 159
- external/apache2/llvm/dist/llvm/lib/CodeGen/MachineCSE.cpp, line 407
- external/apache2/llvm/dist/llvm/lib/CodeGen/MachineInstr.cpp
- external/apache2/llvm/dist/llvm/lib/CodeGen/MachineLICM.cpp, line 897
- external/apache2/llvm/dist/llvm/lib/CodeGen/MachinePipeliner.cpp
- external/apache2/llvm/dist/llvm/lib/CodeGen/PeepholeOptimizer.cpp
- external/apache2/llvm/dist/llvm/lib/CodeGen/ReachingDefAnalysis.cpp, line 543
- external/apache2/llvm/dist/llvm/lib/CodeGen/ScheduleDAGInstrs.cpp, line 544
- external/apache2/llvm/dist/llvm/lib/CodeGen/TargetInstrInfo.cpp, line 946
- external/apache2/llvm/dist/llvm/lib/CodeGen/TwoAddressInstructionPass.cpp
- external/apache2/llvm/dist/llvm/lib/MCA/InstrBuilder.cpp
- external/apache2/llvm/dist/llvm/lib/Target/AArch64/AArch64FrameLowering.cpp, line 3444
- external/apache2/llvm/dist/llvm/lib/Target/AArch64/AArch64InstrInfo.cpp
- external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
- external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/SILoadStoreOptimizer.cpp, line 949
- external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/SIOptimizeExecMaskingPreRA.cpp, line 373
- external/apache2/llvm/dist/llvm/lib/Target/ARC/ARCOptAddrMode.cpp
- external/apache2/llvm/dist/llvm/lib/Target/ARM/ARMLoadStoreOptimizer.cpp, line 2231
- external/apache2/llvm/dist/llvm/lib/Target/ARM/ARMOptimizeBarriersPass.cpp, line 45
- external/apache2/llvm/dist/llvm/lib/Target/Hexagon/HexagonBitSimplify.cpp
- external/apache2/llvm/dist/llvm/lib/Target/Hexagon/HexagonCopyToCombine.cpp, line 255
- external/apache2/llvm/dist/llvm/lib/Target/Hexagon/HexagonEarlyIfConv.cpp, line 690
- external/apache2/llvm/dist/llvm/lib/Target/Hexagon/HexagonExpandCondsets.cpp
- external/apache2/llvm/dist/llvm/lib/Target/Hexagon/HexagonInstrInfo.cpp
- external/apache2/llvm/dist/llvm/lib/Target/Hexagon/HexagonStoreWidening.cpp, line 271
- external/apache2/llvm/dist/llvm/lib/Target/Hexagon/RDFDeadCode.cpp, line 61
- external/apache2/llvm/dist/llvm/lib/Target/Lanai/LanaiDelaySlotFiller.cpp, line 164
- external/apache2/llvm/dist/llvm/lib/Target/Lanai/LanaiInstrInfo.cpp
- external/apache2/llvm/dist/llvm/lib/Target/Mips/MipsDelaySlotFiller.cpp, line 964
- external/apache2/llvm/dist/llvm/lib/Target/PowerPC/PPCInstrInfo.cpp
- external/apache2/llvm/dist/llvm/lib/Target/RISCV/RISCVISelLowering.cpp, line 6388
- external/apache2/llvm/dist/llvm/lib/Target/RISCV/RISCVInstrInfo.cpp
- external/apache2/llvm/dist/llvm/lib/Target/Sparc/DelaySlotFiller.cpp, line 213
- external/apache2/llvm/dist/llvm/lib/Target/SystemZ/SystemZElimCompare.cpp, line 567
- external/apache2/llvm/dist/llvm/lib/Target/WebAssembly/WebAssemblyRegStackify.cpp, line 216
- external/apache2/llvm/dist/llvm/tools/llvm-mca/Views/InstructionInfoView.cpp