Defined in 1 files as a prototype:
Defined in 9 files as a function:
Referenced in 323 files:
- external/apache2/llvm/dist/llvm/include/llvm/CodeGen/GlobalISel/InstructionSelectorImpl.h, line 1068
- external/apache2/llvm/dist/llvm/include/llvm/CodeGen/LiveRangeEdit.h, line 143
- external/apache2/llvm/dist/llvm/include/llvm/CodeGen/MachineOutliner.h, line 140
- external/apache2/llvm/dist/llvm/include/llvm/CodeGen/MachinePipeliner.h, line 516
- external/apache2/llvm/dist/llvm/include/llvm/CodeGen/ModuloSchedule.h, 2 times
- external/apache2/llvm/dist/llvm/include/llvm/Object/ELFTypes.h, line 780
- external/apache2/llvm/dist/llvm/lib/CodeGen/AggressiveAntiDepBreaker.cpp, 2 times
- external/apache2/llvm/dist/llvm/lib/CodeGen/AllocationOrder.cpp, line 34
- external/apache2/llvm/dist/llvm/lib/CodeGen/BranchFolding.cpp, line 186
- external/apache2/llvm/dist/llvm/lib/CodeGen/CalcSpillWeights.cpp, 3 times
- external/apache2/llvm/dist/llvm/lib/CodeGen/CriticalAntiDepBreaker.cpp, 2 times
- external/apache2/llvm/dist/llvm/lib/CodeGen/DeadMachineInstructionElim.cpp, line 121
- external/apache2/llvm/dist/llvm/lib/CodeGen/DetectDeadLanes.cpp, line 573
- external/apache2/llvm/dist/llvm/lib/CodeGen/EarlyIfConversion.cpp, 3 times
- external/apache2/llvm/dist/llvm/lib/CodeGen/ExecutionDomainFix.cpp, line 428
- external/apache2/llvm/dist/llvm/lib/CodeGen/GlobalISel/CSEInfo.cpp, 2 times
- external/apache2/llvm/dist/llvm/lib/CodeGen/GlobalISel/CallLowering.cpp, 3 times
- external/apache2/llvm/dist/llvm/lib/CodeGen/GlobalISel/Combiner.cpp, line 108
- external/apache2/llvm/dist/llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp, 2 times
- external/apache2/llvm/dist/llvm/lib/CodeGen/GlobalISel/GISelKnownBits.cpp, line 31
- external/apache2/llvm/dist/llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp, 2 times
- external/apache2/llvm/dist/llvm/lib/CodeGen/GlobalISel/InlineAsmLowering.cpp, line 124
- external/apache2/llvm/dist/llvm/lib/CodeGen/GlobalISel/InstructionSelect.cpp, line 117
- external/apache2/llvm/dist/llvm/lib/CodeGen/GlobalISel/Legalizer.cpp, line 173
- external/apache2/llvm/dist/llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp, 2 times
- external/apache2/llvm/dist/llvm/lib/CodeGen/GlobalISel/LegalizerInfo.cpp, line 741
- external/apache2/llvm/dist/llvm/lib/CodeGen/GlobalISel/Localizer.cpp, line 41
- external/apache2/llvm/dist/llvm/lib/CodeGen/GlobalISel/MachineIRBuilder.cpp, line 29
- external/apache2/llvm/dist/llvm/lib/CodeGen/GlobalISel/RegBankSelect.cpp, line 85
- external/apache2/llvm/dist/llvm/lib/CodeGen/GlobalISel/RegisterBankInfo.cpp, 2 times
- external/apache2/llvm/dist/llvm/lib/CodeGen/GlobalISel/Utils.cpp, 2 times
- external/apache2/llvm/dist/llvm/lib/CodeGen/IfConversion.cpp, line 455
- external/apache2/llvm/dist/llvm/lib/CodeGen/ImplicitNullChecks.cpp, 2 times
- external/apache2/llvm/dist/llvm/lib/CodeGen/InlineSpiller.cpp, 2 times
- external/apache2/llvm/dist/llvm/lib/CodeGen/LiveDebugVariables.cpp, 2 times
- external/apache2/llvm/dist/llvm/lib/CodeGen/LiveIntervalCalc.cpp, 3 times
- external/apache2/llvm/dist/llvm/lib/CodeGen/LiveIntervals.cpp, line 128
- external/apache2/llvm/dist/llvm/lib/CodeGen/LivePhysRegs.cpp, 4 times
- external/apache2/llvm/dist/llvm/lib/CodeGen/LiveRangeCalc.cpp, line 56
- external/apache2/llvm/dist/llvm/lib/CodeGen/LiveRangeShrink.cpp, line 112
- external/apache2/llvm/dist/llvm/lib/CodeGen/LiveRegUnits.cpp, line 83
- external/apache2/llvm/dist/llvm/lib/CodeGen/LiveVariables.cpp, line 617
- external/apache2/llvm/dist/llvm/lib/CodeGen/LocalStackSlotAllocation.cpp, line 415
- external/apache2/llvm/dist/llvm/lib/CodeGen/MIRCanonicalizerPass.cpp, 3 times
- external/apache2/llvm/dist/llvm/lib/CodeGen/MIRNamerPass.cpp, line 58
- external/apache2/llvm/dist/llvm/lib/CodeGen/MIRParser/MIParser.cpp, 3 times
- external/apache2/llvm/dist/llvm/lib/CodeGen/MIRParser/MIRParser.cpp, 5 times
- external/apache2/llvm/dist/llvm/lib/CodeGen/MIRPrinter.cpp, 3 times
- external/apache2/llvm/dist/llvm/lib/CodeGen/MachineBasicBlock.cpp, 6 times
- external/apache2/llvm/dist/llvm/lib/CodeGen/MachineCSE.cpp, 2 times
- external/apache2/llvm/dist/llvm/lib/CodeGen/MachineCombiner.cpp, line 713
- external/apache2/llvm/dist/llvm/lib/CodeGen/MachineCopyPropagation.cpp, line 896
- external/apache2/llvm/dist/llvm/lib/CodeGen/MachineFrameInfo.cpp, line 124
- external/apache2/llvm/dist/llvm/lib/CodeGen/MachineFunction.cpp, line 636
- external/apache2/llvm/dist/llvm/lib/CodeGen/MachineInstr.cpp, 6 times
- external/apache2/llvm/dist/llvm/lib/CodeGen/MachineLICM.cpp, line 338
- external/apache2/llvm/dist/llvm/lib/CodeGen/MachineLoopInfo.cpp, line 154
- external/apache2/llvm/dist/llvm/lib/CodeGen/MachineOperand.cpp, 6 times
- external/apache2/llvm/dist/llvm/lib/CodeGen/MachineOutliner.cpp, 2 times
- external/apache2/llvm/dist/llvm/lib/CodeGen/MachinePipeliner.cpp, 4 times
- external/apache2/llvm/dist/llvm/lib/CodeGen/MachineSSAUpdater.cpp, line 46
- external/apache2/llvm/dist/llvm/lib/CodeGen/MachineSink.cpp, 3 times
- external/apache2/llvm/dist/llvm/lib/CodeGen/MachineStableHash.cpp, line 66
- external/apache2/llvm/dist/llvm/lib/CodeGen/MachineTraceMetrics.cpp, line 71
- external/apache2/llvm/dist/llvm/lib/CodeGen/MachineVerifier.cpp, line 360
- external/apache2/llvm/dist/llvm/lib/CodeGen/ModuloSchedule.cpp, 2 times
- external/apache2/llvm/dist/llvm/lib/CodeGen/OptimizePHIs.cpp, line 78
- external/apache2/llvm/dist/llvm/lib/CodeGen/PHIElimination.cpp, 3 times
- external/apache2/llvm/dist/llvm/lib/CodeGen/PHIEliminationUtils.cpp, line 40
- external/apache2/llvm/dist/llvm/lib/CodeGen/PeepholeOptimizer.cpp, line 1604
- external/apache2/llvm/dist/llvm/lib/CodeGen/ProcessImplicitDefs.cpp, line 142
- external/apache2/llvm/dist/llvm/lib/CodeGen/PrologEpilogInserter.cpp, 2 times
- external/apache2/llvm/dist/llvm/lib/CodeGen/RDFGraph.cpp, line 896
- external/apache2/llvm/dist/llvm/lib/CodeGen/RegAllocBase.cpp, line 60
- external/apache2/llvm/dist/llvm/lib/CodeGen/RegAllocFast.cpp, line 1517
- external/apache2/llvm/dist/llvm/lib/CodeGen/RegAllocPBQP.cpp, 8 times
- external/apache2/llvm/dist/llvm/lib/CodeGen/RegUsageInfoCollector.cpp, line 102
- external/apache2/llvm/dist/llvm/lib/CodeGen/RegUsageInfoPropagate.cpp, line 67
- external/apache2/llvm/dist/llvm/lib/CodeGen/RegisterClassInfo.cpp, 2 times
- external/apache2/llvm/dist/llvm/lib/CodeGen/RegisterCoalescer.cpp, 2 times
- external/apache2/llvm/dist/llvm/lib/CodeGen/RegisterPressure.cpp, line 274
- external/apache2/llvm/dist/llvm/lib/CodeGen/RegisterScavenging.cpp, 2 times
- external/apache2/llvm/dist/llvm/lib/CodeGen/RenameIndependentSubregs.cpp, line 379
- external/apache2/llvm/dist/llvm/lib/CodeGen/ResetMachineFunctionPass.cpp, line 60
- external/apache2/llvm/dist/llvm/lib/CodeGen/ScheduleDAG.cpp, line 56
- external/apache2/llvm/dist/llvm/lib/CodeGen/SelectionDAG/FastISel.cpp, line 1812
- external/apache2/llvm/dist/llvm/lib/CodeGen/SelectionDAG/FunctionLoweringInfo.cpp, 2 times
- external/apache2/llvm/dist/llvm/lib/CodeGen/SelectionDAG/InstrEmitter.cpp, line 1288
- external/apache2/llvm/dist/llvm/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp, line 325
- external/apache2/llvm/dist/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp, 5 times
- external/apache2/llvm/dist/llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp, 3 times
- external/apache2/llvm/dist/llvm/lib/CodeGen/SplitKit.cpp, 2 times
- external/apache2/llvm/dist/llvm/lib/CodeGen/SwiftErrorValueTracking.cpp, 4 times
- external/apache2/llvm/dist/llvm/lib/CodeGen/TailDuplicator.cpp, line 89
- external/apache2/llvm/dist/llvm/lib/CodeGen/TargetFrameLoweringImpl.cpp, 2 times
- external/apache2/llvm/dist/llvm/lib/CodeGen/TargetInstrInfo.cpp, 7 times
- external/apache2/llvm/dist/llvm/lib/CodeGen/TargetLoweringBase.cpp, 2 times
- external/apache2/llvm/dist/llvm/lib/CodeGen/TargetRegisterInfo.cpp, 3 times
- external/apache2/llvm/dist/llvm/lib/CodeGen/TwoAddressInstructionPass.cpp, line 1521
- external/apache2/llvm/dist/llvm/lib/CodeGen/UnreachableBlockElim.cpp, line 180
- external/apache2/llvm/dist/llvm/lib/CodeGen/VirtRegMap.cpp, 5 times
- external/apache2/llvm/dist/llvm/lib/Target/AArch64/AArch64A57FPLoadBalancing.cpp, 2 times
- external/apache2/llvm/dist/llvm/lib/Target/AArch64/AArch64AdvSIMDScalarPass.cpp, line 398
- external/apache2/llvm/dist/llvm/lib/Target/AArch64/AArch64CleanupLocalDynamicTLSPass.cpp, line 125
- external/apache2/llvm/dist/llvm/lib/Target/AArch64/AArch64CondBrTuning.cpp, line 293
- external/apache2/llvm/dist/llvm/lib/Target/AArch64/AArch64ConditionOptimizer.cpp, line 336
- external/apache2/llvm/dist/llvm/lib/Target/AArch64/AArch64ConditionalCompares.cpp, 2 times
- external/apache2/llvm/dist/llvm/lib/Target/AArch64/AArch64DeadRegisterDefinitionsPass.cpp, line 193
- external/apache2/llvm/dist/llvm/lib/Target/AArch64/AArch64FalkorHWPFFix.cpp, line 709
- external/apache2/llvm/dist/llvm/lib/Target/AArch64/AArch64FrameLowering.cpp, 8 times
- external/apache2/llvm/dist/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp, 3 times
- external/apache2/llvm/dist/llvm/lib/Target/AArch64/AArch64InstrInfo.cpp, 15 times
- external/apache2/llvm/dist/llvm/lib/Target/AArch64/AArch64LoadStoreOptimizer.cpp, 3 times
- external/apache2/llvm/dist/llvm/lib/Target/AArch64/AArch64LowerHomogeneousPrologEpilog.cpp, line 181
- external/apache2/llvm/dist/llvm/lib/Target/AArch64/AArch64RedundantCopyElimination.cpp, line 480
- external/apache2/llvm/dist/llvm/lib/Target/AArch64/AArch64RegisterInfo.cpp, 4 times
- external/apache2/llvm/dist/llvm/lib/Target/AArch64/AArch64SIMDInstrOpt.cpp, 2 times
- external/apache2/llvm/dist/llvm/lib/Target/AArch64/AArch64StackTaggingPreRA.cpp, line 345
- external/apache2/llvm/dist/llvm/lib/Target/AArch64/AArch64StorePairSuppress.cpp, line 128
- external/apache2/llvm/dist/llvm/lib/Target/AArch64/GISel/AArch64CallLowering.cpp, 5 times
- external/apache2/llvm/dist/llvm/lib/Target/AArch64/GISel/AArch64InstructionSelector.cpp, 23 times
- external/apache2/llvm/dist/llvm/lib/Target/AArch64/GISel/AArch64PostSelectOptimize.cpp, line 102
- external/apache2/llvm/dist/llvm/lib/Target/AArch64/GISel/AArch64RegisterBankInfo.cpp, 3 times
- external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp, line 721
- external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/AMDGPUCallLowering.cpp, 9 times
- external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp, line 558
- external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp, line 4106
- external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp, 2 times
- external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/AMDGPUMachineCFGStructurizer.cpp, line 2857
- external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/AMDGPUMacroFusion.cpp, line 44
- external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/AMDGPUPreLegalizerCombiner.cpp, line 122
- external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp, 7 times
- external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/AMDILCFGStructurizer.cpp, 2 times
- external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/GCNDPPCombine.cpp, line 610
- external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/GCNHazardRecognizer.cpp, 9 times
- external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/GCNIterativeScheduler.cpp, line 80
- external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/GCNNSAReassign.cpp, line 232
- external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/GCNRegPressure.cpp, 2 times
- external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/GCNRegPressure.h, 3 times
- external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/R600ISelLowering.cpp, line 267
- external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/R600InstrInfo.cpp, line 1158
- external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/R600OptimizeVectorRegisters.cpp, line 324
- external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/SIFixSGPRCopies.cpp, 3 times
- external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/SIFoldOperands.cpp, 4 times
- external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/SIFormMemoryClauses.cpp, line 269
- external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/SIFrameLowering.cpp, 10 times
- external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/SIISelLowering.cpp, 25 times
- external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/SIInsertWaitcnts.cpp, line 1579
- external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/SIInstrInfo.cpp, 43 times
- external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/SIInstrInfo.h, 2 times
- external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/SILoadStoreOptimizer.cpp, line 2203
- external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/SILowerControlFlow.cpp, line 779
- external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/SILowerI1Copies.cpp, 2 times
- external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/SILowerSGPRSpills.cpp, 4 times
- external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/SIMachineFunctionInfo.cpp, 3 times
- external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/SIOptimizeExecMaskingPreRA.cpp, line 311
- external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/SIPeepholeSDWA.cpp, 2 times
- external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/SIPreAllocateWWMRegs.cpp, line 205
- external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/SIPreEmitPeephole.cpp, line 226
- external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp, 4 times
- external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/SIShrinkInstructions.cpp, line 598
- external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/SIWholeQuadMode.cpp, line 1517
- external/apache2/llvm/dist/llvm/lib/Target/ARC/ARCExpandPseudos.cpp, line 62
- external/apache2/llvm/dist/llvm/lib/Target/ARC/ARCISelLowering.cpp, line 451
- external/apache2/llvm/dist/llvm/lib/Target/ARC/ARCOptAddrMode.cpp, line 493
- external/apache2/llvm/dist/llvm/lib/Target/ARM/A15SDOptimizer.cpp, line 665
- external/apache2/llvm/dist/llvm/lib/Target/ARM/ARMAsmPrinter.cpp, line 1091
- external/apache2/llvm/dist/llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp, 3 times
- external/apache2/llvm/dist/llvm/lib/Target/ARM/ARMBaseRegisterInfo.cpp, 6 times
- external/apache2/llvm/dist/llvm/lib/Target/ARM/ARMCallLowering.cpp, 3 times
- external/apache2/llvm/dist/llvm/lib/Target/ARM/ARMConstantIslandPass.cpp, line 968
- external/apache2/llvm/dist/llvm/lib/Target/ARM/ARMFastISel.cpp, line 2965
- external/apache2/llvm/dist/llvm/lib/Target/ARM/ARMFrameLowering.cpp, 4 times
- external/apache2/llvm/dist/llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp, line 5532
- external/apache2/llvm/dist/llvm/lib/Target/ARM/ARMISelLowering.cpp, 10 times
- external/apache2/llvm/dist/llvm/lib/Target/ARM/ARMInstructionSelector.cpp, line 844
- external/apache2/llvm/dist/llvm/lib/Target/ARM/ARMLoadStoreOptimizer.cpp, 2 times
- external/apache2/llvm/dist/llvm/lib/Target/ARM/ARMLowOverheadLoops.cpp, line 1176
- external/apache2/llvm/dist/llvm/lib/Target/ARM/ARMRegisterBankInfo.cpp, line 230
- external/apache2/llvm/dist/llvm/lib/Target/ARM/MLxExpansionPass.cpp, line 376
- external/apache2/llvm/dist/llvm/lib/Target/ARM/MVETPAndVPTOptimisationsPass.cpp, 3 times
- external/apache2/llvm/dist/llvm/lib/Target/ARM/Thumb1FrameLowering.cpp, 3 times
- external/apache2/llvm/dist/llvm/lib/Target/ARM/Thumb2InstrInfo.cpp, 3 times
- external/apache2/llvm/dist/llvm/lib/Target/ARM/ThumbRegisterInfo.cpp, 2 times
- external/apache2/llvm/dist/llvm/lib/Target/AVR/AVRFrameLowering.cpp, line 502
- external/apache2/llvm/dist/llvm/lib/Target/AVR/AVRISelDAGToDAG.cpp, line 209
- external/apache2/llvm/dist/llvm/lib/Target/AVR/AVRISelLowering.cpp, line 1507
- external/apache2/llvm/dist/llvm/lib/Target/BPF/BPFISelLowering.cpp, 3 times
- external/apache2/llvm/dist/llvm/lib/Target/BPF/BPFMIPeephole.cpp, 2 times
- external/apache2/llvm/dist/llvm/lib/Target/BPF/BPFMISimplifyPatchable.cpp, line 246
- external/apache2/llvm/dist/llvm/lib/Target/Hexagon/BitTracker.cpp, line 188
- external/apache2/llvm/dist/llvm/lib/Target/Hexagon/HexagonBitSimplify.cpp, 3 times
- external/apache2/llvm/dist/llvm/lib/Target/Hexagon/HexagonBlockRanges.cpp, 2 times
- external/apache2/llvm/dist/llvm/lib/Target/Hexagon/HexagonConstExtenders.cpp, line 1976
- external/apache2/llvm/dist/llvm/lib/Target/Hexagon/HexagonConstPropagation.cpp, 2 times
- external/apache2/llvm/dist/llvm/lib/Target/Hexagon/HexagonEarlyIfConv.cpp, line 1058
- external/apache2/llvm/dist/llvm/lib/Target/Hexagon/HexagonExpandCondsets.cpp, line 1260
- external/apache2/llvm/dist/llvm/lib/Target/Hexagon/HexagonFrameLowering.cpp, 5 times
- external/apache2/llvm/dist/llvm/lib/Target/Hexagon/HexagonGenInsert.cpp, line 1518
- external/apache2/llvm/dist/llvm/lib/Target/Hexagon/HexagonGenPredicate.cpp, line 503
- external/apache2/llvm/dist/llvm/lib/Target/Hexagon/HexagonHardwareLoops.cpp, line 386
- external/apache2/llvm/dist/llvm/lib/Target/Hexagon/HexagonISelLowering.cpp, 2 times
- external/apache2/llvm/dist/llvm/lib/Target/Hexagon/HexagonInstrInfo.cpp, 3 times
- external/apache2/llvm/dist/llvm/lib/Target/Hexagon/HexagonNewValueJump.cpp, line 293
- external/apache2/llvm/dist/llvm/lib/Target/Hexagon/HexagonOptAddrMode.cpp, line 785
- external/apache2/llvm/dist/llvm/lib/Target/Hexagon/HexagonPeephole.cpp, line 115
- external/apache2/llvm/dist/llvm/lib/Target/Hexagon/HexagonRDFOpt.cpp, line 296
- external/apache2/llvm/dist/llvm/lib/Target/Hexagon/HexagonRegisterInfo.cpp, line 330
- external/apache2/llvm/dist/llvm/lib/Target/Hexagon/HexagonSplitDouble.cpp, line 1195
- external/apache2/llvm/dist/llvm/lib/Target/Hexagon/HexagonStoreWidening.cpp, 2 times
- external/apache2/llvm/dist/llvm/lib/Target/Hexagon/HexagonVExtract.cpp, line 105
- external/apache2/llvm/dist/llvm/lib/Target/Hexagon/RDFCopy.h, line 29
- external/apache2/llvm/dist/llvm/lib/Target/Lanai/LanaiISelLowering.cpp, 2 times
- external/apache2/llvm/dist/llvm/lib/Target/Lanai/LanaiInstrInfo.cpp, line 497
- external/apache2/llvm/dist/llvm/lib/Target/M68k/M68kFrameLowering.cpp, line 857
- external/apache2/llvm/dist/llvm/lib/Target/M68k/M68kISelLowering.cpp, 5 times
- external/apache2/llvm/dist/llvm/lib/Target/M68k/M68kInstrInfo.cpp, line 804
- external/apache2/llvm/dist/llvm/lib/Target/M68k/M68kRegisterInfo.cpp, line 246
- external/apache2/llvm/dist/llvm/lib/Target/MSP430/MSP430ISelLowering.cpp, 3 times
- external/apache2/llvm/dist/llvm/lib/Target/Mips/Mips16ISelDAGToDAG.cpp, line 72
- external/apache2/llvm/dist/llvm/lib/Target/Mips/MipsCallLowering.cpp, 5 times
- external/apache2/llvm/dist/llvm/lib/Target/Mips/MipsConstantIslandPass.cpp, line 457
- external/apache2/llvm/dist/llvm/lib/Target/Mips/MipsDelaySlotFiller.cpp, line 229
- external/apache2/llvm/dist/llvm/lib/Target/Mips/MipsISelLowering.cpp, 12 times
- external/apache2/llvm/dist/llvm/lib/Target/Mips/MipsInstructionSelector.cpp, line 290
- external/apache2/llvm/dist/llvm/lib/Target/Mips/MipsMachineFunction.cpp, 5 times
- external/apache2/llvm/dist/llvm/lib/Target/Mips/MipsOptimizePICCall.cpp, 2 times
- external/apache2/llvm/dist/llvm/lib/Target/Mips/MipsRegisterBankInfo.cpp, 6 times
- external/apache2/llvm/dist/llvm/lib/Target/Mips/MipsRegisterInfo.cpp, 2 times
- external/apache2/llvm/dist/llvm/lib/Target/Mips/MipsSEFrameLowering.cpp, 2 times
- external/apache2/llvm/dist/llvm/lib/Target/Mips/MipsSEISelDAGToDAG.cpp, line 158
- external/apache2/llvm/dist/llvm/lib/Target/Mips/MipsSEISelLowering.cpp, 15 times
- external/apache2/llvm/dist/llvm/lib/Target/Mips/MipsSEInstrInfo.cpp, line 623
- external/apache2/llvm/dist/llvm/lib/Target/Mips/MipsSERegisterInfo.cpp, line 224
- external/apache2/llvm/dist/llvm/lib/Target/NVPTX/NVPTXAsmPrinter.cpp, line 453
- external/apache2/llvm/dist/llvm/lib/Target/NVPTX/NVPTXFrameLowering.cpp, line 37
- external/apache2/llvm/dist/llvm/lib/Target/NVPTX/NVPTXInstrInfo.cpp, line 36
- external/apache2/llvm/dist/llvm/lib/Target/NVPTX/NVPTXPeephole.cpp, 3 times
- external/apache2/llvm/dist/llvm/lib/Target/NVPTX/NVPTXReplaceImageHandles.cpp, line 134
- external/apache2/llvm/dist/llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp, 4 times
- external/apache2/llvm/dist/llvm/lib/Target/PowerPC/PPCBranchCoalescing.cpp, line 221
- external/apache2/llvm/dist/llvm/lib/Target/PowerPC/PPCBranchSelector.cpp, line 112
- external/apache2/llvm/dist/llvm/lib/Target/PowerPC/PPCFrameLowering.cpp, 4 times
- external/apache2/llvm/dist/llvm/lib/Target/PowerPC/PPCISelLowering.cpp, 14 times
- external/apache2/llvm/dist/llvm/lib/Target/PowerPC/PPCInstrInfo.cpp, 24 times
- external/apache2/llvm/dist/llvm/lib/Target/PowerPC/PPCMIPeephole.cpp, 3 times
- external/apache2/llvm/dist/llvm/lib/Target/PowerPC/PPCReduceCRLogicals.cpp, 2 times
- external/apache2/llvm/dist/llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp, 18 times
- external/apache2/llvm/dist/llvm/lib/Target/PowerPC/PPCVSXCopy.cpp, line 86
- external/apache2/llvm/dist/llvm/lib/Target/PowerPC/PPCVSXFMAMutate.cpp, line 74
- external/apache2/llvm/dist/llvm/lib/Target/PowerPC/PPCVSXSwapRemoval.cpp, line 221
- external/apache2/llvm/dist/llvm/lib/Target/RISCV/RISCVFrameLowering.cpp, 3 times
- external/apache2/llvm/dist/llvm/lib/Target/RISCV/RISCVISelLowering.cpp, 5 times
- external/apache2/llvm/dist/llvm/lib/Target/RISCV/RISCVInstrInfo.cpp, 3 times
- external/apache2/llvm/dist/llvm/lib/Target/RISCV/RISCVMergeBaseOffset.cpp, line 265
- external/apache2/llvm/dist/llvm/lib/Target/RISCV/RISCVRegisterInfo.cpp, line 194
- external/apache2/llvm/dist/llvm/lib/Target/Sparc/DelaySlotFiller.cpp, line 54
- external/apache2/llvm/dist/llvm/lib/Target/Sparc/SparcAsmPrinter.cpp, line 276
- external/apache2/llvm/dist/llvm/lib/Target/Sparc/SparcFrameLowering.cpp, 2 times
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