<?xml version="1.0"?> <!-- Copyright (C) 2007-2020 Free Software Foundation, Inc. Copying and distribution of this file, with or without modification, are permitted in any medium without royalty provided the copyright notice and this notice are preserved. --> <!-- IBM POWER (pre-PowerPC) architecture, user-level view. We only cover user-level SPR's. --> <!DOCTYPE target SYSTEM "gdb-target.dtd"> <target> <architecture>rs6000:6000</architecture> <!-- This description is slightly different from the standard org.gnu.gdb.power.core, to accomodate mq, cnd, and cnt. --> <feature name="org.gnu.gdb.power.core"> <reg name="r0" bitsize="32"/> <reg name="r1" bitsize="32"/> <reg name="r2" bitsize="32"/> <reg name="r3" bitsize="32"/> <reg name="r4" bitsize="32"/> <reg name="r5" bitsize="32"/> <reg name="r6" bitsize="32"/> <reg name="r7" bitsize="32"/> <reg name="r8" bitsize="32"/> <reg name="r9" bitsize="32"/> <reg name="r10" bitsize="32"/> <reg name="r11" bitsize="32"/> <reg name="r12" bitsize="32"/> <reg name="r13" bitsize="32"/> <reg name="r14" bitsize="32"/> <reg name="r15" bitsize="32"/> <reg name="r16" bitsize="32"/> <reg name="r17" bitsize="32"/> <reg name="r18" bitsize="32"/> <reg name="r19" bitsize="32"/> <reg name="r20" bitsize="32"/> <reg name="r21" bitsize="32"/> <reg name="r22" bitsize="32"/> <reg name="r23" bitsize="32"/> <reg name="r24" bitsize="32"/> <reg name="r25" bitsize="32"/> <reg name="r26" bitsize="32"/> <reg name="r27" bitsize="32"/> <reg name="r28" bitsize="32"/> <reg name="r29" bitsize="32"/> <reg name="r30" bitsize="32"/> <reg name="r31" bitsize="32"/> <reg name="pc" bitsize="32" type="code_ptr" regnum="64"/> <reg name="msr" bitsize="32"/> <reg name="cnd" bitsize="32"/> <reg name="lr" bitsize="32" type="code_ptr"/> <reg name="cnt" bitsize="32"/> <reg name="xer" bitsize="32"/> <reg name="mq" bitsize="32"/> </feature> <!-- This description is slightly different from the standard org.gnu.gdb.power.core, to accomodate historical numbering for fpscr. --> <feature name="org.gnu.gdb.power.fpu"> <reg name="f0" bitsize="64" type="ieee_double" regnum="32"/> <reg name="f1" bitsize="64" type="ieee_double"/> <reg name="f2" bitsize="64" type="ieee_double"/> <reg name="f3" bitsize="64" type="ieee_double"/> <reg name="f4" bitsize="64" type="ieee_double"/> <reg name="f5" bitsize="64" type="ieee_double"/> <reg name="f6" bitsize="64" type="ieee_double"/> <reg name="f7" bitsize="64" type="ieee_double"/> <reg name="f8" bitsize="64" type="ieee_double"/> <reg name="f9" bitsize="64" type="ieee_double"/> <reg name="f10" bitsize="64" type="ieee_double"/> <reg name="f11" bitsize="64" type="ieee_double"/> <reg name="f12" bitsize="64" type="ieee_double"/> <reg name="f13" bitsize="64" type="ieee_double"/> <reg name="f14" bitsize="64" type="ieee_double"/> <reg name="f15" bitsize="64" type="ieee_double"/> <reg name="f16" bitsize="64" type="ieee_double"/> <reg name="f17" bitsize="64" type="ieee_double"/> <reg name="f18" bitsize="64" type="ieee_double"/> <reg name="f19" bitsize="64" type="ieee_double"/> <reg name="f20" bitsize="64" type="ieee_double"/> <reg name="f21" bitsize="64" type="ieee_double"/> <reg name="f22" bitsize="64" type="ieee_double"/> <reg name="f23" bitsize="64" type="ieee_double"/> <reg name="f24" bitsize="64" type="ieee_double"/> <reg name="f25" bitsize="64" type="ieee_double"/> <reg name="f26" bitsize="64" type="ieee_double"/> <reg name="f27" bitsize="64" type="ieee_double"/> <reg name="f28" bitsize="64" type="ieee_double"/> <reg name="f29" bitsize="64" type="ieee_double"/> <reg name="f30" bitsize="64" type="ieee_double"/> <reg name="f31" bitsize="64" type="ieee_double"/> <reg name="fpscr" bitsize="32" group="float" regnum="71"/> </feature> </target> |