Training courses

Kernel and Embedded Linux

Bootlin training courses

Embedded Linux, kernel,
Yocto Project, Buildroot, real-time,
graphics, boot time, debugging...

Bootlin logo

Elixir Cross Referencer

Open Menu /external/gpl3/gdb/dist/sim/testsuite/sim/bfin/c_dsp32shift_a0alr.s 
  1
  2
  3
  4
  5
  6
  7
  8
  9
 10
 11
 12
 13
 14
 15
 16
 17
 18
 19
 20
 21
 22
 23
 24
 25
 26
 27
 28
 29
 30
 31
 32
 33
 34
 35
 36
 37
 38
 39
 40
 41
 42
 43
 44
 45
 46
 47
 48
 49
 50
 51
 52
 53
 54
 55
 56
 57
 58
 59
 60
 61
 62
 63
 64
 65
 66
 67
 68
 69
 70
 71
 72
 73
 74
 75
 76
 77
 78
 79
 80
 81
 82
 83
 84
 85
 86
 87
 88
 89
 90
 91
 92
 93
 94
 95
 96
 97
 98
 99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
//Original:/proj/frio/dv/testcases/core/c_dsp32shift_a0alr/c_dsp32shift_a0alr.dsp
// Spec Reference: dsp32shift a0 ashift, lshift, rot
# mach: bfin

.include "testutils.inc"
	start

	R0 = 0;
	ASTAT = R0;

	imm32 r0, 0x11140000;
	imm32 r1, 0x012C003E;
	imm32 r2, 0x81359E24;
	imm32 r3, 0x81459E24;
	imm32 r4, 0xD159E268;
	imm32 r5, 0x51626AF2;
	imm32 r6, 0x9176AF36;
	imm32 r7, 0xE18BFF86;

	R0.L = 0;
	A0 = 0;
	A0.L = R1.L;
	A0.H = R1.H;
	A0 = ASHIFT A0 BY R0.L;	/* a0 = 0x00000000 */
	R2 = A0.w;	/* r5 = 0x00000000 */
	CHECKREG r2, 0x012C003E;

	R1.L = 1;
	A0.L = R2.L;
	A0.H = R2.H;
	A0 = ASHIFT A0 BY R1.L;	/* a0 = 0x00000000 */
	R3 = A0.w;	/* r5 = 0x00000000 */
	CHECKREG r3, 0x0258007C;

	R2.L = 15;
	A0.L = R3.L;
	A0.H = R3.H;
	A0 = ASHIFT A0 BY R2.L;	/* a0 = 0x00000000 */
	R4 = A0.w;	/* r5 = 0x00000000 */
	CHECKREG r4, 0x003E0000;

	R3.L = 31;
	A0.L = R4.L;
	A0.H = R4.H;
	A0 = ASHIFT A0 BY R3.L;	/* a0 = 0x00000000 */
	R5 = A0.w;	/* r5 = 0x00000000 */
	CHECKREG r5, 0x00000000;

	R4.L = -1;
	A0.L = R5.L;
	A0.H = R5.H;
	A0 = ASHIFT A0 BY R4.L;	/* a0 = 0x00000000 */
	R6 = A0.w;	/* r5 = 0x00000000 */
	CHECKREG r6, 0x00000000;

	R5.L = -16;
	A0 = 0;
	A0.L = R6.L;
	A0.H = R6.H;
	A0 = ASHIFT A0 BY R5.L;	/* a0 = 0x00000000 */
	R7 = A0.w;	/* r5 = 0x00000000 */
	CHECKREG r7, 0x00000000;

	R6.L = -31;
	A0.L = R7.L;
	A0.H = R7.H;
	A0 = ASHIFT A0 BY R6.L;	/* a0 = 0x00000000 */
	R0 = A0.w;	/* r5 = 0x00000000 */
	CHECKREG r0, 0x00000000;

	R7.L = -32;
	A0.L = R0.L;
	A0.H = R0.H;
	A0 = ASHIFT A0 BY R7.L;	/* a0 = 0x00000000 */
	R1 = A0.w;	/* r5 = 0x00000000 */
	CHECKREG r1, 0x00000000;

	imm32 r0, 0x12340000;
	imm32 r1, 0x028C003E;
	imm32 r2, 0x82159E24;
	imm32 r3, 0x82159E24;
	imm32 r4, 0xD259E268;
	imm32 r5, 0x52E26AF2;
	imm32 r6, 0x9226AF36;
	imm32 r7, 0xE26BFF86;

	R0.L = 0;
	A0 = 0;
	A0.L = R1.L;
	A0.H = R1.H;
	A0 = LSHIFT A0 BY R0.L;	/* a0 = 0x00000000 */
	R2 = A0.w;	/* r5 = 0x00000000 */
	CHECKREG r2, 0x028C003E;

	R1.L = 1;
	A0.L = R2.L;
	A0.H = R2.H;
	A0 = LSHIFT A0 BY R1.L;	/* a0 = 0x00000000 */
	R3 = A0.w;	/* r5 = 0x00000000 */
	CHECKREG r3, 0x0518007C;

	R2.L = 15;
	A0.L = R3.L;
	A0.H = R3.H;
	A0 = LSHIFT A0 BY R2.L;	/* a0 = 0x00000000 */
	R4 = A0.w;	/* r5 = 0x00000000 */
	CHECKREG r4, 0x003E0000;

	R3.L = 31;
	A0.L = R4.L;
	A0.H = R4.H;
	A0 = LSHIFT A0 BY R3.L;	/* a0 = 0x00000000 */
	R5 = A0.w;	/* r5 = 0x00000000 */
	CHECKREG r5, 0x00000000;

	R4.L = -1;
	A0.L = R5.L;
	A0.H = R5.H;
	A0 = LSHIFT A0 BY R4.L;	/* a0 = 0x00000000 */
	R6 = A0.w;	/* r5 = 0x00000000 */
	CHECKREG r6, 0x00000000;

	R5.L = -16;
	A0 = 0;
	A0.L = R6.L;
	A0.H = R6.H;
	A0 = LSHIFT A0 BY R5.L;	/* a0 = 0x00000000 */
	R7 = A0.w;	/* r5 = 0x00000000 */
	CHECKREG r7, 0x00000000;

	R6.L = -31;
	A0.L = R7.L;
	A0.H = R7.H;
	A0 = LSHIFT A0 BY R6.L;	/* a0 = 0x00000000 */
	R0 = A0.w;	/* r5 = 0x00000000 */
	CHECKREG r0, 0x00000000;

	R7.L = -32;
	A0.L = R0.L;
	A0.H = R0.H;
	A0 = LSHIFT A0 BY R7.L;	/* a0 = 0x00000000 */
	R1 = A0.w;	/* r5 = 0x00000000 */
	CHECKREG r1, 0x00000000;

	imm32 r0, 0x13340000;
	imm32 r1, 0x038C003E;
	imm32 r2, 0x83159E24;
	imm32 r3, 0x83159E24;
	imm32 r4, 0xD359E268;
	imm32 r5, 0x53E26AF2;
	imm32 r6, 0x9326AF36;
	imm32 r7, 0xE36BFF86;

	R0.L = 0;
	A0 = 0;
	A0.L = R1.L;
	A0.H = R1.H;
	A0 = ROT A0 BY R0.L;	/* a0 = 0x00000000 */
	R2 = A0.w;	/* r5 = 0x00000000 */
	CHECKREG r2, 0x038C003E;

	R1.L = 1;
	A0.L = R2.L;
	A0.H = R2.H;
	A0 = ROT A0 BY R1.L;	/* a0 = 0x00000000 */
	R3 = A0.w;	/* r5 = 0x00000000 */
	CHECKREG r3, 0x0718007C;

	R2.L = 15;
	A0.L = R3.L;
	A0.H = R3.H;
	A0 = ROT A0 BY R2.L;	/* a0 = 0x00000000 */
	R4 = A0.w;	/* r5 = 0x00000000 */
	CHECKREG r4, 0x003E0001;

	R3.L = 31;
	A0.L = R4.L;
	A0.H = R4.H;
	A0 = ROT A0 BY R3.L;	/* a0 = 0x00000000 */
	R5 = A0.w;	/* r5 = 0x00000000 */
	CHECKREG r5, 0xE3000F80;

	R4.L = -1;
	A0.L = R5.L;
	A0.H = R5.H;
	A0 = ROT A0 BY R4.L;	/* a0 = 0x00000000 */
	R6 = A0.w;	/* r5 = 0x00000000 */
	CHECKREG r6, 0x718007C0;

	R5.L = -16;
	A0.L = R6.L;
	A0.H = R6.H;
	A0 = ROT A0 BY R5.L;	/* a0 = 0x00000000 */
	R7 = A0.w;	/* r5 = 0x00000000 */
	CHECKREG r7, 0x80007180;

	R6.L = -31;
	A0.L = R7.L;
	A0.H = R7.H;
	A0 = ROT A0 BY R6.L;	/* a0 = 0x00000000 */
	R0 = A0.w;	/* r5 = 0x00000000 */
	CHECKREG r0, 0x01C6001F;

	R7.L = -32;
	A0.L = R0.L;
	A0.H = R0.H;
	A0 = ROT A0 BY R7.L;	/* a0 = 0x00000000 */
	R1 = A0.w;	/* r5 = 0x00000000 */
	CHECKREG r1, 0x8C003E00;

	pass