Defined in 1 files as a prototype:
Defined in 13 files as a macro:
- external/gpl3/binutils/dist/gas/bfin-parse.c, line 751 (as a macro)
- external/gpl3/binutils/dist/gas/bfin-parse.h, line 275 (as a macro)
- external/gpl3/binutils/dist/opcodes/mips-formats.h, line 126 (as a macro)
- external/gpl3/binutils/dist/opcodes/pdp11-dis.c, line 28 (as a macro)
- external/gpl3/gdb/dist/opcodes/mips-formats.h, line 126 (as a macro)
- external/gpl3/gdb/dist/opcodes/pdp11-dis.c, line 28 (as a macro)
- games/battlestar/extern.h, line 185 (as a macro)
- lib/libc/arch/sparc64/SYS.h, line 55 (as a macro)
- lib/libc/arch/sparc64/SYS.h, line 63 (as a macro)
- lib/libc/arch/sparc64/SYS.h, line 67 (as a macro)
- sys/arch/sh3/include/asm.h, line 170 (as a macro)
- sys/arch/sh3/include/asm.h, line 192 (as a macro)
- usr.sbin/gspa/gspa/gsp_inst.c, line 80 (as a macro)
Defined in 119 files as a label:
- external/gpl3/gdb/dist/sim/testsuite/sim/bfin/c_except_sys_sstep.S, line 133 (as a label)
- external/gpl3/gdb/dist/sim/testsuite/sim/bfin/c_except_user_mode.S, line 149 (as a label)
- external/gpl3/gdb/dist/sim/testsuite/sim/bfin/c_interr_disable.S, line 316 (as a label)
- external/gpl3/gdb/dist/sim/testsuite/sim/bfin/c_interr_disable_enable.S, line 337 (as a label)
- external/gpl3/gdb/dist/sim/testsuite/sim/bfin/c_interr_excpt.S, line 132 (as a label)
- external/gpl3/gdb/dist/sim/testsuite/sim/bfin/c_interr_excpt.S, line 152 (as a label)
- external/gpl3/gdb/dist/sim/testsuite/sim/bfin/c_interr_nested.S, line 128 (as a label)
- external/gpl3/gdb/dist/sim/testsuite/sim/bfin/c_interr_nested.S, line 148 (as a label)
- external/gpl3/gdb/dist/sim/testsuite/sim/bfin/c_interr_nmi.S, line 128 (as a label)
- external/gpl3/gdb/dist/sim/testsuite/sim/bfin/c_interr_nmi.S, line 149 (as a label)
- external/gpl3/gdb/dist/sim/testsuite/sim/bfin/c_interr_pending.S, line 317 (as a label)
- external/gpl3/gdb/dist/sim/testsuite/sim/bfin/c_interr_pending_2.S, line 131 (as a label)
- external/gpl3/gdb/dist/sim/testsuite/sim/bfin/c_interr_pending_2.S, line 152 (as a label)
- external/gpl3/gdb/dist/sim/testsuite/sim/bfin/c_interr_timer.S, line 377 (as a label)
- external/gpl3/gdb/dist/sim/testsuite/sim/bfin/c_interr_timer_reload.S, line 279 (as a label)
- external/gpl3/gdb/dist/sim/testsuite/sim/bfin/c_interr_timer_tcount.S, line 235 (as a label)
- external/gpl3/gdb/dist/sim/testsuite/sim/bfin/c_interr_timer_tscale.S, line 297 (as a label)
- external/gpl3/gdb/dist/sim/testsuite/sim/bfin/c_mmr_loop.S, line 127 (as a label)
- external/gpl3/gdb/dist/sim/testsuite/sim/bfin/c_mmr_loop.S, line 151 (as a label)
- external/gpl3/gdb/dist/sim/testsuite/sim/bfin/c_mmr_loop_user_except.S, line 172 (as a label)
- external/gpl3/gdb/dist/sim/testsuite/sim/bfin/c_mmr_ppop_illegal_adr.S, line 129 (as a label)
- external/gpl3/gdb/dist/sim/testsuite/sim/bfin/c_mmr_ppop_illegal_adr.S, line 153 (as a label)
- external/gpl3/gdb/dist/sim/testsuite/sim/bfin/c_mmr_ppopm_illegal_adr.S, line 129 (as a label)
- external/gpl3/gdb/dist/sim/testsuite/sim/bfin/c_mmr_ppopm_illegal_adr.S, line 153 (as a label)
- external/gpl3/gdb/dist/sim/testsuite/sim/bfin/c_mmr_timer.S, line 126 (as a label)
- external/gpl3/gdb/dist/sim/testsuite/sim/bfin/c_mmr_timer.S, line 150 (as a label)
- external/gpl3/gdb/dist/sim/testsuite/sim/bfin/c_mode_supervisor.S, line 126 (as a label)
- external/gpl3/gdb/dist/sim/testsuite/sim/bfin/c_mode_supervisor.S, line 149 (as a label)
- external/gpl3/gdb/dist/sim/testsuite/sim/bfin/c_mode_user.S, line 152 (as a label)
- external/gpl3/gdb/dist/sim/testsuite/sim/bfin/c_mode_user_superivsor.S, line 149 (as a label)
- external/gpl3/gdb/dist/sim/testsuite/sim/bfin/c_progctrl_clisti_interr.S, line 323 (as a label)
- external/gpl3/gdb/dist/sim/testsuite/sim/bfin/c_progctrl_csync_mmr.S, line 129 (as a label)
- external/gpl3/gdb/dist/sim/testsuite/sim/bfin/c_progctrl_csync_mmr.S, line 150 (as a label)
- external/gpl3/gdb/dist/sim/testsuite/sim/bfin/c_progctrl_excpt.S, line 128 (as a label)
- external/gpl3/gdb/dist/sim/testsuite/sim/bfin/c_progctrl_excpt.S, line 149 (as a label)
- external/gpl3/gdb/dist/sim/testsuite/sim/bfin/c_progctrl_raise_rt_i_n.S, line 126 (as a label)
- external/gpl3/gdb/dist/sim/testsuite/sim/bfin/c_progctrl_raise_rt_i_n.S, line 147 (as a label)
- external/gpl3/gdb/dist/sim/testsuite/sim/bfin/c_seq_ac_raise_mv.S, line 128 (as a label)
- external/gpl3/gdb/dist/sim/testsuite/sim/bfin/c_seq_ac_raise_mv.S, line 151 (as a label)
- external/gpl3/gdb/dist/sim/testsuite/sim/bfin/c_seq_ac_raise_mv_ppop.S, line 128 (as a label)
- external/gpl3/gdb/dist/sim/testsuite/sim/bfin/c_seq_ac_raise_mv_ppop.S, line 151 (as a label)
- external/gpl3/gdb/dist/sim/testsuite/sim/bfin/c_seq_ac_regmv_pushpop.S, line 128 (as a label)
- external/gpl3/gdb/dist/sim/testsuite/sim/bfin/c_seq_ac_regmv_pushpop.S, line 151 (as a label)
- external/gpl3/gdb/dist/sim/testsuite/sim/bfin/c_seq_dec_raise_pushpop.S, line 128 (as a label)
- external/gpl3/gdb/dist/sim/testsuite/sim/bfin/c_seq_dec_raise_pushpop.S, line 151 (as a label)
- external/gpl3/gdb/dist/sim/testsuite/sim/bfin/c_seq_ex1_brcc_mv_pop.S, line 128 (as a label)
- external/gpl3/gdb/dist/sim/testsuite/sim/bfin/c_seq_ex1_brcc_mv_pop.S, line 151 (as a label)
- external/gpl3/gdb/dist/sim/testsuite/sim/bfin/c_seq_ex1_call_mv_pop.S, line 128 (as a label)
- external/gpl3/gdb/dist/sim/testsuite/sim/bfin/c_seq_ex1_call_mv_pop.S, line 151 (as a label)
- external/gpl3/gdb/dist/sim/testsuite/sim/bfin/c_seq_ex1_j_mv_pop.S, line 128 (as a label)
- external/gpl3/gdb/dist/sim/testsuite/sim/bfin/c_seq_ex1_j_mv_pop.S, line 151 (as a label)
- external/gpl3/gdb/dist/sim/testsuite/sim/bfin/c_seq_ex1_raise_brcc_mv_pop.S, line 128 (as a label)
- external/gpl3/gdb/dist/sim/testsuite/sim/bfin/c_seq_ex1_raise_brcc_mv_pop.S, line 151 (as a label)
- external/gpl3/gdb/dist/sim/testsuite/sim/bfin/c_seq_ex1_raise_call_mv_pop.S, line 128 (as a label)
- external/gpl3/gdb/dist/sim/testsuite/sim/bfin/c_seq_ex1_raise_call_mv_pop.S, line 151 (as a label)
- external/gpl3/gdb/dist/sim/testsuite/sim/bfin/c_seq_ex1_raise_j_mv_pop.S, line 128 (as a label)
- external/gpl3/gdb/dist/sim/testsuite/sim/bfin/c_seq_ex1_raise_j_mv_pop.S, line 151 (as a label)
- external/gpl3/gdb/dist/sim/testsuite/sim/bfin/c_seq_ex2_brcc_mp_mv_pop.S, line 128 (as a label)
- external/gpl3/gdb/dist/sim/testsuite/sim/bfin/c_seq_ex2_brcc_mp_mv_pop.S, line 151 (as a label)
- external/gpl3/gdb/dist/sim/testsuite/sim/bfin/c_seq_ex2_mmr_mvpop.S, line 128 (as a label)
- external/gpl3/gdb/dist/sim/testsuite/sim/bfin/c_seq_ex2_mmr_mvpop.S, line 151 (as a label)
- external/gpl3/gdb/dist/sim/testsuite/sim/bfin/c_seq_ex2_mmrj_mvpop.S, line 128 (as a label)
- external/gpl3/gdb/dist/sim/testsuite/sim/bfin/c_seq_ex2_mmrj_mvpop.S, line 151 (as a label)
- external/gpl3/gdb/dist/sim/testsuite/sim/bfin/c_seq_ex2_raise_mmr_mvpop.S, line 128 (as a label)
- external/gpl3/gdb/dist/sim/testsuite/sim/bfin/c_seq_ex2_raise_mmr_mvpop.S, line 151 (as a label)
- external/gpl3/gdb/dist/sim/testsuite/sim/bfin/c_seq_ex2_raise_mmrj_mvpop.S, line 128 (as a label)
- external/gpl3/gdb/dist/sim/testsuite/sim/bfin/c_seq_ex2_raise_mmrj_mvpop.S, line 151 (as a label)
- external/gpl3/gdb/dist/sim/testsuite/sim/bfin/c_seq_ex3_ls_brcc_mvp.S, line 128 (as a label)
- external/gpl3/gdb/dist/sim/testsuite/sim/bfin/c_seq_ex3_ls_brcc_mvp.S, line 151 (as a label)
- external/gpl3/gdb/dist/sim/testsuite/sim/bfin/c_seq_ex3_ls_mmr_mvp.S, line 128 (as a label)
- external/gpl3/gdb/dist/sim/testsuite/sim/bfin/c_seq_ex3_ls_mmr_mvp.S, line 151 (as a label)
- external/gpl3/gdb/dist/sim/testsuite/sim/bfin/c_seq_ex3_ls_mmrj_mvp.S, line 128 (as a label)
- external/gpl3/gdb/dist/sim/testsuite/sim/bfin/c_seq_ex3_ls_mmrj_mvp.S, line 151 (as a label)
- external/gpl3/gdb/dist/sim/testsuite/sim/bfin/c_seq_ex3_raise_ls_mmrj_mvp.S, line 128 (as a label)
- external/gpl3/gdb/dist/sim/testsuite/sim/bfin/c_seq_ex3_raise_ls_mmrj_mvp.S, line 151 (as a label)
- external/gpl3/gdb/dist/sim/testsuite/sim/bfin/c_seq_wb_cs_lsmmrj_mvp.S, line 128 (as a label)
- external/gpl3/gdb/dist/sim/testsuite/sim/bfin/c_seq_wb_cs_lsmmrj_mvp.S, line 151 (as a label)
- external/gpl3/gdb/dist/sim/testsuite/sim/bfin/c_seq_wb_raisecs_lsmmrj_mvp.S, line 128 (as a label)
- external/gpl3/gdb/dist/sim/testsuite/sim/bfin/c_seq_wb_raisecs_lsmmrj_mvp.S, line 151 (as a label)
- external/gpl3/gdb/dist/sim/testsuite/sim/bfin/c_seq_wb_rti_lsmmrj_mvp.S, line 128 (as a label)
- external/gpl3/gdb/dist/sim/testsuite/sim/bfin/c_seq_wb_rti_lsmmrj_mvp.S, line 151 (as a label)
- external/gpl3/gdb/dist/sim/testsuite/sim/bfin/c_seq_wb_rtn_lsmmrj_mvp.S, line 128 (as a label)
- external/gpl3/gdb/dist/sim/testsuite/sim/bfin/c_seq_wb_rtn_lsmmrj_mvp.S, line 151 (as a label)
- external/gpl3/gdb/dist/sim/testsuite/sim/bfin/c_seq_wb_rtx_lsmmrj_mvp.S, line 128 (as a label)
- external/gpl3/gdb/dist/sim/testsuite/sim/bfin/c_seq_wb_rtx_lsmmrj_mvp.S, line 151 (as a label)
- external/gpl3/gdb/dist/sim/testsuite/sim/bfin/dbg_jmp_src_kill.S, line 403 (as a label)
- external/gpl3/gdb/dist/sim/testsuite/sim/bfin/dbg_jmp_src_kill.S, line 409 (as a label)
- external/gpl3/gdb/dist/sim/testsuite/sim/bfin/dbg_jmp_src_kill.S, line 416 (as a label)
- external/gpl3/gdb/dist/sim/testsuite/sim/bfin/dbg_jmp_src_kill.S, line 424 (as a label)
- external/gpl3/gdb/dist/sim/testsuite/sim/bfin/dbg_jmp_src_kill.S, line 433 (as a label)
- external/gpl3/gdb/dist/sim/testsuite/sim/bfin/dbg_jmp_src_kill.S, line 443 (as a label)
- external/gpl3/gdb/dist/sim/testsuite/sim/bfin/dbg_jmp_src_kill.S, line 454 (as a label)
- external/gpl3/gdb/dist/sim/testsuite/sim/bfin/dbg_jmp_src_kill.S, line 466 (as a label)
- external/gpl3/gdb/dist/sim/testsuite/sim/bfin/dbg_tr_umode.S, line 132 (as a label)
- external/gpl3/gdb/dist/sim/testsuite/sim/bfin/se_bug_ui.S, line 131 (as a label)
- external/gpl3/gdb/dist/sim/testsuite/sim/bfin/se_bug_ui.S, line 157 (as a label)
- external/gpl3/gdb/dist/sim/testsuite/sim/bfin/se_bug_ui2.S, line 131 (as a label)
- external/gpl3/gdb/dist/sim/testsuite/sim/bfin/se_bug_ui2.S, line 157 (as a label)
- external/gpl3/gdb/dist/sim/testsuite/sim/bfin/se_bug_ui3.S, line 131 (as a label)
- external/gpl3/gdb/dist/sim/testsuite/sim/bfin/se_bug_ui3.S, line 157 (as a label)
- external/gpl3/gdb/dist/sim/testsuite/sim/bfin/se_excpt_dagprotviol.S, line 161 (as a label)
- external/gpl3/gdb/dist/sim/testsuite/sim/bfin/se_excpt_ifprotviol.S, line 161 (as a label)
- external/gpl3/gdb/dist/sim/testsuite/sim/bfin/se_excpt_ssstep.S, line 162 (as a label)
- external/gpl3/gdb/dist/sim/testsuite/sim/bfin/se_illegalcombination.S, line 135 (as a label)
- external/gpl3/gdb/dist/sim/testsuite/sim/bfin/se_illegalcombination.S, line 161 (as a label)
- external/gpl3/gdb/dist/sim/testsuite/sim/bfin/se_misaligned_fetch.S, line 158 (as a label)
- external/gpl3/gdb/dist/sim/testsuite/sim/bfin/se_misaligned_fetch.S, line 174 (as a label)
- external/gpl3/gdb/dist/sim/testsuite/sim/bfin/se_more_ret_haz.S, line 135 (as a label)
- external/gpl3/gdb/dist/sim/testsuite/sim/bfin/se_more_ret_haz.S, line 157 (as a label)
- external/gpl3/gdb/dist/sim/testsuite/sim/bfin/se_ssstep_dagprotviol.S, line 160 (as a label)
- external/gpl3/gdb/dist/sim/testsuite/sim/bfin/se_undefinedinstruction1.S, line 134 (as a label)
- external/gpl3/gdb/dist/sim/testsuite/sim/bfin/se_undefinedinstruction1.S, line 160 (as a label)
- external/gpl3/gdb/dist/sim/testsuite/sim/bfin/se_undefinedinstruction2.S, line 134 (as a label)
- external/gpl3/gdb/dist/sim/testsuite/sim/bfin/se_undefinedinstruction2.S, line 161 (as a label)
- external/gpl3/gdb/dist/sim/testsuite/sim/bfin/se_undefinedinstruction3.S, line 135 (as a label)
- external/gpl3/gdb/dist/sim/testsuite/sim/bfin/se_undefinedinstruction3.S, line 161 (as a label)
- external/gpl3/gdb/dist/sim/testsuite/sim/bfin/se_undefinedinstruction4.S, line 134 (as a label)
- external/gpl3/gdb/dist/sim/testsuite/sim/bfin/se_undefinedinstruction4.S, line 160 (as a label)
- external/gpl3/gdb/dist/sim/testsuite/sim/bfin/se_usermode_protviol.S, line 165 (as a label)
Defined in 4 files as a enumerator:
Referenced in 196 files:
- external/bsd/llvm/dist/llvm/lib/Target/AMDGPU/AMDILCFGStructurizer.cpp, 5 times
- external/bsd/llvm/dist/llvm/lib/Target/AMDGPU/R600ISelLowering.cpp, line 406
- external/bsd/llvm/dist/llvm/lib/Target/AMDGPU/R600InstrInfo.cpp, 8 times
- external/bsd/llvm/dist/llvm/test/MC/Hexagon/not-over.s, line 28
- external/cddl/osnet/dist/uts/common/dtrace/dtrace_xoroshiro128_plus.c, 4 times
- external/gpl3/binutils/dist/gas/bfin-lex.c, line 1564
- external/gpl3/binutils/dist/gas/config/tc-arc.c, 3 times
- external/gpl3/binutils/dist/opcodes/arc-dis.c, line 874
- external/gpl3/binutils/dist/opcodes/arc-tbl.h, 76 times
- external/gpl3/binutils/dist/opcodes/micromips-opc.c, line 175
- external/gpl3/binutils/dist/opcodes/mips-opc.c, line 193
- external/gpl3/binutils/dist/opcodes/mips16-opc.c, line 76
- external/gpl3/binutils/dist/opcodes/pdp11-dis.c, 4 times
- external/gpl3/gcc/dist/gcc/config/arc/arc.c, 3 times
- external/gpl3/gcc/dist/gcc/config/h8300/h8300.h, 3 times
- external/gpl3/gdb/dist/gdb/arc-tdep.c, line 325
- external/gpl3/gdb/dist/opcodes/arc-dis.c, line 874
- external/gpl3/gdb/dist/opcodes/arc-tbl.h, 76 times
- external/gpl3/gdb/dist/opcodes/micromips-opc.c, line 175
- external/gpl3/gdb/dist/opcodes/mips-opc.c, line 193
- external/gpl3/gdb/dist/opcodes/mips16-opc.c, line 76
- external/gpl3/gdb/dist/opcodes/pdp11-dis.c, 4 times
- external/gpl3/gdb/dist/sim/bfin/linux-fixed-code.s, 2 times
- external/gpl3/gdb/dist/sim/testsuite/sim/bfin/10436.s, 2 times
- external/gpl3/gdb/dist/sim/testsuite/sim/bfin/10799.s, line 31
- external/gpl3/gdb/dist/sim/testsuite/sim/bfin/a26.s, 2 times
- external/gpl3/gdb/dist/sim/testsuite/sim/bfin/a4.s, 3 times
- external/gpl3/gdb/dist/sim/testsuite/sim/bfin/abs-2.S, 4 times
- external/gpl3/gdb/dist/sim/testsuite/sim/bfin/abs-3.S, 4 times
- external/gpl3/gdb/dist/sim/testsuite/sim/bfin/abs-4.S, 4 times
- external/gpl3/gdb/dist/sim/testsuite/sim/bfin/abs.S, 4 times
- external/gpl3/gdb/dist/sim/testsuite/sim/bfin/b1.s, 2 times
- external/gpl3/gdb/dist/sim/testsuite/sim/bfin/byteop16m.s, 2 times
- external/gpl3/gdb/dist/sim/testsuite/sim/bfin/byteop16p.s, 2 times
- external/gpl3/gdb/dist/sim/testsuite/sim/bfin/byteop1p.s, line 11
- external/gpl3/gdb/dist/sim/testsuite/sim/bfin/byteop2p.s, line 11
- external/gpl3/gdb/dist/sim/testsuite/sim/bfin/byteop3p.s, line 11
- external/gpl3/gdb/dist/sim/testsuite/sim/bfin/c_br_preg_killed_ac.s, 11 times
- external/gpl3/gdb/dist/sim/testsuite/sim/bfin/c_br_preg_killed_ex1.s, 11 times
- external/gpl3/gdb/dist/sim/testsuite/sim/bfin/c_br_preg_stall_ac.s, 5 times
- external/gpl3/gdb/dist/sim/testsuite/sim/bfin/c_br_preg_stall_ex1.s, 5 times
- external/gpl3/gdb/dist/sim/testsuite/sim/bfin/c_brcc_bp1.s, 6 times
- external/gpl3/gdb/dist/sim/testsuite/sim/bfin/c_brcc_bp2.s, 6 times
- external/gpl3/gdb/dist/sim/testsuite/sim/bfin/c_brcc_bp3.s, 6 times
- external/gpl3/gdb/dist/sim/testsuite/sim/bfin/c_brcc_bp4.s, 6 times
- external/gpl3/gdb/dist/sim/testsuite/sim/bfin/c_brcc_brf_bp.s, 5 times
- external/gpl3/gdb/dist/sim/testsuite/sim/bfin/c_brcc_brf_brt_bp.s, 6 times
- external/gpl3/gdb/dist/sim/testsuite/sim/bfin/c_brcc_brf_brt_nbp.s, 6 times
- external/gpl3/gdb/dist/sim/testsuite/sim/bfin/c_brcc_brf_fbkwd.s, 2 times
- external/gpl3/gdb/dist/sim/testsuite/sim/bfin/c_brcc_brf_nbp.s, 5 times
- external/gpl3/gdb/dist/sim/testsuite/sim/bfin/c_brcc_brt_bp.s, 5 times
- external/gpl3/gdb/dist/sim/testsuite/sim/bfin/c_brcc_brt_nbp.s, 5 times
- external/gpl3/gdb/dist/sim/testsuite/sim/bfin/c_brcc_kills_dhits.s, 21 times
- external/gpl3/gdb/dist/sim/testsuite/sim/bfin/c_brcc_kills_dmiss.s, 21 times
- external/gpl3/gdb/dist/sim/testsuite/sim/bfin/c_cactrl_iflush_pr.s, 2 times
- external/gpl3/gdb/dist/sim/testsuite/sim/bfin/c_cactrl_iflush_pr_pp.s, 2 times
- external/gpl3/gdb/dist/sim/testsuite/sim/bfin/c_calla_ljump.s, 3 times
- external/gpl3/gdb/dist/sim/testsuite/sim/bfin/c_cc_flagdreg_mvbrsft.s, 4 times
- external/gpl3/gdb/dist/sim/testsuite/sim/bfin/c_cc_flagdreg_mvbrsft_s1.s, 4 times
- external/gpl3/gdb/dist/sim/testsuite/sim/bfin/c_cc_flagdreg_mvbrsft_sn.s, 4 times
- external/gpl3/gdb/dist/sim/testsuite/sim/bfin/c_cc_regmvlogi_mvbrsft.s, 4 times
- external/gpl3/gdb/dist/sim/testsuite/sim/bfin/c_cc_regmvlogi_mvbrsft_s1.s, 4 times
- external/gpl3/gdb/dist/sim/testsuite/sim/bfin/c_cc_regmvlogi_mvbrsft_sn.S, 4 times
- external/gpl3/gdb/dist/sim/testsuite/sim/bfin/c_except_illopcode.S, line 73
- external/gpl3/gdb/dist/sim/testsuite/sim/bfin/c_except_sys_sstep.S, 2 times
- external/gpl3/gdb/dist/sim/testsuite/sim/bfin/c_interr_disable.S, 3 times
- external/gpl3/gdb/dist/sim/testsuite/sim/bfin/c_interr_disable_enable.S, 3 times
- external/gpl3/gdb/dist/sim/testsuite/sim/bfin/c_interr_pending.S, 3 times
- external/gpl3/gdb/dist/sim/testsuite/sim/bfin/c_interr_timer.S, 4 times
- external/gpl3/gdb/dist/sim/testsuite/sim/bfin/c_interr_timer_reload.S, line 188
- external/gpl3/gdb/dist/sim/testsuite/sim/bfin/c_interr_timer_tscale.S, 2 times
- external/gpl3/gdb/dist/sim/testsuite/sim/bfin/c_linkage.s, line 41
- external/gpl3/gdb/dist/sim/testsuite/sim/bfin/c_mmr_interr_ctl.s, 2 times
- external/gpl3/gdb/dist/sim/testsuite/sim/bfin/c_progctrl_call_pcpr.s, 2 times
- external/gpl3/gdb/dist/sim/testsuite/sim/bfin/c_progctrl_clisti_interr.S, 3 times
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- games/battlestar/cypher.c, line 558
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