Defined in 4 files as a member:
- external/bsd/llvm/dist/llvm/lib/Transforms/Vectorize/LoopVectorizationPlanner.h, line 193 (as a member)
- external/bsd/llvm/dist/llvm/lib/Transforms/Vectorize/LoopVectorize.cpp, line 697 (as a member)
- external/bsd/llvm/dist/llvm/lib/Transforms/Vectorize/LoopVectorize.cpp, line 1582 (as a member)
- external/bsd/llvm/dist/llvm/lib/Transforms/Vectorize/VPRecipeBuilder.h, line 37 (as a member)
Defined in 3 files as a enumerator:
- external/bsd/llvm/dist/llvm/include/llvm/CodeGen/GlobalISel/LegalizerInfo.h, line 47 (as a enumerator)
- external/bsd/llvm/dist/llvm/include/llvm/CodeGen/MachineOutliner.h, line 33 (as a enumerator)
- external/bsd/llvm/dist/llvm/include/llvm/CodeGen/TargetLowering.h, line 113 (as a enumerator)
Referenced in 43 files:
- external/bsd/llvm/dist/llvm/include/llvm/CodeGen/BasicTTIImpl.h, line 772
- external/bsd/llvm/dist/llvm/include/llvm/CodeGen/GlobalISel/LegalizerInfo.h
- external/bsd/llvm/dist/llvm/include/llvm/CodeGen/MachineOutliner.h, line 33
- external/bsd/llvm/dist/llvm/include/llvm/CodeGen/TargetLowering.h
- external/bsd/llvm/dist/llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp, line 42
- external/bsd/llvm/dist/llvm/lib/CodeGen/GlobalISel/LegalizerInfo.cpp
- external/bsd/llvm/dist/llvm/lib/CodeGen/MachineOutliner.cpp, line 639
- external/bsd/llvm/dist/llvm/lib/CodeGen/RegAllocGreedy.cpp
- external/bsd/llvm/dist/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
- external/bsd/llvm/dist/llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
- external/bsd/llvm/dist/llvm/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp, line 2538
- external/bsd/llvm/dist/llvm/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp
- external/bsd/llvm/dist/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
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- external/bsd/llvm/dist/llvm/lib/Target/AArch64/AArch64InstrInfo.cpp
- external/bsd/llvm/dist/llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp
- external/bsd/llvm/dist/llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
- external/bsd/llvm/dist/llvm/lib/Target/AMDGPU/R600ISelLowering.cpp
- external/bsd/llvm/dist/llvm/lib/Target/AMDGPU/SIISelLowering.cpp
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- external/bsd/llvm/dist/llvm/lib/Target/ARC/ARCISelLowering.cpp
- external/bsd/llvm/dist/llvm/lib/Target/ARM/ARMISelLowering.cpp
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- external/bsd/llvm/dist/llvm/lib/Target/AVR/AVRISelLowering.cpp
- external/bsd/llvm/dist/llvm/lib/Target/Hexagon/HexagonISelLowering.cpp
- external/bsd/llvm/dist/llvm/lib/Target/Hexagon/HexagonISelLoweringHVX.cpp
- external/bsd/llvm/dist/llvm/lib/Target/Lanai/LanaiISelLowering.cpp
- external/bsd/llvm/dist/llvm/lib/Target/MSP430/MSP430ISelLowering.cpp
- external/bsd/llvm/dist/llvm/lib/Target/Mips/MipsISelLowering.cpp
- external/bsd/llvm/dist/llvm/lib/Target/Mips/MipsSEISelLowering.cpp
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- external/bsd/llvm/dist/llvm/lib/Target/NVPTX/NVPTXISelLowering.cpp
- external/bsd/llvm/dist/llvm/lib/Target/PowerPC/PPCISelLowering.cpp
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- external/bsd/llvm/dist/llvm/lib/Target/RISCV/RISCVISelLowering.cpp
- external/bsd/llvm/dist/llvm/lib/Target/Sparc/SparcISelLowering.cpp
- external/bsd/llvm/dist/llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
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- external/bsd/llvm/dist/llvm/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp
- external/bsd/llvm/dist/llvm/lib/Target/X86/X86ISelLowering.cpp
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- external/bsd/llvm/dist/llvm/lib/Target/X86/X86InstrInfo.cpp
- external/bsd/llvm/dist/llvm/lib/Target/X86/X86LegalizerInfo.cpp
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- external/bsd/llvm/dist/llvm/lib/Target/XCore/XCoreISelLowering.cpp, line 111
- external/bsd/llvm/dist/llvm/lib/Transforms/Vectorize/LoopVectorizationPlanner.h
- external/bsd/llvm/dist/llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
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- external/bsd/llvm/dist/llvm/lib/Transforms/Vectorize/VPRecipeBuilder.h
- external/bsd/llvm/dist/llvm/unittests/CodeGen/GlobalISel/LegalizerInfoTest.cpp
- external/bsd/llvm/dist/llvm/utils/TableGen/CodeGenDAGPatterns.cpp
- external/bsd/llvm/dist/llvm/utils/TableGen/CodeGenDAGPatterns.h, line 323