// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
 * Device Tree file for Freescale LS1012A QDS Board.
 *
 * Copyright 2016 Freescale Semiconductor, Inc.
 *
 */
/dts-v1/;

#include "fsl-ls1012a.dtsi"

/ {
	model = "LS1012A QDS Board";
	compatible = "fsl,ls1012a-qds", "fsl,ls1012a";

	sys_mclk: clock-mclk {
		compatible = "fixed-clock";
		#clock-cells = <0>;
		clock-frequency = <24576000>;
	};

	reg_3p3v: regulator-3p3v {
		compatible = "regulator-fixed";
		regulator-name = "3P3V";
		regulator-min-microvolt = <3300000>;
		regulator-max-microvolt = <3300000>;
		regulator-always-on;
	};

	sound {
		compatible = "simple-audio-card";
		simple-audio-card,format = "i2s";
		simple-audio-card,widgets =
			"Microphone", "Microphone Jack",
			"Headphone", "Headphone Jack",
			"Speaker", "Speaker Ext",
			"Line", "Line In Jack";
		simple-audio-card,routing =
			"MIC_IN", "Microphone Jack",
			"Microphone Jack", "Mic Bias",
			"LINE_IN", "Line In Jack",
			"Headphone Jack", "HP_OUT",
			"Speaker Ext", "LINE_OUT";

		simple-audio-card,cpu {
			sound-dai = <&sai2>;
			frame-master;
			bitclock-master;
		};

		simple-audio-card,codec {
			sound-dai = <&codec>;
			frame-master;
			bitclock-master;
			system-clock-frequency = <24576000>;
		};
	};
};

&dspi {
	bus-num = <0>;
	status = "okay";

	flash@0 {
		#address-cells = <1>;
		#size-cells = <1>;
		compatible = "n25q128a11", "jedec,spi-nor";
		reg = <0>;
		spi-max-frequency = <10000000>;
	};

	flash@1 {
		#address-cells = <1>;
		#size-cells = <1>;
		compatible = "sst25wf040b", "jedec,spi-nor";
		spi-cpol;
		spi-cpha;
		reg = <1>;
		spi-max-frequency = <10000000>;
	};

	flash@2 {
		#address-cells = <1>;
		#size-cells = <1>;
		compatible = "en25s64", "jedec,spi-nor";
		spi-cpol;
		spi-cpha;
		reg = <2>;
		spi-max-frequency = <10000000>;
	};
};

&duart0 {
	status = "okay";
};

&esdhc0 {
	status = "okay";
};

&esdhc1 {
	status = "okay";
};

&i2c0 {
	status = "okay";

	pca9547@77 {
		compatible = "nxp,pca9547";
		reg = <0x77>;
		#address-cells = <1>;
		#size-cells = <0>;

		i2c@4 {
			#address-cells = <1>;
			#size-cells = <0>;
			reg = <0x4>;

			codec: sgtl5000@a {
				#sound-dai-cells = <0>;
				compatible = "fsl,sgtl5000";
				reg = <0xa>;
				VDDA-supply = <&reg_3p3v>;
				VDDIO-supply = <&reg_3p3v>;
				clocks = <&sys_mclk>;
			};
		};
	};
};

&sai2 {
	status = "okay";
};

&sata {
	status = "okay";
};