Defined in 12 files as a member:

• external/bsd/llvm/dist/llvm/include/llvm/CodeGen/DFAPacketizer.h, line 82 (as a member)
• external/bsd/llvm/dist/llvm/include/llvm/CodeGen/ResourcePriorityQueue.h, line 63 (as a member)
• external/bsd/llvm/dist/llvm/include/llvm/CodeGen/TargetSchedule.h, line 36 (as a member)
• external/bsd/llvm/dist/llvm/lib/CodeGen/MachinePipeliner.cpp, line 186 (as a member)
• external/bsd/llvm/dist/llvm/lib/CodeGen/MachinePipeliner.cpp, line 1314 (as a member)
• external/bsd/llvm/dist/llvm/lib/CodeGen/SelectionDAG/ScheduleDAGSDNodes.h, line 50 (as a member)
• external/bsd/llvm/dist/llvm/lib/CodeGen/TwoAddressInstructionPass.cpp, line 97 (as a member)
• external/bsd/llvm/dist/llvm/lib/Target/AMDGPU/AMDGPUSubtarget.h, line 969 (as a member)
• external/bsd/llvm/dist/llvm/lib/Target/ARM/ARMSubtarget.h, line 438 (as a member)
• external/bsd/llvm/dist/llvm/lib/Target/Hexagon/HexagonSubtarget.h, line 91 (as a member)
• external/bsd/llvm/dist/llvm/lib/Target/Mips/MipsSubtarget.h, line 197 (as a member)
• external/bsd/llvm/dist/llvm/lib/Target/PowerPC/PPCSubtarget.h, line 84 (as a member)

Referenced in 21 files:

• external/bsd/llvm/dist/llvm/include/llvm/CodeGen/DFAPacketizer.h, line 124
• external/bsd/llvm/dist/llvm/include/llvm/CodeGen/TargetSchedule.h, line 82
• external/bsd/llvm/dist/llvm/include/llvm/MC/MCSubtargetInfo.h, line 160
• external/bsd/llvm/dist/llvm/lib/CodeGen/DFAPacketizer.cpp
  • line 78
  • line 115
  • line 116
• external/bsd/llvm/dist/llvm/lib/CodeGen/MachinePipeliner.cpp
  • line 1317
  • line 1325
  • line 1326
  • line 1345
  • line 1346
• external/bsd/llvm/dist/llvm/lib/CodeGen/PostRASchedulerList.cpp
  • line 213
  • line 217
• external/bsd/llvm/dist/llvm/lib/CodeGen/SelectionDAG/ResourcePriorityQueue.cpp
  • line 45
  • line 312
• external/bsd/llvm/dist/llvm/lib/CodeGen/SelectionDAG/ScheduleDAGSDNodes.cpp
  • line 51
  • line 609
  • line 609
  • line 623
  • line 639
• external/bsd/llvm/dist/llvm/lib/CodeGen/TargetSchedule.cpp
  • line 45
  • line 68
  • line 111
  • line 112
  • line 195
  • line 200
  • line 206
  • line 280
• external/bsd/llvm/dist/llvm/lib/CodeGen/TwoAddressInstructionPass.cpp
  • line 905
  • line 1035
  • line 1665
• external/bsd/llvm/dist/llvm/lib/MC/MCSubtargetInfo.cpp
  • line 117
  • line 118
• external/bsd/llvm/dist/llvm/lib/Target/AMDGPU/AMDGPUSubtarget.cpp, line 425
• external/bsd/llvm/dist/llvm/lib/Target/AMDGPU/AMDGPUSubtarget.h, line 992
• external/bsd/llvm/dist/llvm/lib/Target/ARM/ARMSubtarget.cpp, line 198
• external/bsd/llvm/dist/llvm/lib/Target/ARM/ARMSubtarget.h, line 750
• external/bsd/llvm/dist/llvm/lib/Target/Hexagon/HexagonSubtarget.cpp
  • line 86
  • line 89
  • line 358
  • line 437
• external/bsd/llvm/dist/llvm/lib/Target/Hexagon/HexagonSubtarget.h, line 100
• external/bsd/llvm/dist/llvm/lib/Target/Mips/MipsSubtarget.cpp, line 234
• external/bsd/llvm/dist/llvm/lib/Target/Mips/MipsSubtarget.h, line 375
• external/bsd/llvm/dist/llvm/lib/Target/PowerPC/PPCSubtarget.cpp, line 126
• external/bsd/llvm/dist/llvm/lib/Target/PowerPC/PPCSubtarget.h, line 174