/* $NetBSD: rk3399-rockpro64.dts,v 1.7.2.3 2020/05/18 18:54:30 martin Exp $ */
/*-
* Copyright (c) 2019 Jared McNeill <jmcneill@invisible.ca>
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*/
#include "../../../external/gpl2/dts/dist/arch/arm64/boot/dts/rockchip/rk3399-rockpro64.dts"
#include "rk3399-crypto.dtsi"
/ {
pwm-fan {
compatible = "pwm-fan";
status = "okay";
pwms = <&pwm1 0 40000 0>;
cooling-levels = <0 150 195 240>;
};
vcc3v3_pcie: vcc3v3-pcie-regulator {
compatible = "regulator-fixed";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
enable-active-high;
gpio = <&gpio1 RK_PD0 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&pcie_pwr_en>;
regulator-name = "vcc3v3_pcie";
};
backlight: lcd-backlight {
compatible = "pwm-backlight";
pwms = <&pwm0 0 25000 0>;
brightness-levels = <
0 1 2 3 4 5 6 7
8 9 10 11 12 13 14 15
16 17 18 19 20 21 22 23
24 25 26 27 28 29 30 31
32 33 34 35 36 37 38 39
40 41 42 43 44 45 46 47
48 49 50 51 52 53 54 55
56 57 58 59 60 61 62 63
64 65 66 67 68 69 70 71
72 73 74 75 76 77 78 79
80 81 82 83 84 85 86 87
88 89 90 91 92 93 94 95
96 97 98 99 100 101 102 103
104 105 106 107 108 109 110 111
112 113 114 115 116 117 118 119
120 121 122 123 124 125 126 127
128 129 130 131 132 133 134 135
136 137 138 139 140 141 142 143
144 145 146 147 148 149 150 151
152 153 154 155 156 157 158 159
160 161 162 163 164 165 166 167
168 169 170 171 172 173 174 175
176 177 178 179 180 181 182 183
184 185 186 187 188 189 190 191
192 193 194 195 196 197 198 199
200 201 202 203 204 205 206 207
208 209 210 211 212 213 214 215
216 217 218 219 220 221 222 223
224 225 226 227 228 229 230 231
232 233 234 235 236 237 238 239
240 241 242 243 244 245 246 247
248 249 250 251 252 253 254 255>;
default-brightness-level = <200>;
status = "disabled";
};
edp_panel: edp-panel {
compatible = "simple-panel";
backlight = <&backlight>;
power-supply = <&vcc3v3_s0>;
pinctrl-names = "default";
pinctrl-0 = <&edp_panel_en>;
enable-gpios = <&gpio1 RK_PA0 GPIO_ACTIVE_HIGH>;
prepare-delay-ms = <20>;
enable-delay-ms = <20>;
status = "disabled";
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
#address-cells = <1>;
#size-cells = <0>;
panel_in_edp: endpoint@0 {
reg = <0>;
remote-endpoint = <&edp_out_panel>;
};
};
};
};
edp@ff970000 {
ports {
edp_out: port@1 {
reg = <1>;
#address-cells = <1>;
#size-cells = <0>;
edp_out_panel: endpoint@0 {
reg = <0>;
remote-endpoint = <&panel_in_edp>;
};
};
};
};
#if 0
edp@ff970000 {
status = "okay";
};
edp-panel {
status = "okay";
};
pwm@ff420000 {
status = "okay";
};
lcd-backlight {
status = "okay";
};
#endif
};
&pinctrl {
lcd_panel {
edp_panel_en: edp-panel-en {
rockchip,pins = <1 RK_PA0 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
pcie {
pcie_pwr_en: pcie-pwr-en {
rockchip,pins =
<1 RK_PD0 RK_FUNC_GPIO &pcfg_pull_none>;
};
pcie_clkreqn: pci-clkreqn {
rockchip,pins =
<2 RK_PD2 RK_FUNC_2 &pcfg_pull_none>;
};
};
};
&hdmi_sound {
status = "okay";
};
&pwm1 {
status = "okay";
};
&pcie_phy {
status = "okay";
};
&pcie0 {
ep-gpios = <&gpio2 RK_PD4 GPIO_ACTIVE_HIGH>;
num-lanes = <4>;
max-link-speed = <2>;
pinctrl-names = "default";
pinctrl-0 = <&pcie_clkreqn>;
vpcie3v3-supply = <&vcc3v3_pcie>;
status = "okay";
};