/* $NetBSD: sun8i-h2-plus-bananapi-p2-zero.dts,v 1.1 2019/06/05 03:38:09 thorpej Exp $ */ /*- * Copyright (c) 2019 Jason R. Thorpe * All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * 1. Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * 2. Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF * SUCH DAMAGE. */ /* * Device tree for Banana Pi BPI-P2 Zero. The P2 Zero is essentially an * M2 Zero with the following additions: * * - On-board Ethernet (with PoE capability available as an * optional module). * - On-board eMMC module. */ #include "../../../external/gpl2/dts/dist/arch/arm/boot/dts/sun8i-h2-plus-bananapi-m2-zero.dts" / { model = "Banana Pi BPI-P2-Zero"; compatible = "sinovoip,bpi-p2-zero", "allwinner,sun8i-h2-plus"; aliases { /* ethernet0 is the H3 emac, defined in sun8i-h3.dtsi */ ethernet0 = &emac; }; leds { pwr_led { label = "bananapi-p2-zero:red:pwr"; }; }; }; &emac { phy-handle = <&int_mii_phy>; phy-mode = "mii"; allwinner,leds-active-low; status = "okay"; }; &mmc0 { /* * There seems to be a discrepancy between how the card-detect * signal is wired up between the P2 Zero and the M2 Zero, on * which the P2 Zero is based. * * The M2 Zero device tree file claims that early samples of * the M2 Zero were wired active-low, but that the production * of the board is wired active-high; as such, the M2 Zero * device tree uses an active-high signal for card-detect. * * However, the P2 Zero has been observed in the wild to have * an active-low card-detect signal. I don't know if this is * an early-vs-late situation like the M2 Zero, but for now we * will configure the card-detect signal to active-low to match * known samples of the board that exist in the wild. */ cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>; /* PF6 */ }; &mmc2 { pinctrl-names = "default"; pinctrl-0 = <&mmc2_8bit_pins>; bus-width = <8>; non-removable; status = "okay"; }; |