Defined in 9 files as a macro:
Defined in 3 files as a enumerator:
Referenced in 41 files:
- crypto/external/bsd/heimdal/dist/lib/hcrypto/sha256.c
- crypto/external/bsd/heimdal/dist/lib/hcrypto/sha512.c
- crypto/external/bsd/openssl/dist/crypto/sha/sha512.c
- crypto/external/bsd/openssl/lib/libcrypto/arch/arm/sha512-armv4.S
- external/bsd/llvm/dist/llvm/include/llvm/CodeGen/ISDOpcodes.h, line 380
- external/bsd/llvm/dist/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
- external/bsd/llvm/dist/llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
- external/bsd/llvm/dist/llvm/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp
- external/bsd/llvm/dist/llvm/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp, line 341
- external/bsd/llvm/dist/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
- external/bsd/llvm/dist/llvm/lib/CodeGen/SelectionDAG/SelectionDAGDumper.cpp, line 228
- external/bsd/llvm/dist/llvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp
- external/bsd/llvm/dist/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
- external/bsd/llvm/dist/llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp
- external/bsd/llvm/dist/llvm/lib/Target/AMDGPU/SIISelLowering.cpp, line 411
- external/bsd/llvm/dist/llvm/lib/Target/ARC/ARCISelLowering.cpp, line 105
- external/bsd/llvm/dist/llvm/lib/Target/ARM/ARMISelLowering.cpp
- external/bsd/llvm/dist/llvm/lib/Target/ARM/ARMSelectionDAGInfo.h, line 30
- external/bsd/llvm/dist/llvm/lib/Target/AVR/AVRISelLowering.cpp
- external/bsd/llvm/dist/llvm/lib/Target/BPF/BPFISelLowering.cpp, line 91
- external/bsd/llvm/dist/llvm/lib/Target/Hexagon/HexagonISelLowering.cpp
- external/bsd/llvm/dist/llvm/lib/Target/Lanai/LanaiISelLowering.cpp, line 120
- external/bsd/llvm/dist/llvm/lib/Target/MSP430/MSP430ISelLowering.cpp
- external/bsd/llvm/dist/llvm/lib/Target/Mips/AsmParser/MipsAsmParser.cpp
- external/bsd/llvm/dist/llvm/lib/Target/Mips/Mips16ISelLowering.cpp
- external/bsd/llvm/dist/llvm/lib/Target/Mips/MipsFastISel.cpp, line 1593
- external/bsd/llvm/dist/llvm/lib/Target/Mips/MipsISelLowering.cpp
- external/bsd/llvm/dist/llvm/lib/Target/NVPTX/NVPTXISelLowering.cpp
- external/bsd/llvm/dist/llvm/lib/Target/PowerPC/PPCISelLowering.cpp
- external/bsd/llvm/dist/llvm/lib/Target/RISCV/RISCVISelLowering.cpp, line 103
- external/bsd/llvm/dist/llvm/lib/Target/Sparc/SparcISelLowering.cpp
- external/bsd/llvm/dist/llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
- external/bsd/llvm/dist/llvm/lib/Target/X86/X86ISelLowering.cpp
- external/bsd/llvm/dist/llvm/lib/Target/X86/X86IntrinsicsInfo.h
- external/bsd/llvm/dist/llvm/lib/Target/XCore/XCoreISelLowering.cpp, line 109
- external/gpl3/binutils/dist/gas/rx-parse.c, line 4113
- external/gpl3/binutils/dist/opcodes/nds32-asm.c, line 340
- external/gpl3/binutils/dist/opcodes/nds32-dis.c, line 592
- external/gpl3/gdb/dist/opcodes/nds32-asm.c, line 346
- external/gpl3/gdb/dist/opcodes/nds32-dis.c, line 570
- external/gpl3/gdb/dist/sim/common/sim-n-bits.h, line 49