Defined in 1 files as a variable:
Defined in 1 files as a typedef:
Defined in 1 files as a struct:
Defined in 2 files as a member:
Defined in 7 files as a macro:
Defined in 1 files as a externvar:
Referenced in 60 files:
- bin/pax/options.c
- bin/pax/options.h
- external/bsd/llvm/dist/clang/lib/Analysis/LiveVariables.cpp
- external/bsd/llvm/dist/clang/test/CXX/special/class.dtor/p3-0x.cpp
- external/bsd/llvm/dist/clang/test/Sema/attr-mode.c
- external/bsd/llvm/dist/llvm/include/llvm/CodeGen/SelectionDAGNodes.h
- external/bsd/llvm/dist/llvm/lib/CodeGen/IfConversion.cpp
- external/bsd/llvm/dist/llvm/lib/CodeGen/MIRParser/MIParser.cpp
- external/bsd/llvm/dist/llvm/lib/CodeGen/MachineOperand.cpp
- external/bsd/llvm/dist/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
- external/bsd/llvm/dist/llvm/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp
- external/bsd/llvm/dist/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
- external/bsd/llvm/dist/llvm/lib/CodeGen/SelectionDAG/SelectionDAGDumper.cpp
- external/bsd/llvm/dist/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
- external/bsd/llvm/dist/llvm/lib/Target/AArch64/AArch64InstrInfo.cpp
- external/bsd/llvm/dist/llvm/lib/Target/AArch64/AArch64InstrInfo.h, line 231
- external/bsd/llvm/dist/llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
- external/bsd/llvm/dist/llvm/lib/Target/AMDGPU/SIInstrInfo.h, line 848
- external/bsd/llvm/dist/llvm/lib/Target/ARM/ARMAsmPrinter.cpp
- external/bsd/llvm/dist/llvm/lib/Target/ARM/ARMExpandPseudoInsts.cpp
- external/bsd/llvm/dist/llvm/lib/Target/ARM/ARMFastISel.cpp
- external/bsd/llvm/dist/llvm/lib/Target/ARM/ARMInstrInfo.cpp
- external/bsd/llvm/dist/llvm/lib/Target/ARM/ARMInstrInfo.h, line 42
- external/bsd/llvm/dist/llvm/lib/Target/AVR/AVRExpandPseudoInsts.cpp
- external/bsd/llvm/dist/llvm/lib/Target/AVR/AVRMCInstLower.cpp
- external/bsd/llvm/dist/llvm/lib/Target/Hexagon/HexagonConstExtenders.cpp
- external/bsd/llvm/dist/llvm/lib/Target/Hexagon/HexagonISelLowering.cpp
- external/bsd/llvm/dist/llvm/lib/Target/Hexagon/HexagonInstrInfo.cpp
- external/bsd/llvm/dist/llvm/lib/Target/Hexagon/HexagonInstrInfo.h, line 326
- external/bsd/llvm/dist/llvm/lib/Target/Lanai/LanaiInstrInfo.cpp
- external/bsd/llvm/dist/llvm/lib/Target/Lanai/LanaiInstrInfo.h, line 80
- external/bsd/llvm/dist/llvm/lib/Target/Mips/MipsInstrInfo.cpp
- external/bsd/llvm/dist/llvm/lib/Target/Mips/MipsInstrInfo.h, line 160
- external/bsd/llvm/dist/llvm/lib/Target/PowerPC/PPCISelLowering.cpp
- external/bsd/llvm/dist/llvm/lib/Target/PowerPC/PPCInstrInfo.cpp
- external/bsd/llvm/dist/llvm/lib/Target/PowerPC/PPCInstrInfo.h, line 329
- external/bsd/llvm/dist/llvm/lib/Target/Sparc/SparcAsmPrinter.cpp
- external/bsd/llvm/dist/llvm/lib/Target/Sparc/SparcISelLowering.cpp
- external/bsd/llvm/dist/llvm/lib/Target/Sparc/SparcISelLowering.h, line 180
- external/bsd/llvm/dist/llvm/lib/Target/X86/X86ISelLowering.cpp
- external/bsd/llvm/dist/llvm/lib/Target/X86/X86InstrInfo.cpp
- external/bsd/llvm/dist/llvm/lib/Target/X86/X86InstrInfo.h, line 542
- external/gpl3/binutils/dist/opcodes/ia64-opc-i.c
- external/gpl3/gcc/dist/gcc/config/s390/s390.c, line 4276
- external/gpl3/gcc/dist/gcc/cp/cp-tree.h
- external/gpl3/gcc/dist/libgcc/config/libbid/bid_gcc_intrinsics.h, line 62
- external/gpl3/gcc/dist/libgcc/dfp-bit.h, line 535
- external/gpl3/gcc/dist/libgcc/floatunsitf.c, line 4
- external/gpl3/gcc/dist/libgcc/fp-bit.h, line 95
- external/gpl3/gcc/dist/libgcc/libgcc2.h, line 159
- external/gpl3/gcc/dist/libgcc/soft-fp/quad.h, line 72
- external/gpl3/gdb/dist/gdb/gdbserver/tracepoint.c
- external/gpl3/gdb/dist/opcodes/ia64-opc-i.c
- external/gpl3/gdb/dist/sim/common/cgen-fpu.h
- external/gpl3/gdb/dist/sim/common/cgen-mem.h
- external/gpl3/gdb/dist/sim/common/cgen-ops.h
- external/lgpl3/mpfr/dist/tests/troot.c
- sys/arch/sh3/sh3/db_interface.c
- usr.sbin/lpr/lpd/printjob.c
- usr.sbin/makefs/cd9660/iso9660_rrip.c