Defined in 1 files as a function:

• external/bsd/llvm/dist/llvm/include/llvm/CodeGen/MachineOperand.h, line 500 (as a function)

Referenced in 28 files:

• external/bsd/llvm/dist/llvm/lib/CodeGen/BranchFolding.cpp, line 875
• external/bsd/llvm/dist/llvm/lib/CodeGen/DetectDeadLanes.cpp
  • line 555
  • line 559
• external/bsd/llvm/dist/llvm/lib/CodeGen/InlineSpiller.cpp, line 535
• external/bsd/llvm/dist/llvm/lib/CodeGen/MachineInstr.cpp, line 1704
• external/bsd/llvm/dist/llvm/lib/CodeGen/MachineOperand.cpp, line 91
• external/bsd/llvm/dist/llvm/lib/CodeGen/PeepholeOptimizer.cpp
  • line 592
  • line 1242
• external/bsd/llvm/dist/llvm/lib/CodeGen/ProcessImplicitDefs.cpp
  • line 83
  • line 111
• external/bsd/llvm/dist/llvm/lib/CodeGen/RegisterCoalescer.cpp
  • line 1194
  • line 1259
  • line 1351
  • line 1482
  • line 1493
  • line 1514
  • line 1575
  • line 2776
• external/bsd/llvm/dist/llvm/lib/CodeGen/RenameIndependentSubregs.cpp, line 357
• external/bsd/llvm/dist/llvm/lib/CodeGen/ScheduleDAGInstrs.cpp, line 386
• external/bsd/llvm/dist/llvm/lib/CodeGen/TargetInstrInfo.cpp
  • line 218
  • line 219
• external/bsd/llvm/dist/llvm/lib/CodeGen/TwoAddressInstructionPass.cpp
  • line 1762
  • line 1839
• external/bsd/llvm/dist/llvm/lib/CodeGen/VirtRegMap.cpp
  • line 549
  • line 560
• external/bsd/llvm/dist/llvm/lib/Target/AArch64/AArch64InstrInfo.cpp, line 3181
• external/bsd/llvm/dist/llvm/lib/Target/AMDGPU/GCNIterativeScheduler.cpp, line 394
• external/bsd/llvm/dist/llvm/lib/Target/AMDGPU/GCNSchedStrategy.cpp, line 393
• external/bsd/llvm/dist/llvm/lib/Target/AMDGPU/SIFoldOperands.cpp, line 206
• external/bsd/llvm/dist/llvm/lib/Target/AMDGPU/SIISelLowering.cpp
  • line 2813
  • line 2946
  • line 2957
  • line 3354
• external/bsd/llvm/dist/llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
  • line 1708
  • line 1761
• external/bsd/llvm/dist/llvm/lib/Target/AMDGPU/SIPeepholeSDWA.cpp, line 278
• external/bsd/llvm/dist/llvm/lib/Target/AMDGPU/SIShrinkInstructions.cpp, line 191
• external/bsd/llvm/dist/llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp, line 1516
• external/bsd/llvm/dist/llvm/lib/Target/ARM/ARMLoadStoreOptimizer.cpp, line 935
• external/bsd/llvm/dist/llvm/lib/Target/Hexagon/HexagonOptAddrMode.cpp, line 423
• external/bsd/llvm/dist/llvm/lib/Target/PowerPC/PPCVSXFMAMutate.cpp
  • line 257
  • line 258
  • line 268
  • line 273
• external/bsd/llvm/dist/llvm/lib/Target/X86/X86ISelLowering.cpp
  • line 28581
  • line 28584
• external/bsd/llvm/dist/llvm/lib/Target/X86/X86InstrInfo.cpp
  • line 1092
  • line 1093
  • line 1113
  • line 1114
• external/bsd/llvm/dist/llvm/unittests/MI/LiveIntervalTest.cpp, line 375