.\"	$NetBSD: elansc.4,v 1.15 2017/02/18 22:39:01 wiz Exp $
.\"
.\" Copyright (c) 2002 The NetBSD Foundation, Inc.
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.\" This code is derived from software contributed to The NetBSD Foundation
.\" by Jason R. Thorpe.
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.Dd February 17, 2017
.Dt ELANSC 4 i386
.Os
.Sh NAME
.Nm elansc
.Nd AMD Elan SC520 System Controller driver
.Sh SYNOPSIS
.Cd "elansc* at mainbus? bus ?"
.Cd "gpio* at elansc?"
.Cd "pci* at elansc?"
.Cd "elanpar* at elansc?"
.Cd "elanpex* at elansc?"
.Sh DESCRIPTION
The
.Nm
driver supports the system controller of the AMD Elan SC520 microcontroller.
The SC520 consists of an AMD Am5x86 processor core, integrated PCI host
controller, and several standard on-chip devices, such as NS16550-compatible
UARTs, real-time clock, and timers.
.Pp
The Elan SC520 also provides several special on-chip devices.
The following are supported by the
.Nm
driver:
.Bl -bullet
.It
Watchdog timer.
The watchdog timer may be configured for a 1
second, 2 second, 4 second, 8 second, 16 second, or 32 second
expiration period.
.It
PCI exceptions reporting.
The SC520 microcontroller can report exceptions that occur as it
acts as both a PCI bus master and a bus target.
See
.Xr i386/elanpex 4 .
.It
RAM write-protection.
The SC520 microcontroller can designate write-protected regions of RAM using
the Programmable Address Regions registers.
See
.Xr i386/elanpar 4 .
.It
Programmable Input/Output.
The SC520 microcontroller supports 32 programmable I/O signals (PIOs)
that can be used on the system board to monitor signals or control devices
that are not handled by the other functions in the SC520 microcontroller.
These signals can be programmed to be inputs or to be driven
.Dq high
or
.Dq low
as outputs.
Pins can be accessed through the
.Xr gpio 4
framework.
The
.Xr gpioctl 8
program allows easy manipulation of pins from userland.
.It
PCI host-bridge optimization.
.Nm
takes advantage of a suspend/resume cycle to tune the PCI host-bridge
for higher performance.
.El
.Sh SEE ALSO
.Xr gpio 4 ,
.Xr i386/elanpar 4 ,
.Xr i386/elanpex 4 ,
.Xr gpioctl 8 ,
.Xr wdogctl 8
.Sh HISTORY
The
.Nm
device first appeared in
.Nx 2.0 .
PIO function support was added in
.Ox 3.6 ,
and subsequently ported to
.Nx 4.0 .
Support for PCI exceptions reporting and for RAM write-protection
first appeared in
.Nx 5.0 .
.Sh AUTHORS
The
.Nm
driver was written by
.An Jason R. Thorpe Aq Mt thorpej@NetBSD.org .
.An Jasper Wallace
provided the work-around for a hardware bug related to the watchdog timer
in some steppings of the SC520 CPU.
Support for the PIO function was added to
.Ox 3.6
by
.An Alexander Yurchenko Aq Mt grange@openbsd.org
and was ported to
.Nx
by
.An Jeff Rizzo Aq Mt riz@NetBSD.org .
.An David Young Aq Mt dyoung@NetBSD.org
added support for PCI exceptions reporting and for RAM write-protection
using the Programmable Address Regions.