Defined in 9 files as a function:
Referenced in 51 files:
- external/bsd/llvm/dist/llvm/include/llvm/CodeGen/MachineInstrBuilder.h, line 268
- external/bsd/llvm/dist/llvm/include/llvm/ExecutionEngine/Orc/OrcRemoteTargetRPCAPI.h, line 91
- external/bsd/llvm/dist/llvm/lib/CodeGen/MachineOperand.cpp
- external/bsd/llvm/dist/llvm/lib/CodeGen/SelectionDAG/InstrEmitter.cpp
- external/bsd/llvm/dist/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
- external/bsd/llvm/dist/llvm/lib/CodeGen/SelectionDAG/SelectionDAGDumper.cpp
- external/bsd/llvm/dist/llvm/lib/ExecutionEngine/RuntimeDyld/Targets/RuntimeDyldMachOARM.h
- external/bsd/llvm/dist/llvm/lib/Target/AArch64/AArch64AsmPrinter.cpp, line 273
- external/bsd/llvm/dist/llvm/lib/Target/AArch64/AArch64CollectLOH.cpp
- external/bsd/llvm/dist/llvm/lib/Target/AArch64/AArch64ExpandPseudoInsts.cpp, line 841
- external/bsd/llvm/dist/llvm/lib/Target/AArch64/AArch64MCInstLower.cpp
- external/bsd/llvm/dist/llvm/lib/Target/AMDGPU/AMDGPUMCInstLower.cpp
- external/bsd/llvm/dist/llvm/lib/Target/AMDGPU/SIISelLowering.cpp, line 2412
- external/bsd/llvm/dist/llvm/lib/Target/AMDGPU/SIInstrInfo.cpp, line 1289
- external/bsd/llvm/dist/llvm/lib/Target/ARM/ARMAsmPrinter.cpp
- external/bsd/llvm/dist/llvm/lib/Target/ARM/ARMConstantIslandPass.cpp
- external/bsd/llvm/dist/llvm/lib/Target/ARM/ARMExpandPseudoInsts.cpp
- external/bsd/llvm/dist/llvm/lib/Target/ARM/ARMMCInstLower.cpp
- external/bsd/llvm/dist/llvm/lib/Target/AVR/AVRExpandPseudoInsts.cpp
- external/bsd/llvm/dist/llvm/lib/Target/AVR/AVRMCInstLower.cpp, line 29
- external/bsd/llvm/dist/llvm/lib/Target/Hexagon/HexagonConstExtenders.cpp, line 714
- external/bsd/llvm/dist/llvm/lib/Target/Hexagon/HexagonCopyToCombine.cpp
- external/bsd/llvm/dist/llvm/lib/Target/Hexagon/HexagonISelLowering.cpp, line 936
- external/bsd/llvm/dist/llvm/lib/Target/Hexagon/HexagonInstrInfo.cpp
- external/bsd/llvm/dist/llvm/lib/Target/Hexagon/HexagonMCInstLower.cpp
- external/bsd/llvm/dist/llvm/lib/Target/Hexagon/HexagonOptAddrMode.cpp
- external/bsd/llvm/dist/llvm/lib/Target/Lanai/LanaiMCInstLower.cpp, line 71
- external/bsd/llvm/dist/llvm/lib/Target/MSP430/MSP430MCInstLower.cpp
- external/bsd/llvm/dist/llvm/lib/Target/Mips/MipsAsmPrinter.cpp
- external/bsd/llvm/dist/llvm/lib/Target/Mips/MipsMCInstLower.cpp
- external/bsd/llvm/dist/llvm/lib/Target/Mips/MipsOptimizePICCall.cpp, line 292
- external/bsd/llvm/dist/llvm/lib/Target/Nios2/Nios2AsmPrinter.cpp
- external/bsd/llvm/dist/llvm/lib/Target/Nios2/Nios2MCInstLower.cpp, line 29
- external/bsd/llvm/dist/llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp
- external/bsd/llvm/dist/llvm/lib/Target/PowerPC/PPCMCInstLower.cpp
- external/bsd/llvm/dist/llvm/lib/Target/PowerPC/PPCTOCRegDeps.cpp, line 107
- external/bsd/llvm/dist/llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp, line 194
- external/bsd/llvm/dist/llvm/lib/Target/RISCV/RISCVMCInstLower.cpp, line 34
- external/bsd/llvm/dist/llvm/lib/Target/RISCV/RISCVMergeBaseOffset.cpp
- external/bsd/llvm/dist/llvm/lib/Target/Sparc/SparcAsmPrinter.cpp, line 297
- external/bsd/llvm/dist/llvm/lib/Target/Sparc/SparcMCInstLower.cpp, line 35
- external/bsd/llvm/dist/llvm/lib/Target/SystemZ/SystemZMCInstLower.cpp, line 89
- external/bsd/llvm/dist/llvm/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp
- external/bsd/llvm/dist/llvm/lib/Target/WebAssembly/WebAssemblyMCInstLower.cpp
- external/bsd/llvm/dist/llvm/lib/Target/X86/X86AsmPrinter.cpp
- external/bsd/llvm/dist/llvm/lib/Target/X86/X86ExpandPseudo.cpp
- external/bsd/llvm/dist/llvm/lib/Target/X86/X86ISelDAGToDAG.cpp
- external/bsd/llvm/dist/llvm/lib/Target/X86/X86ISelLowering.cpp
- external/bsd/llvm/dist/llvm/lib/Target/X86/X86InstrInfo.cpp
- external/bsd/llvm/dist/llvm/lib/Target/X86/X86MCInstLower.cpp
- external/bsd/llvm/dist/llvm/unittests/CodeGen/MachineOperandTest.cpp, line 45