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Elixir Cross Referencer

Defined in 4 files as a prototype:

Defined in 5 files as a function:

Referenced in 36 files:

external/bsd/llvm/dist/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
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external/bsd/llvm/dist/llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
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external/bsd/llvm/dist/llvm/lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp
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external/bsd/llvm/dist/llvm/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp
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external/bsd/llvm/dist/llvm/lib/CodeGen/SelectionDAG/LegalizeTypes.cpp, line 892
external/bsd/llvm/dist/llvm/lib/CodeGen/SelectionDAG/LegalizeTypesGeneric.cpp
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external/bsd/llvm/dist/llvm/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp, line 599
external/bsd/llvm/dist/llvm/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp
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external/bsd/llvm/dist/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
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external/bsd/llvm/dist/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
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external/bsd/llvm/dist/llvm/lib/CodeGen/SelectionDAG/StatepointLowering.cpp, line 987
external/bsd/llvm/dist/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
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external/bsd/llvm/dist/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
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external/bsd/llvm/dist/llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp
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external/bsd/llvm/dist/llvm/lib/Target/AMDGPU/R600ISelLowering.cpp
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external/bsd/llvm/dist/llvm/lib/Target/AMDGPU/SIISelLowering.cpp
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external/bsd/llvm/dist/llvm/lib/Target/ARC/ARCISelLowering.cpp
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external/bsd/llvm/dist/llvm/lib/Target/ARM/ARMISelLowering.cpp
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external/bsd/llvm/dist/llvm/lib/Target/ARM/ARMSelectionDAGInfo.cpp, line 213
external/bsd/llvm/dist/llvm/lib/Target/AVR/AVRISelLowering.cpp, line 1108
external/bsd/llvm/dist/llvm/lib/Target/Hexagon/HexagonISelLowering.cpp
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external/bsd/llvm/dist/llvm/lib/Target/Hexagon/HexagonISelLoweringHVX.cpp
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external/bsd/llvm/dist/llvm/lib/Target/Lanai/LanaiISelLowering.cpp
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external/bsd/llvm/dist/llvm/lib/Target/MSP430/MSP430ISelLowering.cpp
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external/bsd/llvm/dist/llvm/lib/Target/Mips/MipsISelLowering.cpp
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external/bsd/llvm/dist/llvm/lib/Target/Mips/MipsISelLowering.h
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external/bsd/llvm/dist/llvm/lib/Target/Mips/MipsSEISelLowering.cpp
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external/bsd/llvm/dist/llvm/lib/Target/NVPTX/NVPTXISelLowering.cpp
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external/bsd/llvm/dist/llvm/lib/Target/Nios2/Nios2ISelLowering.cpp, line 151
external/bsd/llvm/dist/llvm/lib/Target/PowerPC/PPCISelLowering.cpp
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external/bsd/llvm/dist/llvm/lib/Target/RISCV/RISCVISelLowering.cpp
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external/bsd/llvm/dist/llvm/lib/Target/Sparc/SparcISelLowering.cpp
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external/bsd/llvm/dist/llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
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external/bsd/llvm/dist/llvm/lib/Target/X86/X86ISelLowering.cpp
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external/bsd/llvm/dist/llvm/lib/Target/XCore/XCoreISelLowering.cpp
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external/bsd/llvm/dist/llvm/lib/Transforms/Scalar/GVN.cpp
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