Defined in 1 files as a prototype:
Defined in 1 files as a function:
Referenced in 63 files:
- external/bsd/llvm/dist/llvm/include/llvm/CodeGen/GlobalISel/InstructionSelectorImpl.h, line 110
- external/bsd/llvm/dist/llvm/include/llvm/CodeGen/GlobalISel/LegalizationArtifactCombiner.h, line 258
- external/bsd/llvm/dist/llvm/include/llvm/CodeGen/GlobalISel/MIPatternMatch.h, line 129
- external/bsd/llvm/dist/llvm/lib/CodeGen/EarlyIfConversion.cpp, line 245
- external/bsd/llvm/dist/llvm/lib/CodeGen/GlobalISel/InstructionSelector.cpp
- external/bsd/llvm/dist/llvm/lib/CodeGen/GlobalISel/Utils.cpp
- external/bsd/llvm/dist/llvm/lib/CodeGen/LiveVariables.cpp
- external/bsd/llvm/dist/llvm/lib/CodeGen/MachineCSE.cpp, line 157
- external/bsd/llvm/dist/llvm/lib/CodeGen/MachineLICM.cpp
- external/bsd/llvm/dist/llvm/lib/CodeGen/MachinePipeliner.cpp
- external/bsd/llvm/dist/llvm/lib/CodeGen/MachineSSAUpdater.cpp, line 330
- external/bsd/llvm/dist/llvm/lib/CodeGen/MachineSink.cpp
- external/bsd/llvm/dist/llvm/lib/CodeGen/MachineTraceMetrics.cpp
- external/bsd/llvm/dist/llvm/lib/CodeGen/OptimizePHIs.cpp
- external/bsd/llvm/dist/llvm/lib/CodeGen/PHIElimination.cpp, line 408
- external/bsd/llvm/dist/llvm/lib/CodeGen/PeepholeOptimizer.cpp, line 423
- external/bsd/llvm/dist/llvm/lib/CodeGen/RegisterCoalescer.cpp
- external/bsd/llvm/dist/llvm/lib/CodeGen/SelectionDAG/FastISel.cpp, line 469
- external/bsd/llvm/dist/llvm/lib/CodeGen/SelectionDAG/InstrEmitter.cpp, line 528
- external/bsd/llvm/dist/llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
- external/bsd/llvm/dist/llvm/lib/CodeGen/TailDuplicator.cpp, line 193
- external/bsd/llvm/dist/llvm/lib/CodeGen/TargetRegisterInfo.cpp, line 487
- external/bsd/llvm/dist/llvm/lib/Target/AArch64/AArch64InstrInfo.cpp
- external/bsd/llvm/dist/llvm/lib/Target/AArch64/AArch64InstructionSelector.cpp
- external/bsd/llvm/dist/llvm/lib/Target/AArch64/AArch64RegisterBankInfo.cpp, line 622
- external/bsd/llvm/dist/llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
- external/bsd/llvm/dist/llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp, line 58
- external/bsd/llvm/dist/llvm/lib/Target/AMDGPU/R600ISelLowering.cpp, line 352
- external/bsd/llvm/dist/llvm/lib/Target/AMDGPU/SIFixSGPRCopies.cpp
- external/bsd/llvm/dist/llvm/lib/Target/AMDGPU/SIFoldOperands.cpp
- external/bsd/llvm/dist/llvm/lib/Target/AMDGPU/SIISelLowering.cpp, line 3379
- external/bsd/llvm/dist/llvm/lib/Target/AMDGPU/SIInstrInfo.cpp, line 3439
- external/bsd/llvm/dist/llvm/lib/Target/ARM/A15SDOptimizer.cpp
- external/bsd/llvm/dist/llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp
- external/bsd/llvm/dist/llvm/lib/Target/ARM/ARMISelLowering.cpp, line 2259
- external/bsd/llvm/dist/llvm/lib/Target/ARM/MLxExpansionPass.cpp
- external/bsd/llvm/dist/llvm/lib/Target/BPF/BPFMIPeephole.cpp
- external/bsd/llvm/dist/llvm/lib/Target/Hexagon/HexagonBitSimplify.cpp
- external/bsd/llvm/dist/llvm/lib/Target/Hexagon/HexagonConstExtenders.cpp, line 1488
- external/bsd/llvm/dist/llvm/lib/Target/Hexagon/HexagonEarlyIfConv.cpp
- external/bsd/llvm/dist/llvm/lib/Target/Hexagon/HexagonGenInsert.cpp
- external/bsd/llvm/dist/llvm/lib/Target/Hexagon/HexagonGenPredicate.cpp
- external/bsd/llvm/dist/llvm/lib/Target/Hexagon/HexagonHardwareLoops.cpp
- external/bsd/llvm/dist/llvm/lib/Target/Hexagon/HexagonNewValueJump.cpp, line 295
- external/bsd/llvm/dist/llvm/lib/Target/Hexagon/HexagonSplitDouble.cpp
- external/bsd/llvm/dist/llvm/lib/Target/Hexagon/HexagonVExtract.cpp
- external/bsd/llvm/dist/llvm/lib/Target/Lanai/LanaiInstrInfo.cpp, line 464
- external/bsd/llvm/dist/llvm/lib/Target/Mips/MipsOptimizePICCall.cpp, line 283
- external/bsd/llvm/dist/llvm/lib/Target/NVPTX/NVPTXReplaceImageHandles.cpp, line 140
- external/bsd/llvm/dist/llvm/lib/Target/PowerPC/PPCBranchCoalescing.cpp
- external/bsd/llvm/dist/llvm/lib/Target/PowerPC/PPCInstrInfo.cpp
- external/bsd/llvm/dist/llvm/lib/Target/PowerPC/PPCMIPeephole.cpp
- external/bsd/llvm/dist/llvm/lib/Target/PowerPC/PPCReduceCRLogicals.cpp
- external/bsd/llvm/dist/llvm/lib/Target/PowerPC/PPCVSXSwapRemoval.cpp
- external/bsd/llvm/dist/llvm/lib/Target/RISCV/RISCVMergeBaseOffset.cpp
- external/bsd/llvm/dist/llvm/lib/Target/WebAssembly/WebAssemblyExplicitLocals.cpp, line 170
- external/bsd/llvm/dist/llvm/lib/Target/WebAssembly/WebAssemblyLowerBrUnless.cpp, line 78
- external/bsd/llvm/dist/llvm/lib/Target/X86/X86CallFrameOptimization.cpp, line 616
- external/bsd/llvm/dist/llvm/lib/Target/X86/X86DomainReassignment.cpp, line 544
- external/bsd/llvm/dist/llvm/lib/Target/X86/X86FlagsCopyLowering.cpp, line 378
- external/bsd/llvm/dist/llvm/lib/Target/X86/X86ISelLowering.cpp, line 4074
- external/bsd/llvm/dist/llvm/lib/Target/X86/X86InstrInfo.cpp, line 3906
- external/bsd/llvm/dist/llvm/lib/Target/X86/X86InstructionSelector.cpp