#include "../../../external/gpl2/dts/dist/arch/arm/boot/dts/socfpga_cyclone5_de0_nano_soc.dts"

/ {
	soc {
		timer@fffec600 {
			status = "disabled";
		};

		gtimer@fffec200 {
			compatible = "arm,cortex-a9-global-timer";
			reg = <0xfffec200 0x20>;
			clocks = <&mpu_periph_clk>;
			interrupts = <1 11 0x301>;
		};
		usb@ffb40000 {
			dr_mode = "host";
		};
		watchdog@ffd02000 {
			resets = <&rst L4WD0_RESET>;
		};
	};
};