Defined in 6 files as a macro:
Defined in 7 files as a enumerator:
Referenced in 62 files:
- external/bsd/llvm/dist/llvm/include/llvm/CodeGen/ISDOpcodes.h, line 380
- external/bsd/llvm/dist/llvm/include/llvm/TableGen/Record.h, line 801
- external/bsd/llvm/dist/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
- external/bsd/llvm/dist/llvm/lib/CodeGen/SelectionDAG/FastISel.cpp
- external/bsd/llvm/dist/llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
- external/bsd/llvm/dist/llvm/lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp
- external/bsd/llvm/dist/llvm/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp
- external/bsd/llvm/dist/llvm/lib/CodeGen/SelectionDAG/LegalizeTypes.cpp, line 998
- external/bsd/llvm/dist/llvm/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp
- external/bsd/llvm/dist/llvm/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp
- external/bsd/llvm/dist/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
- external/bsd/llvm/dist/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
- external/bsd/llvm/dist/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.h, line 874
- external/bsd/llvm/dist/llvm/lib/CodeGen/SelectionDAG/SelectionDAGDumper.cpp, line 224
- external/bsd/llvm/dist/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
- external/bsd/llvm/dist/llvm/lib/CodeGen/TargetLoweringBase.cpp, line 1457
- external/bsd/llvm/dist/llvm/lib/TableGen/Record.cpp
- external/bsd/llvm/dist/llvm/lib/TableGen/TGParser.cpp
- external/bsd/llvm/dist/llvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp
- external/bsd/llvm/dist/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
- external/bsd/llvm/dist/llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp
- external/bsd/llvm/dist/llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp
- external/bsd/llvm/dist/llvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.cpp, line 359
- external/bsd/llvm/dist/llvm/lib/Target/AMDGPU/R600ISelLowering.cpp
- external/bsd/llvm/dist/llvm/lib/Target/AMDGPU/SIISelLowering.cpp
- external/bsd/llvm/dist/llvm/lib/Target/ARC/ARCISelLowering.cpp
- external/bsd/llvm/dist/llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp
- external/bsd/llvm/dist/llvm/lib/Target/ARM/ARMISelLowering.cpp
- external/bsd/llvm/dist/llvm/lib/Target/ARM/ARMSelectionDAGInfo.h, line 27
- external/bsd/llvm/dist/llvm/lib/Target/AVR/AVRISelLowering.cpp
- external/bsd/llvm/dist/llvm/lib/Target/Hexagon/HexagonISelDAGToDAG.cpp
- external/bsd/llvm/dist/llvm/lib/Target/Hexagon/HexagonISelLowering.cpp
- external/bsd/llvm/dist/llvm/lib/Target/Hexagon/HexagonISelLoweringHVX.cpp
- external/bsd/llvm/dist/llvm/lib/Target/Lanai/LanaiAluCode.h
- external/bsd/llvm/dist/llvm/lib/Target/Lanai/LanaiISelLowering.cpp
- external/bsd/llvm/dist/llvm/lib/Target/Lanai/LanaiMemAluCombiner.cpp, line 220
- external/bsd/llvm/dist/llvm/lib/Target/Lanai/MCTargetDesc/LanaiMCCodeEmitter.cpp, line 242
- external/bsd/llvm/dist/llvm/lib/Target/MSP430/MSP430ISelLowering.cpp
- external/bsd/llvm/dist/llvm/lib/Target/MSP430/MSP430ISelLowering.h, line 65
- external/bsd/llvm/dist/llvm/lib/Target/Mips/MipsISelLowering.cpp
- external/bsd/llvm/dist/llvm/lib/Target/Mips/MipsISelLowering.h
- external/bsd/llvm/dist/llvm/lib/Target/Mips/MipsSEISelLowering.cpp
- external/bsd/llvm/dist/llvm/lib/Target/NVPTX/NVPTXISelDAGToDAG.cpp, line 3453
- external/bsd/llvm/dist/llvm/lib/Target/NVPTX/NVPTXISelLowering.cpp
- external/bsd/llvm/dist/llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp
- external/bsd/llvm/dist/llvm/lib/Target/PowerPC/PPCISelLowering.cpp
- external/bsd/llvm/dist/llvm/lib/Target/PowerPC/PPCISelLowering.h, line 150
- external/bsd/llvm/dist/llvm/lib/Target/Sparc/SparcISelLowering.cpp
- external/bsd/llvm/dist/llvm/lib/Target/SystemZ/SystemZISelDAGToDAG.cpp
- external/bsd/llvm/dist/llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
- external/bsd/llvm/dist/llvm/lib/Target/X86/X86ISelDAGToDAG.cpp
- external/bsd/llvm/dist/llvm/lib/Target/X86/X86ISelLowering.cpp
- external/bsd/llvm/dist/llvm/lib/Target/X86/X86IntrinsicsInfo.h
- external/bsd/llvm/dist/llvm/lib/Target/X86/X86TargetTransformInfo.cpp
- external/bsd/llvm/dist/llvm/lib/Target/XCore/XCoreISelLowering.cpp
- external/bsd/llvm/dist/llvm/test/MC/X86/intel-syntax-bitwise-ops.s, line 50
- external/bsd/pcc/dist/pcc/arch/i86/table.c
- external/bsd/pcc/dist/pcc/cc/ccom/softfloat.c
- external/bsd/pcc/dist/pcc/cc/cxxcom/softfloat.c
- external/gpl3/binutils/dist/gas/rl78-parse.c, line 4533
- sys/external/bsd/sljit/dist/sljit_src/sljitNativeX86_common.c
- usr.bin/xlint/lint1/tree.c