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Elixir Cross Referencer

Defined in 1 files as a prototype:

external/bsd/llvm/dist/llvm/lib/Target/Hexagon/HexagonBlockRanges.h, line 127 (as a prototype)

Defined in 5 files as a function:

Referenced in 49 files:

external/bsd/llvm/dist/llvm/include/llvm/CodeGen/GlobalISel/InstructionSelectorImpl.h
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external/bsd/llvm/dist/llvm/include/llvm/CodeGen/ScheduleDAG.h
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external/bsd/llvm/dist/llvm/include/llvm/CodeGen/ScheduleDAGInstrs.h, line 262
external/bsd/llvm/dist/llvm/include/llvm/CodeGen/SlotIndexes.h
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external/bsd/llvm/dist/llvm/lib/CodeGen/AggressiveAntiDepBreaker.cpp
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external/bsd/llvm/dist/llvm/lib/CodeGen/CriticalAntiDepBreaker.cpp
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external/bsd/llvm/dist/llvm/lib/CodeGen/DFAPacketizer.cpp, line 260
external/bsd/llvm/dist/llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp, line 1298
external/bsd/llvm/dist/llvm/lib/CodeGen/MachinePipeliner.cpp
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external/bsd/llvm/dist/llvm/lib/CodeGen/MachineScheduler.cpp
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external/bsd/llvm/dist/llvm/lib/CodeGen/MacroFusion.cpp
- line 72
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external/bsd/llvm/dist/llvm/lib/CodeGen/PostRASchedulerList.cpp, line 686
external/bsd/llvm/dist/llvm/lib/CodeGen/ScheduleDAGInstrs.cpp
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external/bsd/llvm/dist/llvm/lib/CodeGen/SelectionDAG/FastISel.cpp, line 830
external/bsd/llvm/dist/llvm/lib/CodeGen/SelectionDAG/InstrEmitter.cpp, line 845
external/bsd/llvm/dist/llvm/lib/CodeGen/SlotIndexes.cpp
- line 115
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external/bsd/llvm/dist/llvm/lib/Target/AArch64/AArch64InstructionSelector.cpp, line 747
external/bsd/llvm/dist/llvm/lib/Target/AMDGPU/AMDGPUSubtarget.cpp
- line 637
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external/bsd/llvm/dist/llvm/lib/Target/AMDGPU/GCNHazardRecognizer.cpp
- line 52
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external/bsd/llvm/dist/llvm/lib/Target/AMDGPU/GCNIterativeScheduler.cpp
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external/bsd/llvm/dist/llvm/lib/Target/AMDGPU/GCNSchedStrategy.cpp
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external/bsd/llvm/dist/llvm/lib/Target/AMDGPU/R600MachineScheduler.cpp
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external/bsd/llvm/dist/llvm/lib/Target/AMDGPU/R600Packetizer.cpp
- line 184
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external/bsd/llvm/dist/llvm/lib/Target/AMDGPU/SIInstrInfo.cpp, line 3938
external/bsd/llvm/dist/llvm/lib/Target/AMDGPU/SIMachineScheduler.cpp
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external/bsd/llvm/dist/llvm/lib/Target/ARC/ARCInstrInfo.cpp, line 353
external/bsd/llvm/dist/llvm/lib/Target/ARM/ARMCallLowering.cpp, line 529
external/bsd/llvm/dist/llvm/lib/Target/ARM/ARMHazardRecognizer.cpp
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external/bsd/llvm/dist/llvm/lib/Target/ARM/ARMLoadStoreOptimizer.cpp
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external/bsd/llvm/dist/llvm/lib/Target/ARM/Thumb1FrameLowering.cpp, line 698
external/bsd/llvm/dist/llvm/lib/Target/ARM/Thumb2ITBlockPass.cpp, line 226
external/bsd/llvm/dist/llvm/lib/Target/AVR/AVRExpandPseudoInsts.cpp, line 831
external/bsd/llvm/dist/llvm/lib/Target/Hexagon/HexagonFrameLowering.cpp
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external/bsd/llvm/dist/llvm/lib/Target/Hexagon/HexagonHazardRecognizer.cpp
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external/bsd/llvm/dist/llvm/lib/Target/Hexagon/HexagonISelLowering.cpp
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external/bsd/llvm/dist/llvm/lib/Target/Hexagon/HexagonISelLoweringHVX.cpp
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external/bsd/llvm/dist/llvm/lib/Target/Hexagon/HexagonMachineScheduler.cpp
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external/bsd/llvm/dist/llvm/lib/Target/Hexagon/HexagonSubtarget.cpp
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external/bsd/llvm/dist/llvm/lib/Target/Hexagon/HexagonVLIWPacketizer.cpp
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external/bsd/llvm/dist/llvm/lib/Target/PowerPC/PPCHazardRecognizers.cpp
- line 331
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external/bsd/llvm/dist/llvm/lib/Target/Sparc/SparcInstrInfo.cpp, line 387
external/bsd/llvm/dist/llvm/lib/Target/SystemZ/SystemZHazardRecognizer.cpp
- line 140
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external/bsd/llvm/dist/llvm/lib/Target/SystemZ/SystemZHazardRecognizer.h, line 123
external/bsd/llvm/dist/llvm/lib/Target/WebAssembly/WebAssemblyFixIrreducibleControlFlow.cpp
- line 210
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external/bsd/llvm/dist/llvm/lib/Target/X86/X86CallFrameOptimization.cpp, line 569
external/bsd/llvm/dist/llvm/lib/Target/X86/X86FloatingPoint.cpp, line 875
external/bsd/llvm/dist/llvm/lib/Target/X86/X86ISelLowering.cpp, line 27190
external/bsd/llvm/dist/llvm/lib/Target/X86/X86InstrInfo.cpp
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external/bsd/llvm/dist/llvm/lib/Target/XCore/XCoreInstrInfo.cpp
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