Defined in 2 files as a member:
Defined in 3 files as a function:
Referenced in 69 files:
- external/bsd/llvm/dist/llvm/include/llvm/CodeGen/MachineInstr.h, line 683
- external/bsd/llvm/dist/llvm/include/llvm/CodeGen/ScheduleDAG.h, line 392
- external/bsd/llvm/dist/llvm/include/llvm/CodeGen/TargetInstrInfo.h
- external/bsd/llvm/dist/llvm/lib/CodeGen/BranchFolding.cpp
- external/bsd/llvm/dist/llvm/lib/CodeGen/EarlyIfConversion.cpp, line 216
- external/bsd/llvm/dist/llvm/lib/CodeGen/ImplicitNullChecks.cpp
- external/bsd/llvm/dist/llvm/lib/CodeGen/MachineCSE.cpp, line 368
- external/bsd/llvm/dist/llvm/lib/CodeGen/MachineInstr.cpp
- external/bsd/llvm/dist/llvm/lib/CodeGen/MachineLICM.cpp
- external/bsd/llvm/dist/llvm/lib/CodeGen/MachinePipeliner.cpp
- external/bsd/llvm/dist/llvm/lib/CodeGen/MachineScheduler.cpp, line 1584
- external/bsd/llvm/dist/llvm/lib/CodeGen/MachineSink.cpp, line 743
- external/bsd/llvm/dist/llvm/lib/CodeGen/MachineVerifier.cpp
- external/bsd/llvm/dist/llvm/lib/CodeGen/PeepholeOptimizer.cpp, line 1313
- external/bsd/llvm/dist/llvm/lib/CodeGen/ScheduleDAGInstrs.cpp
- external/bsd/llvm/dist/llvm/lib/CodeGen/SelectionDAG/ScheduleDAGSDNodes.cpp, line 300
- external/bsd/llvm/dist/llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
- external/bsd/llvm/dist/llvm/lib/CodeGen/StackColoring.cpp
- external/bsd/llvm/dist/llvm/lib/CodeGen/TargetInstrInfo.cpp
- external/bsd/llvm/dist/llvm/lib/CodeGen/TargetLoweringBase.cpp, line 972
- external/bsd/llvm/dist/llvm/lib/CodeGen/TwoAddressInstructionPass.cpp, line 1343
- external/bsd/llvm/dist/llvm/lib/Target/AArch64/AArch64ConditionalCompares.cpp, line 415
- external/bsd/llvm/dist/llvm/lib/Target/AArch64/AArch64LoadStoreOptimizer.cpp
- external/bsd/llvm/dist/llvm/lib/Target/AArch64/AArch64RegisterInfo.cpp, line 296
- external/bsd/llvm/dist/llvm/lib/Target/AMDGPU/AMDGPUSubtarget.cpp, line 638
- external/bsd/llvm/dist/llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp, line 2418
- external/bsd/llvm/dist/llvm/lib/Target/AMDGPU/SIFormMemoryClauses.cpp, line 113
- external/bsd/llvm/dist/llvm/lib/Target/AMDGPU/SIInsertWaitcnts.cpp
- external/bsd/llvm/dist/llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
- external/bsd/llvm/dist/llvm/lib/Target/AMDGPU/SIMemoryLegalizer.cpp
- external/bsd/llvm/dist/llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp
- external/bsd/llvm/dist/llvm/lib/Target/ARM/ARMLoadStoreOptimizer.cpp, line 2070
- external/bsd/llvm/dist/llvm/lib/Target/ARM/ARMOptimizeBarriersPass.cpp, line 44
- external/bsd/llvm/dist/llvm/lib/Target/ARM/ThumbRegisterInfo.cpp, line 568
- external/bsd/llvm/dist/llvm/lib/Target/Hexagon/HexagonBitTracker.cpp
- external/bsd/llvm/dist/llvm/lib/Target/Hexagon/HexagonConstExtenders.cpp
- external/bsd/llvm/dist/llvm/lib/Target/Hexagon/HexagonEarlyIfConv.cpp, line 686
- external/bsd/llvm/dist/llvm/lib/Target/Hexagon/HexagonExpandCondsets.cpp
- external/bsd/llvm/dist/llvm/lib/Target/Hexagon/HexagonFrameLowering.cpp, line 2220
- external/bsd/llvm/dist/llvm/lib/Target/Hexagon/HexagonHazardRecognizer.cpp
- external/bsd/llvm/dist/llvm/lib/Target/Hexagon/HexagonInstrInfo.cpp
- external/bsd/llvm/dist/llvm/lib/Target/Hexagon/HexagonOptAddrMode.cpp
- external/bsd/llvm/dist/llvm/lib/Target/Hexagon/HexagonSplitDouble.cpp
- external/bsd/llvm/dist/llvm/lib/Target/Hexagon/HexagonStoreWidening.cpp, line 274
- external/bsd/llvm/dist/llvm/lib/Target/Hexagon/HexagonSubtarget.cpp
- external/bsd/llvm/dist/llvm/lib/Target/Hexagon/HexagonVLIWPacketizer.cpp
- external/bsd/llvm/dist/llvm/lib/Target/Hexagon/MCTargetDesc/HexagonMCChecker.cpp
- external/bsd/llvm/dist/llvm/lib/Target/Hexagon/MCTargetDesc/HexagonShuffler.cpp
- external/bsd/llvm/dist/llvm/lib/Target/Lanai/LanaiDelaySlotFiller.cpp, line 187
- external/bsd/llvm/dist/llvm/lib/Target/Mips/AsmParser/MipsAsmParser.cpp
- external/bsd/llvm/dist/llvm/lib/Target/Mips/MipsDelaySlotFiller.cpp
- external/bsd/llvm/dist/llvm/lib/Target/Mips/MipsOptimizePICCall.cpp, line 289
- external/bsd/llvm/dist/llvm/lib/Target/PowerPC/PPCHazardRecognizers.cpp
- external/bsd/llvm/dist/llvm/lib/Target/Sparc/DelaySlotFiller.cpp, line 238
- external/bsd/llvm/dist/llvm/lib/Target/SystemZ/SystemZInstrBuilder.h, line 33
- external/bsd/llvm/dist/llvm/lib/Target/WebAssembly/WebAssemblyRegStackify.cpp, line 169
- external/bsd/llvm/dist/llvm/lib/Target/WebAssembly/WebAssemblyRegisterInfo.cpp, line 74
- external/bsd/llvm/dist/llvm/lib/Target/X86/X86CmovConversion.cpp
- external/bsd/llvm/dist/llvm/lib/Target/X86/X86InstrBuilder.h, line 205
- external/bsd/llvm/dist/llvm/lib/Target/X86/X86SpeculativeLoadHardening.cpp
- external/bsd/llvm/dist/llvm/tools/llvm-cfi-verify/lib/FileAnalysis.cpp
- external/bsd/llvm/dist/llvm/tools/llvm-mca/InstrBuilder.cpp, line 372
- external/bsd/llvm/dist/llvm/tools/llvm-mca/InstructionInfoView.cpp, line 74
- external/bsd/llvm/dist/llvm/utils/TableGen/CodeGenDAGPatterns.cpp
- external/bsd/llvm/dist/llvm/utils/TableGen/CodeGenInstruction.cpp, line 335
- external/bsd/llvm/dist/llvm/utils/TableGen/DAGISelMatcherGen.cpp
- external/bsd/llvm/dist/llvm/utils/TableGen/GlobalISelEmitter.cpp, line 2596
- external/bsd/llvm/dist/llvm/utils/TableGen/InstrDocsEmitter.cpp, line 114
- external/bsd/llvm/dist/llvm/utils/TableGen/InstrInfoEmitter.cpp, line 585